Since the default syswork thread priority = `-1`.
`adv_send` will call when controller report advertising
sending completed, due to this process by BT RX task, will
maybe process this before `buf_send`, since, sysworkq will be
used by other place and defer by any place.
Note: secure beacon will be 40ms, and friend and lpn will be 20ms.
This problem is very easy to reproduce, especially in native posix.
Signed-off-by: Lingao Meng <menglingao@xiaomi.com>
When pb-gatt advertising enabled, after extablish connect,
will call `cb->connected` and `cb->adv_send`.
In previous connected also clear `ADV_FLAG_PROXY` flag, but
in `adv_send` will attempt unref null point buffers.
Signed-off-by: Lingao Meng <menglingao@xiaomi.com>
autopts was updated to properly require support for Accept Filter List
in Auto Connection Establishment Procedure related tests. This patch
enabled support for it and adds required BTP support.
This was affecting following qualification test cases:
GAP/CONN/ACEP/BV-03-C
GAP/CONN/ACEP/BV-04-C
Signed-off-by: Szymon Janc <szymon.janc@codecoup.pl>
Make the test data larger to help slow down the transfer long enough
to get suspend to work. Then attempt to spin on suspend. Suspending any
of the test transfers is a success.
Previous suspend resume test would always fail on DesignWare DMA
as it was seemingly already done by the time dma_suspend would be
called in the ISR.
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
In addition to x86-32, POSIX boards are also affected by the issue
where a `long double` has the size of 12.
Simplify the process by setting the alignment to 16 for xtensa (as
before). Then defaulting to using `long double` if the config is set.
The case of 12 byte `long double` is then handled by Z_POW2_CEIL when
available. Otherwise, a BUILD_ASSERT is used to verify that alignment
is valid.
Signed-off-by: Yuval Peress <peress@google.com>
When not using 64 bit mode, the implementation of Z_POW2_CEIL should
be using __builtin_clz instead of __builtin_clzl.
Signed-off-by: Yuval Peress <peress@google.com>
In case of BlueNRG-MS, it is necessary to prevent SPI driver to release CS,
and instead, let current driver manage CS release.
So, add SPI_HOLD_ON_CS to operation field
Signed-off-by: Alexandre Bourdiol <alexandre.bourdiol@st.com>
Use logic (and not pin value) for kick_cs() and release_cs()
because potential pin value invertion (Active LOW)
is handled in gpio_pin_set()
Signed-off-by: Alexandre Bourdiol <alexandre.bourdiol@st.com>
In npcx adc driver, we select 'Scan' (Multiple Channels Operation Mode)
mode by default. It means that selected channels in ADCCS will be
converted automatically. Then, read the measured data from CHNDAT
registers if EOCCEV (Event is set after all selected channels are
converted.) flag in ADCSTS is set.
But we enable the wrong interrupt type, INTECEN, during adc
initialization. Ec will send the interrupt after each channel in ADCCS
is converted. It has no harm to the current driver since the driver
reads all selected channels and turns off ADC converter only after
EOCCEV is set in ISR. But it does generate spurious interrupts.
This CL enables the correct interrupt type, INTECCEN, during adc
initialization. Ec only sends the interrupt after all of channels in
ADCCS are converted.
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
bt_audio_valid_stream_qos() is used to validate the QoS parameters
set by a client. It did a check of a preferred setting which is
ok to exceed (mandatory in some cases).
This change removes the statement that causes the check to fail,
but keeps the check for debug purposes.
Fixes#43359
Signed-off-by: Casper Bonde <casper_bonde@bose.com>
This is required to include the resource table in the build output. The
Linux remoteproc framework explicitly looks for this section while loading
the elf and may complain if the resource table is missing.
Signed-off-by: Matthias Fend <matthias.fend@emfend.at>
This allows a resource table to be included even if neither virtIO nor the
RAM console are used.
Signed-off-by: Matthias Fend <matthias.fend@emfend.at>
This is a device-specific option and should therefore not be activated in
a generic project. Since the only boards that use this Kconfig symbol
(lpcxpresso54xx, lpcxpresso55sxx) don't build anyway, this option could
be removed. The device/board specific configuration should be placed in
the boards folder along with an appropriate device tree describing the
IPC nodes.
Signed-off-by: Matthias Fend <matthias.fend@emfend.at>
There was mistake in parentheses application in
the expression which calculates the value.
Signed-off-by: Andrzej Puzdrowski <andrzej.puzdrowski@nordicsemi.no>
PR #43575 was merged mistakenly with a reference to a PR. Fix this by
pointing to the HEAD SHA of the TF-M fork.
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
Fix errors like:
inlined from ‘test_mbedtls’ at
zephyrproject/zephyr/tests/crypto/mbedtls/src/mbedtls.c:172:6:
zephyrproject/zephyr/tests/crypto/mbedtls/src/mbedtls.c:96:17: error:
‘test_snprintf’ reading 10 bytes from a region of size 1
[-Werror=stringop-overread]
96 | test_snprintf(1, "", -1) != 0 ||
| ^~~~~~~~~~~~~~~~~~~~~~~~
In GCC >= 11 because `ret_buf` in some calls are shorter literals
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
Corrects number of loops mentioned in README of sample
to match NUM_LOOPS in main.c. NUM_LOOPS was lowered in
PR #41123 to reduce the noise the sample produced in CI,
but the PR missed changing the README.
Cleans up one line.
Signed-off-by: Lauren Murphy <lauren.murphy@intel.com>
The `size` property is expressed in `bits` unit.
The value should be calculated as bits to bytes conversion.
Signed-off-by: Andrzej Puzdrowski <andrzej.puzdrowski@nordicsemi.no>
Replaced hard-coded delay by wait for response during ICEman
connection.
Signed-off-by: Yuriy Vynnychek <yura.vynnychek@telink-semi.com>
Signed-off-by: Alex Kolosov <rikorsev@gmail.com>
Update trusted-firmware-m to include GPIO service fix.
This would otherwise result in an assert or GPIO pins not assigned
to the network.
Signed-off-by: Joakim Andersson <joakim.andersson@nordicsemi.no>
Fix the BL5340 DVK pin assignment using the nrf5340 DK pin.
Regression from: e4260ac03f.
This also aligns the BL5340 DVK to use the GPIO forward module.
Signed-off-by: Joakim Andersson <joakim.andersson@nordicsemi.no>
Fix missing include path for TF-M installed headers.
When TF-M was enabled resulted in the following error:
"fatal error: tfm_ioctl_api.h: No such file or directory"
Signed-off-by: Joakim Andersson <joakim.andersson@nordicsemi.no>
Workaround for errata 192 is unnecessary as it is applied within
nrfx_clock_calibration_start().
Fixes#43930
Signed-off-by: Xudong Zheng <7pkvm5aw@slicealias.com>
Fix implementation to be able to establish synchronization
when scan filter accept list is in use and periodic
synchronization needs to be established using specified peer
address or using periodic advertiser list.
Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
Added overlay with DTS of MX25L51245G qspi flash
memory. DTS configures qspi clock to 2 MHz which is supported
by nRF52840.
Signed-off-by: Andrzej Puzdrowski <andrzej.puzdrowski@nordicsemi.no>
Added basic support for enter 4-byte addressing command.
Patch supports command 0xB7 (Enter 4-Byte Address Mode),
with or without preceding WREN.
Similar as for SPI-NOR the `enter-4byte-addr` property of
memory node is used or describing how to Enter 4-Byte Addressing
mode.
Worth to notice that along with that property the `address-size-32`
property is expected as it switch the driver to use 4-byte addressing
in operations.
Signed-off-by: Andrzej Puzdrowski <andrzej.puzdrowski@nordicsemi.no>
Fixup typo found in `hawkbit.h`. Fixes from "faile" to "fail"
Edit: change all occurences of "Hawkbit" to "hawkBit" in comments as
requested in [1].
[1] https://github.com/zephyrproject-rtos/zephyr/pull/44024
Signed-off-by: Wilfred Mallawa <thulith.mallawa@uqconnect.edu.au>
target is stm32fxx with clearing clock config
target is stm32fxx with pll from hsi clock config
target is stm32fxx with pll from hse clock config (with bypass)
target is stm32fxx with hse, hsi, clock config (no pll)
Signed-off-by: Francois Ramu <francois.ramu@st.com>
target is stm32l4x/l5x with clearing clock config
target is stm32l4x/l5x with pll 64MHz from hsi clock config
target is stm32l4x/l5x with pll 48MHz from msi clock config
target is stm32l4x/l5x with pll 64MHz from hse clock config (with bypass)
target is stm32l4x/l5x with hse, hsi, msi clock config (no pll)
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Testing the HSE on the nucleo_stm32g071rb requires a hw fixture
on the hw board : MCO signal must given by the STLink to the mcu.
Put a hardware fixture to activate the hse clock with by-passed
only if the SB17 is closed on the HW.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
target is stm32wb55 with clearing clock config
target is stm32wb55 with pll 48MHz from hsi clock config
target is stm32wb55 with pll 48MHz from msi clock config
target is stm32wb55 with pll 64Hz from hse clock config
target is stm32wb55 with hse, msi, hsi clock config (no pll)
Signed-off-by: Francois Ramu <francois.ramu@st.com>
target is stm32wl55 with clearing clock config
target is stm32wl55 with pll 48MHz from hsi clock config
target is stm32wl55 with pll 48MHz from hse clock config
target is stm32wl55 with hse clock config (no pll)
target is stm32wl55 with msi clock config (no pll)
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Fix build error for stm32 devices which have no function
to get the PLL ON bit from the RCC_CR register
Use the register access instead.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
target is stm32l1/l0 with pll 32MHz from hsi clock config
target is stm32l1/l0 with pll 32MHz from hse clock config
target is stm32l1/l0 with hse clock config (no pll)
target is stm32l1/l0 with hsi clock config (no pll)
target is stm32l1/l0 with msi clock config (no pll)
Signed-off-by: Francois Ramu <francois.ramu@st.com>
