It was detected by test_sw_isr_irq_parent_table_idx in arch.interrupt:
ASSERTION FAIL [table_idx < (186 - 0)]
@ WEST_TOPDIR/zephyr/arch/common/multilevel_irq.c:91
table_idx(186) < IRQ_TABLE_SIZE(186)
NUM_IRQS was previously set to the same value as MAX_IRQ_PER_AGGREGATOR
and it didn't take into account the number of 1st level interrupts
specified by 2ND_LVL_ISR_TBL_OFFSET. In the generated __sw_isr_table,
Level 2 interrupts start at the offset specified by 2ND_LVL_ISR_TBL_OFFSET.
For PolarFire SoC, upper interrupt sources for PLIC correspond to
Bus Error Unit and Fabric Interface. They are currently not used by
platforms in Zephyr, so the previous value of NUM_IRQS hasn't caused
issues for regular applications.
As it doesn't look like an explicit memory optimization, increase NUM_IRQS
to allow kernel interrupt tests to pass.
Note:
2ND_LVL_ISR_TBL_OFFSET=13 and NUM_IRQS=199 don't include additional
48 Local Interrupts supported by cores. In total, there are
64 bits in Machine Interrupt Pending Register (mip)
which can be used to configure 1st level interrupts.
As a further extension to the platform, values could be extended to
2ND_LVL_ISR_TBL_OFFSET=64 and NUM_IRQS=250. This commit increases
NUM_IRQS by a minimal value required to pass kernel interrupt tests.
Link: https://ww1.microchip.com/downloads/aemDocuments/documents/FPGA/ProductDocuments/ReferenceManuals/PolarFire_SoC_FPGA_MSS_Technical_Reference_Manual_VC.pdf
Signed-off-by: Marek Slowinski <mslowinski@antmicro.com>
Apply dependabot suggested updates to the `scorecard` workflow to pull
latest versions of the actions.
Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
This commit follows up on e808ccfxy and completes the pinning of *all*
GitHub Actions to SHAs, including GitHub-owned `actions/*` actions.
Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
Add more parameters to command `connect` and `register`, including mode,
mode_optional, extended_control, and hold_credit.
Add command `credits` to give the rx credit.
Signed-off-by: Lyle Zhu <lyle.zhu@nxp.com>
Add a sub-command set `l2cap` for command set `br`.
Move command `l2cap-register` to sub-command set. And rename it to
`register`.
Add command `connect`, `disconnect`, and `send` for command set
`l2cap`.
Remove original net buffer pool from `data_pool` to `data_rx_pool`.
Add a net buffer pool `data_tx_pool` for command `send`.
Do not wait anymore if no net buffer can be allocated from
`data_rx_pool`.
Dump all received data in L2CAP data received callback.
Signed-off-by: Lyle Zhu <lyle.zhu@nxp.com>
Improve the retransmission and flow control to support sending
multiple SDU at the same time if the TX windows is not full.
Signed-off-by: Lyle Zhu <lyle.zhu@nxp.com>
Add mode optional support for BR l2cap connect initiator role.
If `chan->rx.optional` is true, set the mode to basic mode instead of
return error code `-ENOTSUP`.
Signed-off-by: Lyle Zhu <lyle.zhu@nxp.com>
Enable signaling channel configuration for retransmission and Flow
control feature.
Send I-frame and S-frame. Support retransmission and Flow control for
sending.
Receive and handle I-frame and S-frame.
Signed-off-by: Lyle Zhu <lyle.zhu@nxp.com>
Add option to force integration mode on a defined list of tests, for
example tests for sample that are identified with 'sample.'.
A sample per definition shall be tested on documented and supported
platforms listed in the sample documentation. Samples shall not be used
as tests to verify functionality of a feature on all available plaforms
in Zephyr.
To still allow testing on platforms not listed in the doc, and when such
platforms are covered by the provided filter, we should still be able to
build/run the tests on those platforms (not directly listed in
integration_platforms).
We detect a sample by its test identifier, i.e., it starts with 'sample.'.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Added configuration for new audio PLL service.
Pull in new service implementation in new hal nordic.
Signed-off-by: Łukasz Stępnicki <lukasz.stepnicki@nordicsemi.no>
For different values of reorder buffer throughputs are consistent,
Setting reorder buffer size to half of the RX buffers configured.
Signed-off-by: Kapil Bhatt <kapil.bhatt@nordicsemi.no>
Replace manually authored hardware features table with the new Zephyr
board supported hardware directive which automatically generates an
up-to-date table based on the boards' Devicetree.
Removed some typos.
Co-authored-by: Benjamin Cabé <benjamin@zephyrproject.org>
Signed-off-by: Lothar Felten <lothar.felten@gmail.com>
The original flow of socket_service thread handling the Zperf UDP RX
packets is: zsock_poll() polls all sockets for events, if ctx->recv_q
of Zperf is not empty, it will call trigger_work() -> udp_recv_data()
-> zsock_recvfrom() to read only one UDP packet from ctx->recv_q, then
go back to zsock_poll() and run the same process again, which is
inefficient.
The alternative solution is, in udp_recv_data(), it should exhaust all
the packets in the current ctx->recv_q, and then go back to
zsock_poll() to run the same process again.
In our Wi-Fi test case, for WPA3 security mode of 5GHz, the STA UDP RX
throughput can be improved from 91.48 Mbps to 99.87 Mbps, the SAP UDP
RX throughput can be improved from 85.97 Mbps to 96.00 Mbps.
Signed-off-by: Maochen Wang <maochen.wang@nxp.com>
Rewrote the warning levels for toolchain IAR as IAR tools just turn
off warnings, not on. Also did some minor cleanup for coding
guidelines.
Signed-off-by: Lars-Ove Karlsson <lars-ove.karlsson@iar.com>
Extend support in dt bindings and in the driver to allow use of
AIN8 to AIN13 analog inputs.
Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
During raw scan, Need to disable NRF_WIFI_MGMT_BUFF_OFFLOAD.
UMAC will send beacon and probe responses directly to the host,
regardless of the mgmt_buff_offload flag's value.
Host needs to resubmit buffers to LMAC.
Signed-off-by: Kapil Bhatt <kapil.bhatt@nordicsemi.no>
ENTROPY_NRF_CRACEN_CTR_DRBG symbol is based on devicetree
node with compatible nordic,nrf-cracen-ctrdrbg. It does not
have to be selected explicitly.
Signed-off-by: Michał Stasiak <michal.stasiak@nordicsemi.no>
Enabled west flash and west erase for nRF54L20 PDK FLPR core.
Added missing reset qualifier for nRF54L20 and nRF54L09.
Signed-off-by: Michał Stasiak <michal.stasiak@nordicsemi.no>
The stack will no longer implicitly set the data path
for ISO channel, and the responsibility for doing that is
now for the upper layers/applications.
This provides additional flexibility for the higher layers
as they can better control the values and timing of the data
path, as well as support removing and even reconfiguring the
data path at will.
This also removes some complexity from the stack.
This commit also fixed a inconsistency in the disconnected
handler. CIS for centrals as well as BIS were still valid
bt_iso_chan channels in the disconnected callback,
but CIS for peripherals were completely cleaned up at this
point. This issue is fixed by moving the disconnected callback
handling to before the code to cleanup the channel for
peripherals.
Since there is a difference in how you remove data paths
depending on the GAP role (central/peripheral), the
iso_info struct type has been expanded to be more
concise of which type of CIS it is.
Signed-off-by: Emil Gydesen <emil.gydesen@nordicsemi.no>
Convert Norik's boards documentation to use the zephyr:board-supported-hw
directive to specify supported hardware features.
Signed-off-by: Florijan Plohl <florijan.plohl@norik.com>
Exclude RZ/A3UL SMARC board as the redefined CONFIG_SRAM_BASE_ADDRESS
degrades the BUILD_OUTPUT_ADJUST_LMA option that will generate a bin
file >10GB
Signed-off-by: Nhut Nguyen <nhut.nguyen.kc@renesas.com>
Add GPIO driver support for RZ/A3UL
Signed-off-by: Nhut Nguyen <nhut.nguyen.kc@renesas.com>
Signed-off-by: Quang Le <quang.le.eb@bp.renesas.com>
Signed-off-by: Tien Nguyen <tien.nguyen.zg@renesas.com>
This is the initial commit to support UART driver for Renesas RZ/A3UL.
Signed-off-by: Nhut Nguyen <nhut.nguyen.kc@renesas.com>
Signed-off-by: Tien Nguyen <tien.nguyen.zg@renesas.com>
This is the initial commit to support pinctrl driver for Renesas RZ/A3UL
Signed-off-by: Nhut Nguyen <nhut.nguyen.kc@renesas.com>
Signed-off-by: Phuc Pham <phuc.pham.xr@bp.renesas.com>
This adds minimal support for board RZ/A3UL-SMARC
Signed-off-by: Nhut Nguyen <nhut.nguyen.kc@renesas.com>
Signed-off-by: Phuc Pham <phuc.pham.xr@bp.renesas.com>
Signed-off-by: Tien Nguyen <tien.nguyen.zg@renesas.com>
RTC alarm is not supported by the driver for now due to the complexity it
would take to work around an hardware erratum. However, it is not possible
to prevent CONFIG_RTC_ALARM from being enabled at Kconfig level.
Modify the RTC driver such that enabling CONFIG_RTC_ALARM on STM32WB0
series does not cause build errors anymore.
Signed-off-by: Mathieu Choplain <mathieu.choplain@st.com>
