Commit graph

8284 commits

Author SHA1 Message Date
cyliang tw
ea1129ee1a drivers: ethernet: support for numaker m55m1x series
Add support for Nuvoton numaker m55m1x series EMAC controller.
Also include NOCACHE_MEMORY allocation.
Support to generate random mac address and remove emac data flash.

Signed-off-by: cyliang tw <cyliang@nuvoton.com>
2025-04-10 14:43:43 +02:00
Ryan McClelland
28a7ad4a57 drivers: i3c: add primary controller da property
Add a way to assign the dynamic address for a primary controller. This
is the address that is broadcasted out with the ccc DEFTGTS, and is the
address that secondary controllers use to communicate with the primary
controller.

Signed-off-by: Ryan McClelland <ryanmcclelland@meta.com>
2025-04-10 10:11:37 +02:00
Jan Behrens
f75c057e85 drivers: stepper: Renamed DRV8424 to DRV84XX
Renamed the drv8424 stepper driver to indicate its support of the drv8424,
drv8425, drv8426, drv8434 and drv8436 stepper controllors. Also made the
microstep pins optional. All test files are renamed as well.

Signed-off-by: Jan Behrens <jan.behrens@navimatix.de>
2025-04-09 19:34:00 +02:00
Jordan Yates
c7bc268656 sensor: current_amp: add a noise threshold
ADC output values can have noise, even if the input is 0V. Add a noise
threshold so that raw ADC readings below the threshold can be zeroed
out. By default the threshold is disabled.

Signed-off-by: Jordan Yates <jordan@embeint.com>
2025-04-09 19:32:02 +02:00
Furkan Akkiz
59f709273d dts: arm: adi: Add USBHS instance to MAX32690
Insert USBHS instance to MAX32690 devicetree.
Add bindings for MAX32 UDC driver.

Signed-off-by: Furkan Akkiz <hasanfurkan.akkiz@analog.com>
2025-04-09 19:31:24 +02:00
Benjamin Cabé
acfe49d75f dts: gpio: fix typo in mikro-bus binding description
There are 6 right-side pins so numbering is 6-11,
not 6-10.

Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
2025-04-09 17:33:10 +02:00
Ivar Bjerling
4344b8bc05 boards: add support for IAR STM32F429II-ACA
Adds support for the IAR STM32F429II-ACA evaluation board

Signed-off-by: Ivar Bjerling <ivar@ivarbjerling.com>
2025-04-09 17:32:38 +02:00
Okan Sahin
5785c09255 dts: bindings: adc: Add AD4130 binding
This commit adds bindings and analog inputs
for AD4130 ADC.

Signed-off-by: Okan Sahin <Okan.Sahin@analog.com>
2025-04-09 17:32:29 +02:00
Krzysztof Chruściński
a4a613036c dts: common: nordic: nrf54h20: Update exit-latency-us timing
Update exit-latency-us with newly measured values. Measurement is
taking into account additional timing compared to wakeup from
WFI.

Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
2025-04-09 15:24:02 +02:00
Tomáš Juřena
315ea56fef soc: st: common: Rename STM32_PWR_WKUP_PIN_SRC_x
This renames the STM32_PWR_WKUP_PIN_SRC_x symbols to better match
their meaning. It also adds a new symbol (STM32_PWR_WKUP_PIN_NOT_MUXED)
for SoCs without wake-up mux support.

Signed-off-by: Tomáš Juřena <jurenatomas@gmail.com>
2025-04-09 15:22:59 +02:00
Tien Nguyen
3cba2221ed drivers: gpio: Add support for RZ/G2L
Add GPIO support for RZ/G2L

Signed-off-by: Tien Nguyen <tien.nguyen.zg@renesas.com>
Signed-off-by: Nhut Nguyen <nhut.nguyen.kc@renesas.com>
2025-04-09 12:35:54 +02:00
Tien Nguyen
1d736d36ab driver: pinctrl: Add support for Renesas RZ/G2L
Add pinctrl support for Renesas RZ/G2L

Signed-off-by: Tien Nguyen <tien.nguyen.zg@renesas.com>
Signed-off-by: Nhut Nguyen <nhut.nguyen.kc@renesas.com>
2025-04-09 12:35:54 +02:00
Nhut Nguyen
28d9c8626b dts: arm: renesas: Add support for Renesas RZ/G2L
Add devicetree to support for Renesas RZ/G2L

Signed-off-by: Nhut Nguyen <nhut.nguyen.kc@renesas.com>
2025-04-09 12:35:54 +02:00
Yunshao Chiang
c6fe84caf2 drivers: counter: add ite it8xxx2 timer driver
The IT8xxx2 timer driver uses timer 7 and timer 8 to implement the alarm
timer and the top timer, respectively.

Signed-off-by: Yunshao Chiang <Yunshao.Chiang@ite.com.tw>
2025-04-08 16:12:11 +02:00
Andrzej Głąbek
54d8c80ade dts: bindings: nrf-vpr: Allow specifying pins and not using launcher
Add possibility to use pinctrl to configure pins that should be assigned
to nRF VPR coprocessors and also provide a way of preventing activation
of the nordic_vpr_launcher driver for an enabled VPR so that it can be
supplied with the code to execute and launched in a custom way.

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2025-04-08 16:11:51 +02:00
Tomáš Juřena
18c6d616c1 dts: arm: st: c0: Add pwr node definition
Defines new pwr node with set of wake-up pins.

Signed-off-by: Tomáš Juřena <jurenatomas@gmail.com>
2025-04-08 11:45:24 +02:00
Tim Lin
a531e71376 drivers/timer: Add timer driver of it51xxx
Add timer driver for ITE it51xxx series.

Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
2025-04-08 10:48:26 +02:00
Tim Lin
d64d87f655 drivers/serial: Add ITE UART wrapper to enable serial driver of ns16550
Add ITE UART wrapper to enable serial driver of ns16550.

Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
2025-04-08 10:48:26 +02:00
Tim Lin
df56c85e94 drivers/clock: Add clock drivers of it51xxx
Add clock drivers for ITE it51xxx series.

Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
2025-04-08 10:48:26 +02:00
Tim Lin
f67c2a3d33 drivers/gpio: Add GPIO driver of it51xxx
Add GPIO driver for ITE it51xxx series.

Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
2025-04-08 10:48:26 +02:00
Tim Lin
8c2f5684bb drivers/flash: Enable flash controller for it51xxx series
Enable flash controller for ITE it51xxx series.

Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
2025-04-08 10:48:26 +02:00
Tim Lin
d9571f6412 soc: ITE: ilm: Enable instruction memory for it51xxx series
Enable instruction memory for ITE it51xxx series.

Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
2025-04-08 10:48:26 +02:00
Tim Lin
f0d21fb497 drivers/pinctrl: Enable pinctrl driver for it51xxx series
Enable pinctrl driver for ITE it51xxx series.

Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
2025-04-08 10:48:26 +02:00
Tim Lin
678adea066 drivers/interrupt: Add interrupt and wake-up control drivers of it51xxx
Add interrupt and wake-up control drivers for ITE it51xxx series.

Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
2025-04-08 10:48:26 +02:00
Tim Lin
7a06df9cc3 soc: ITE: Add ITE it51xxx SoC
Add support for ITE it51xxx SoC.
NOTE: it51526aw is not support RISCV_ISA_EXT_C.

Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
2025-04-08 10:48:26 +02:00
Georgios Vasilakis
320505ef39 dts: nordic: Add NRF MPC node in dts
Add the Nordic Memory Privilege Controller (MPC)
in the dtsi of nrf54l15/10/05.

This sets the number of override regions and the
granularity of the regions.

Signed-off-by: Georgios Vasilakis <georgios.vasilakis@nordicsemi.no>
2025-04-08 01:51:18 +02:00
Georgios Vasilakis
b1842723fd dts: bindings: Add binding for Nordic MPC
Add binding for the Nordic Memory
Privilege Controller (MPC).

Signed-off-by: Georgios Vasilakis <georgios.vasilakis@nordicsemi.no>
2025-04-08 01:51:18 +02:00
Benjamin Cabé
b722cc4ce9 dts: bindings: add mdm-wake-gpios to Sequans Monarch 2 GM02S binding
Add DT property for modem's wake-up pin

Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
2025-04-07 21:14:27 +02:00
Lukas Gunnarsson
e7201b9f2c drivers: rtc: add nxp pcf2123 driver
Add driver support for the NXP PCF2123 RTC.

Signed-off-by: Lukas Gunnarsson <lukasgunnarsson@protonmail.com>
2025-04-07 21:13:29 +02:00
Titan Chen
5a94a1ca66 drivers: counter: rts5912: add support slow timer counter driver
Port rts5912 slow timer counter driver on Zephyr

Signed-off-by: Titan Chen <titan.chen@realtek.com>
2025-04-07 21:13:10 +02:00
Emil Dahl Juhl
1a3dd63dde drivers: sensor: ti: opt3001: add trigger support
The ti,opt3001 ambient light sensor is capable of asserting its interrupt
gpio upon conversion completion. The interrupt gpio can then be used to
trigger a reading of the conversion result automatically.
Due to this, it makes sense for the driver to implement the sensor trigger
functionality.

Add a devicetree property, int-gpios, to the ti,opt3001 bindings to allow
describing the gpio used for getting interrupts from the ti,opt3001.

Implement the sensor trigger functionality with options for using the
global worker thread or letting the ti,opt3001 create its own thread for
servicing the interrupts.
In both cases, when an interrupt is received the driver will read a new
measurement from the chip and clear the interrupt. The sample is then ready
to be read by the user of the sensor.

When manually triggering a sample_fetch, the trigger handler is not
invoked.

Signed-off-by: Emil Dahl Juhl <emdj@bang-olufsen.dk>
2025-04-07 15:18:21 +02:00
Samuel Chee
7e95006abf drivers: pinctrl: add pinctrl drivers for arm v2m_beetle
Adds pinctrl driver for the v2m_beetle board target.

Signed-off-by: Samuel Chee <samche01@arm.com>
Signed-off-by: Sudan Landge <sudan.landge@arm.com>
2025-04-07 15:18:10 +02:00
Samuel Chee
a2f0e5d372 drivers: pinctrl: add pinctrl drivers for arm mps3
Adds pinctrl driver for all Arm mps3 targets

Signed-off-by: Samuel Chee <samche01@arm.com>
Signed-off-by: Sudan Landge <sudan.landge@arm.com>
2025-04-07 15:18:10 +02:00
Samuel Chee
99ae4bf132 drivers: pinctrl: add pinctrl driver for Arm mps2
Adds pinctrl driver for all Arm mps2 targets.

Signed-off-by: Samuel Chee <samche01@arm.com>
Signed-off-by: Sudan Landge <sudan.landge@arm.com>
2025-04-07 15:18:10 +02:00
Samuel Chee
9bac31e5a2 drivers: uart: adds pinctrl support for Arm cmsdk uart driver
Adds necessary pinctrl support for Arm cmsdk uart driver

Signed-off-by: Samuel Chee <samche01@arm.com>
Signed-off-by: Sudan Landge <sudan.landge@arm.com>
2025-04-07 15:18:10 +02:00
Samuel Chee
4772e183dc drivers: i2c: add pinctrl support to Arm sbcon driver
Adds necessary pinctrl support to Arm SBCon I2C driver.

Signed-off-by: Samuel Chee <samche01@arm.com>
Signed-off-by: Sudan Landge <sudan.landge@arm.com>
2025-04-07 15:18:10 +02:00
Remi Buisson
9dc3b757cc dts: bindings: sensor: Add invensense icp201xx properties
Add I2C and SPI variants for icp201xx.

Signed-off-by: Remi Buisson <remi.buisson@tdk.com>
2025-04-07 15:17:44 +02:00
Iuliana Prodan
66ab75ff96 dts: xtensa: nxp: add mailbox node
Add mailbox node used for inter-process communication.

Signed-off-by: Iuliana Prodan <iuliana.prodan@nxp.com>
2025-04-07 15:17:34 +02:00
Iuliana Prodan
54f99bf8b0 dts: xtensa: nxp: fix compile warning
Fix the following compile warning:
"Warning (unique_unit_address_if_enabled):
/cpus/cpu@0: duplicate unit-address (also used
in node /cpus/interrupt-controller@0)"

Signed-off-by: Iuliana Prodan <iuliana.prodan@nxp.com>
2025-04-07 15:17:34 +02:00
Frank Bintakies
bda045940e boards: kws: Add support for KWS Pico-SPE Boards
Add support for KWS Pico-SPE based on
Raspberry Pi RP2040

Add support for KWS Pico2-SPE based on
Raspberry Pi RP2350

Signed-off-by: Frank Bintakies <fbintakies@kws-computer.de>
2025-04-07 09:59:19 +02:00
Aksel Skauge Mellbye
02bcad219c dts: arm: silabs: Add ITM node to cpu core for Series 2
ARM Cortex-M33 has the Instrumentation Trace Macrocell peripheral.
Add it to SoC DTS.

Signed-off-by: Aksel Skauge Mellbye <aksel.mellbye@silabs.com>
2025-04-07 08:54:38 +02:00
Marcio Ribeiro
c01489dadc drivers: i2s: esp32: add support for non-gdma SoCs
Adds support for:
- esp32
- esp32s2

Signed-off-by: Marcio Ribeiro <marcio.ribeiro@espressif.com>
2025-04-06 12:17:58 +02:00
Ivan Wagner
b5adb4457c drivers: sensor: meas: ms5837 supporting 02 and 30 variants via dt
This patch adds support via dt compatible property.

Signed-off-by: Ivan Wagner <ivan.wagner@tecinvent.ch>
2025-04-04 21:16:20 +02:00
Hank Wang
e11634e733 drivers: i2c: tca954x: add support for idle disconnect
Add support for an optional "idle disconnect" feature in the TCA954x
I2C multiplexer. When enabled via the `i2c-mux-idle-disconnect` device
tree property, the driver will disconnect all channels after each
transfer. This helps avoid address conflicts when multiple multiplexers
are present on the same I2C bus.

Even if the I2C transfer fails, the driver will still attempt to
disconnect the channels to ensure the bus is left in a consistent state.
If the disconnect operation itself fails, its error code will be returned
unless the transfer already failed with a different error.

This implementation is inspired by the Linux kernel driver for PCA954x
I2C multiplexers. Special thanks to Ofir Shemesh for valuable suggestion.

Signed-off-by: Hank Wang <wanghanchi2000@gmail.com>
2025-04-04 18:17:07 +02:00
Aksel Skauge Mellbye
295975019a dts: arm: silabs: Fix clock and interrupt definitions for xg22
The WDOG and IADC clock node definitions were missing for xg22,
and interrupt numbers were wrong for WDOG on xg27.

Signed-off-by: Aksel Skauge Mellbye <aksel.mellbye@silabs.com>
2025-04-04 14:57:15 +02:00
Jimmy Zheng
9349d54074 driver: interrupt_controller: intc_clic: rework to standard CLIC driver
Rework intc_clic to standard CLIC driver with Nuclei ECLIC extention.

Signed-off-by: Jimmy Zheng <jimmyzhe@andestech.com>
2025-04-04 14:55:50 +02:00
Jimmy Zheng
477d56ecea dts: bindings: interrupt-controller: add riscv,clic yaml
Add RISC-V CLIC (Core-Local Interrupt Controller) yaml.

Signed-off-by: Jimmy Zheng <jimmyzhe@andestech.com>
2025-04-04 14:55:50 +02:00
Petri Pitkanen
a1a92a20a6 dts: silabs: interrupt levels corrected
Downgrading interrupt priority for non critical interrupts for the
supported SOCs.

Previously almost all interrupts were at level 0 i.e. meaning no interrupt
had priority over the others. In reality only radio interrupts are critical
while others can be served with less haste.

Now the level zero is reserved for interrupts that need higher priority
than the radio without bypassing irq locks (zero-latency interrupts)
Level 1 for radio and levels 2 and 3 for rest of the services.

Signed-off-by: Petri Pitkanen <petri.pitkanen@silabs.com>
2025-04-04 12:14:44 +02:00
Christopher Cichiwskyj
7dcec3384e soc: add support for STM32F479
This chip shares its design with STM32F469, but with
an added cryptography accelerator.

Signed-off-by: Christopher Cichiwskyj <cichiwskyj@gmail.com>
2025-04-04 12:06:29 +02:00
Julien Racki
7512391da4 dts: arm: st: mp13: stm32mp13 new series with cortex A7
Put the flash in DDR 0xC0000000
Put the SRAM in DDR 0xD0000000

Signed-off-by: Julien Racki <julien.racki@st.com>
2025-04-04 09:35:03 +02:00