Commit graph

117455 commits

Author SHA1 Message Date
Fabrice DJIATSA
86cab94150 dts: arm: st: h7: combine sram1 and sram2 memory size
Combining the two regions provides enough memory to
successfully build applications.

Note that SRAM1 and SRAM2 are continuous regions.

Signed-off-by: Fabrice DJIATSA <fabrice.djiatsa-ext@st.com>
2025-06-19 22:31:31 -07:00
Hao Luo
f1348d3954 drivers: i2c: ambiq: buffer overflow issue fixed
Bugfix for possible out-of-bounds operation when buffer address
is not 4 bytes aligned

Signed-off-by: Hao Luo <hluo@ambiq.com>
2025-06-19 22:31:06 -07:00
Khaoula Bidani
2862ed19a4 tests: drivers: adc: adc_api: update adc_api test
-add nucleo_u385rg_q overlays files
for testbench purpose.
- add platform_exclude property to skip test on boards
with little ram size.

Signed-off-by: Khaoula Bidani <khaoula.bidani-ext@st.com>
2025-06-19 22:27:35 -07:00
Khaoula Bidani
f568b0d68a drivers: adc: update adc driver to integrate stm32u3
add u3 config_soc conditions in adc driver to handle
news peripherals.

Signed-off-by: Khaoula Bidani <khaoula.bidani-ext@st.com>
2025-06-19 22:27:35 -07:00
Khaoula Bidani
be94ee589b boards: st: add adc node in dts file and update docs
- enable adc in nucleo_u385rg_q
- add adc as new supported interface in docs
- update yaml files

Signed-off-by: Khaoula Bidani <khaoula.bidani-ext@st.com>
2025-06-19 22:27:35 -07:00
Khaoula Bidani
edac88658e dts: arm: st: u3: add adc node in dtsi file
all stm32u3 boards have only one and same
adc peripheral.

Signed-off-by: Khaoula Bidani <khaoula.bidani-ext@st.com>
2025-06-19 22:27:35 -07:00
Benjamin Cabé
6d9fecae44 tests: modules: nanopb: fix typo in assert
Fix a typo / copy-paste error in the assert message.

Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
2025-06-19 14:12:53 +02:00
Kate Wang
e2d97c7ca6 drivers: video: ov7670: update the camera init sequence
The previous initialization sequence fails to configure the module
properly. Update the sequence using the code provided by vendor.
The update is verified using the FRDM-MCXN947 SmartDMA camera case
under samples/drivers/video/capture.

Signed-off-by: Kate Wang <yumeng.wang@nxp.com>
2025-06-19 14:04:45 +02:00
Johann Fischer
c7b364e99a usb: update USBD_DESC_SERIAL_NUMBER_DEFINE macro description
Update USBD_DESC_SERIAL_NUMBER_DEFINE macro description.

Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
2025-06-19 14:04:31 +02:00
Johann Fischer
76579d21ab usb: device_next: allow to limit number or digits in serial number
Add Kconfig option to limit the length requested from HWINFO to a
meaningful number of digits. Also, check the length returned by the
HWINFO driver and rename the variables to a more suitable name.

Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
2025-06-19 14:04:31 +02:00
Johann Fischer
452a53ba1a usb: device_next: hide Kconfig option USBD_MSG_SLAB_COUNT if not used
If deferred mode is not being used, hide the USBD_MSG_SLAB_COUNT option.

Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
2025-06-19 14:04:31 +02:00
Anas Nashif
91dc04d5d0 twister: adapt ctest results for twister
When we have skips in ctest, the overall result should not be marked as
a SKIP unless all tests have been skipped. If we have passing tests,
mark the test as PASS. Any failures/errors obviously will fail the
tests.

Also pass the skip reason from ctest to twister to give a hint about
what is going on in case of skips.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2025-06-19 14:04:18 +02:00
Anas Nashif
c511b16fca twister: remove useless . at end of message
No need to have a period here.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2025-06-19 14:04:18 +02:00
Joakim Andersson
e5093f41b2 drivers: flash: Fix timeout handling in STM32 flash driver
Fix timeout error that can occur in rare case.
When the thread writing to flash is pre-emptive it can be scheduled
out after reading the status register, but before checking if timeout
has expired. In this case it will report timeout without re-checking
the status register.

When writing a lot to flash, for example a firmware update process
then this situation is very likely to occur.

Signed-off-by: Joakim Andersson <joerchan@gmail.com>
2025-06-19 14:02:32 +02:00
Fabrice DJIATSA
4866cfcc9d dts: arm: st: l5: update dtsi file with fdcan node
add FDCAN1 node in l5 dtsi file.

stm32l5 have same ip with stm32u5.

Signed-off-by: Fabrice DJIATSA <fabrice.djiatsa-ext@st.com>
2025-06-19 14:02:07 +02:00
Fabrice DJIATSA
67c628d025 dts: arm: st: l5: add stm32l552xc dtsi file
This dts include file is for certain stm32 boards
such as the stm32l552zc,which have a memory size
of 256KB for both flash and RAM peripherals.

Signed-off-by: Fabrice DJIATSA <fabrice.djiatsa-ext@st.com>
2025-06-19 14:02:07 +02:00
Benjamin Cabé
45920741dc drivers: adc: max1125x: fix typo in GPIO config
Corrected the property assignment for gpo0_enable.

Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
2025-06-19 14:01:31 +02:00
Benjamin Cabé
6c4ed097ff drivers: pwm: Fix priority handling for Renesas RA
Fixed a typo causing interrupt priority from DT to be ignored.

Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
2025-06-19 14:00:21 +02:00
Luca Burelli
741c5b5a98 llext: rework debug code in llext_link
This removes 'return' statements affecting code flow from debug code in
llext_link(). Also, all valid relocations are tried before returning an
error, so that the user can see all the errors (most likely missing
symbols) at once.

Signed-off-by: Luca Burelli <l.burelli@arduino.cc>
2025-06-19 14:00:11 +02:00
Guennadi Liakhovetski
a3089c1ffc llext: xtensa: strip the .xtensa.info section
.xtensa.info section isn't large so it was ignored in the beginning,
but its contents can differ depending on the build platform even if
the sources and the toolchain are the same. Strip the section to
restore binary reproducibility.

Signed-off-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
2025-06-19 13:59:15 +02:00
Henrik Brix Andersen
966ef0fefd doc: develop: optimizations: tools: use latest puncover release
Update the documentation to recommend installing the latest puncover
release publiced to the Python Package Index (PyPI).

At the time of this commit, the latest release on PyPI is v0.4.2, which
matches the latest release available on the puncover GitHub repo.

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2025-06-19 13:58:40 +02:00
Alain Volmat
74f32fada3 samples: video: capture_to_lvgl: add stm32n6570_dk conf files
Add configuration files for the stm32n6570_dk board.

Signed-off-by: Alain Volmat <alain.volmat@foss.st.com>
2025-06-19 13:57:51 +02:00
Alain Volmat
a558ad25a3 samples: video: capture_to_lvgl: use video_buffer_aligned_alloc
Use video_buffer_aligned_alloc instead of video_buffer_alloc for buffer
allocation in order to be able to enforce required buffer alignment
configured via CONFIG_VIDEO_BUFFER_POOL_ALIGN.

Signed-off-by: Alain Volmat <alain.volmat@foss.st.com>
2025-06-19 13:57:51 +02:00
Alain Volmat
bb5867d07a samples: video: capture: add stm32n6570_dk config files
Add capture sample config files for the stm32n6570_dk board.

Signed-off-by: Alain Volmat <alain.volmat@foss.st.com>
2025-06-19 13:57:51 +02:00
Alain Volmat
78ec02db4b boards: stm32n6570_dk: enable SMH by default for LTDC/VIDEO
By default, enable the SharedMultiHeap allocated buffer on
stm32n6570_dk and enable its usage for LTDC or video buffers.

Signed-off-by: Alain Volmat <alain.volmat@foss.st.com>
2025-06-19 13:57:51 +02:00
Alain Volmat
6274df7a0b soc: st: stm32: stm32n6: set 256 SMH buffer alignment for LTDC
Set the LTDC buffer alignment to 256 in order to avoid an
issue when accessing to PSRAM via XSPI.

Signed-off-by: Alain Volmat <alain.volmat@foss.st.com>
2025-06-19 13:57:51 +02:00
Alain Volmat
d33f579684 soc: st: stm32: set default video buffer align to 16 for DCMIPP
Set the default video buffer alignment constraint to 16 when DCMIPP
is being used.

Signed-off-by: Alain Volmat <alain.volmat@foss.st.com>
2025-06-19 13:57:51 +02:00
Alain Volmat
7640180e7c soc: st: stm32: set default SMH attribute for LTDC/video buffers
The SMH attribute when using the XSPI PSRAM is set to EXTERNAL (2)
within the driver hence set default for both LTDC and video
buffer SMH attribute to 2 if all conditions are validated.

Signed-off-by: Alain Volmat <alain.volmat@foss.st.com>
2025-06-19 13:57:51 +02:00
Alain Volmat
b1e55bd342 display: stm32: ltdc: add SMH buffer alignment config option
Add the CONFIG_STM32_LTDC_FB_SMH_ALIGN option in order to
indicate the alignment required for the buffer allocated via
SMH.

Signed-off-by: Alain Volmat <alain.volmat@foss.st.com>
2025-06-19 13:57:51 +02:00
Alain Volmat
b7f73710b2 memc: stm32_xspi_psram: init shared_multi_heap area
Initialize the whole psram as a shared_multi_heap_area
if SHARED_MULTI_HEAP is enabled.

Signed-off-by: Alain Volmat <alain.volmat@foss.st.com>
2025-06-19 13:57:51 +02:00
Khaoula Bidani
2a623605ab tests: drivers: dac: dac_api: update dac_api test
-add nucleo_u385rg_q to dac_api test

Signed-off-by: Khaoula Bidani <khaoula.bidani-ext@st.com>
2025-06-19 13:57:36 +02:00
Khaoula Bidani
69c2ce0d61 boards: st: add dac node in dts file and update docs
- enable dac in nucleo_u385rg_q
- add dac as new supported interface in docs
- update yaml files

Signed-off-by: Khaoula Bidani <khaoula.bidani-ext@st.com>
2025-06-19 13:57:36 +02:00
Khaoula Bidani
20d4ab149e dts: arm: st: u3: add dac node in dtsi file
all stm32u3 boards have only one and same
dac peripheral.

Signed-off-by: Khaoula Bidani <khaoula.bidani-ext@st.com>
2025-06-19 13:57:36 +02:00
Jamie McCrae
e5f32b812b samples: sysbuild: with_mcuboot: Fix Kconfig setting
Removes a superfluous Kconfig for setting the MCUboot operating
mode as sysbuild does this automatically, adds a comment about why
it is omitted, and then sets it in the correct place

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2025-06-19 13:57:15 +02:00
Benjamin Cabé
043bb58488 doc: ci: Zephyr now requires Python 3.12 or higher
Update getting started guide, release notes, CI actions and
Python version compliance check to use Python 3.12 as
minimum supported version.

Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
2025-06-19 13:56:59 +02:00
Tahsin Mutlugun
b9bfff29f4 doc: arch: semihost: Add Xtensa support
Add information about Xtensa semihosting.

Signed-off-by: Tahsin Mutlugun <Tahsin.Mutlugun@analog.com>
2025-06-19 09:36:42 +02:00
Tahsin Mutlugun
784b3d6ea0 arch: xtensa: Add semihosting support
Add semihosting support for Xtensa architecture.

Existing semihosting instructions are based on ARM, so they are
converted to Xtensa codes before the semihosting call is invoked.

Return codes of read, write and seek calls had to be converted to match
semihosting API definitions.

Signed-off-by: Tahsin Mutlugun <Tahsin.Mutlugun@analog.com>
2025-06-19 09:36:42 +02:00
Tahsin Mutlugun
38d0300035 arch: common: semihost: Move semihost structs into a separate header
Move semihost_x_args structs to include/semihost_types.h so that
semihost implementations can access their elements if needed.

Signed-off-by: Tahsin Mutlugun <Tahsin.Mutlugun@analog.com>
2025-06-19 09:36:42 +02:00
YongWoo Kang
d5098a2a30 boards: nucleo_f411r: fix ram size to 128KB
Nucleo F411RE(STM32F411RET6) is provides 128 Kbytes of SRAM.

Link: https://www.st.com/en/microcontrollers-microprocessors/stm32f411re.html [1]
Link: https://docs.zephyrproject.org/latest/boards/st/nucleo_f411re/doc/index.html [2]

Signed-off-by: YongWoo Kang <kyw0708@kumoh.ac.kr>
2025-06-19 09:36:34 +02:00
Marek Matej
648bfe090c soc: espressif: Support large buffers in custom PSRAM sections
Several subsystems have configuration options that allow large buffers
to be placed in specialized memory sections. When PSRAM is enabled, the
MBEDTLS heap and LVGL heap and buffer can be relocated to custom sections
within the PSRAM segment.

Enabling `CONFIG_ESP_SPIRAM` together with any of the following options:
* `CONFIG_MBEDTLS_HEAP_CUSTOM_SECTION`
* `CONFIG_LV_Z_MEMORY_POOL_CUSTOM_SECTION`
* `CONFIG_LV_Z_VDB_CUSTOM_SECTION`

will place the corresponding buffers into the `.mbedtls_heap`,
`.lvgl_heap`, and `.lvgl_buf` sections, respectively.
If none of these custom section options are enabled, the buffers will
fall back to the `.ext_ram.bss` section.

Signed-off-by: Marek Matej <marek.matej@espressif.com>
2025-06-19 09:36:27 +02:00
Benjamin Cabé
bb983d09bf ci: workflows: remove unsupported Python version from test matrices
Python 3.10 and 3.11 are no longer supported so drop them from the
GitHub Actions test matrices.

Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
2025-06-19 09:36:17 +02:00
Benjamin Cabé
eff39fb70a tests: fs: fat_fs_api: add native_sim to platform_allow
Native sim was inadvertently forgotten from the platform_allow list with
commit 257e56c.
It should be in there as it is an integration platform.

Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
2025-06-19 08:05:14 +02:00
Peter Mitsis
2f2eaf7b6f arch: xtensa: Update arch_user_string_nlen()
When calling device_get_binding(NULL) from userspace, this eventually
funnels down to a call to arch_user_string_nlen() where it tried to
verify that the kernel has access to this address (0x0).  But since
this originates from userspace, we really want to know if this is
accessible from userspace, so using arch_buffer_validate() instead
of xtensa_mem_kernel_has_access() is preferable.

Signed-off-by: Peter Mitsis <peter.mitsis@intel.com>
2025-06-19 00:03:00 +02:00
Peter Mitsis
dde9462666 arch: tweak xtensa_mem_kernel_has_access() API
Adds 'const' to address pointer as its memory contents
do not change.

Signed-off-by: Peter Mitsis <peter.mitsis@intel.com>
2025-06-19 00:03:00 +02:00
Declan Snyder
84d2f7f4de spi_nxp_lpspi: Fix extra byte sent on v1 lpspi
This stupid errata will not leave me alone, here is another bandaid to
deal with an issue where an extra byte was being sent on version 1
LPSPIs due to the algorithm of filling NOPs when only RX is left was not
expecting the situation where the LPSPI actually consumed everything
from the fifo but is not sending it due to this ridiculous stalling errata.

Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
2025-06-18 17:51:19 -04:00
Declan Snyder
f6a9a1f3bc spi_nxp_lpspi: Fix unit of buf_len in fill_tx_fifo
The buf_len parameter of lpspi_fill_tx_fifo is supposed to be bytes, so
we do not need to convert it. This could cause an issue if the end of
the buffer is less bytes than the word size.

Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
2025-06-18 17:51:19 -04:00
Declan Snyder
e9d964f628 spi_nxp_lpspi: Fix fifo fill logic
Fixing some issues with the TX fifo fill logic in two places:

First in the normal fill function, it didn't take into account a
situation where the TX fifo is already partially filled. This currently
doesn't cause a problem because the driver is written in a way that the
watermark is always 0 for TDF, but in case the watermark were anything
else it would cause a problem.

Second, when filling the TX fifo with NOPS in order to clock the rest of
the RX in from the bus, the calculation regarding the current TX fifo
length was just wrong and was leading to a bug in some cases where there
was a subtraction underflow and billions of NOPs were being filled.
Also, there could be a problem where a few extra NOPs are put in the TX
fifo if we don't count what we already have in the TX fifo, so fixing
that as well.

Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
2025-06-18 17:51:19 -04:00
Declan Snyder
7aa0778901 spi_nxp_lpspi: Simplify tx ctx update
There is no need to update the tx context in interrupt instead of
directly after the fill, this just makes the code more complex. Also,
the spi context header already handled iterating over buffers so we can
remove that code too.

Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
2025-06-18 17:51:19 -04:00
Declan Snyder
877fa975cc spi_nxp_lpspi: Remove MCUX branding
Since the LPSPI drivers no long use MCUX at all, remove the MCUX
branding, to avoid confusion. In the future if an implementation uses
the MCUX SDK driver, it should specifically be called by MCUX in the
name.

Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
2025-06-18 17:51:19 -04:00
Declan Snyder
2aad9ebb78 spi_nxp_lpspi: Remove call to MasterInit
For optimization purpose, remove calls to SDK. Since we know exactly
what we want, this results in smaller code size.

Also, this code calculates the SCK parameters more efficiently than the
SDK driver did it by using a binary (instead of linear) search.

Lastly, remove call to LPSPI_Reset in the init call and replace with
native driver code, and remove inclusion of SDK header.

Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
2025-06-18 17:51:19 -04:00