The hawkBit shell is already enabled in the
prj.conf, so there is no need for a seperate
testcase.
Signed-off-by: Fin Maaß <f.maass@vogl-electronic.com>
Don't overwrite the server address and port
with the Kconfig default, when the hawkBit
shell is activated. The shell can also be used
to set it and we don't want to overwrite that
value on reboot.
Signed-off-by: Fin Maaß <f.maass@vogl-electronic.com>
If SYS_CLOCK_EXISTS is not enabled, then the SYS_CLOCK_HW_CYCLES_PER_SEC
still gets created, but with no value. This causes the code generation
in misc/generated/CMakeLists.txt to create an empty assembly macro:
`.equ CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC,`
which then causes a build error.
Disable SYS_CLOCK_HW_CYCLES_PER_SEC entirely when SYS_CLOCK_EXISTS is
disabled to fix this.
This is a follow-up to 03f46db859.
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
This is a follow-up to commit a068709171.
As the SPIM_REQUESTS_CLOCK() macro changed the type of its parameter,
all of the calls to it need to be updated accordingly. Also the call to
DT_NODELABEL() needs to be removed from that macro as DT_CLOCKS_CTLR()
already returns a node identifier.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Update the HW models module to:
9eb489fdcde23d4f69ded78bca872bfc31b5ee79
Including the following:
9eb489f CLOCK (54): Add test interfaces to control duration and to fail
tuning
787d8c8 CLOCK (52,53): Add test interface control start duration
8bd3a5f NHW_54_AAR_CCM_ECB: Do not inform about the ECB being already
stopped
ca72ca7 RADIO: Add CodedPhy to old comment mentioning what is supported
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
The documentation did not state clearly that any zero-latency IRQ must
also be declared as a direct ISR. This is critical because failure to do
so may cause race conditions between the ZLI and regular ISRs when
executing the preable/postamble code in regular interrupts.
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
The circular DMA sample incorrectly configured channel 3 for the
NUCLEO-C031C6 board, but this MCU has only 3 channels (0 - 2).
Fixed by changing to channel 2.
Signed-off-by: Richard Skriwanek <richy@fnc.at>
The period is the reload register plus 1. Adjust. Note that the
earlier code handles the cases where the pulse time is zero or equal
to the period.
Signed-off-by: Michael Hope <michaelh@juju.nz>
This commit adds power management support to the UART driver for npck3
series chip.
Signed-off-by: Alvis Sun <yfsun@nuvoton.com>
Signed-off-by: Tom Chang <CHChang19@nuvoton.com>
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
This commit adds serial driver support for npck3.
Signed-off-by: Alvis Sun <yfsun@nuvoton.com>
Signed-off-by: Tom Chang <CHChang19@nuvoton.com>
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
The gpio_smartbond driver incorrectly uses the static
PM_DEVICE_DEFINE() and PM_DEVICE_GET() macros when creating a driver
instance from a devicetree instance number.
Update to use PM_DEVICE_DT_INST_DEFINE() and
PM_DEVICE_DT_INST_GET() macros.
Signed-off-by: Bjarki Arge Andreasen <bjarki.andreasen@nordicsemi.no>
The newly added mcos node contains two childreen `mco1` and `mco2` that can
be used to output different clocks on the MCO pins of the stm32g0
microcontrollers.
Signed-off-by: Andreas Schuster <andreas.schuster@schuam.de>
Adds macros to be able to use the microcontroller clock output (MCO) on the
STM32G0 microcontroller.
Signed-off-by: Andreas Schuster <andreas.schuster@schuam.de>
This fixes the invocation of the 'elfconvert' and 'slid_inject' commands
in the `add_llext_target` function by ensuring that the arguments are
expanded correctly before passing them to the shell.
Signed-off-by: Luca Burelli <l.burelli@arduino.cc>
"-fshort-enums" changes the ABI. It's not enabled for gcc, so it's not
clear why it's enabled for clang (only ARM) and armclang, other than it
looks like some users of these toolchains may be linking against code
that is compiled with "-fshort-enums".
As an example, when compiling with clang, CONFIG_LTO, and a toolchain
built without "-fshort-enums", the linker warns:
ld.lld: error: linking module flags 'min_enum_size': IDs have
conflicting values in
'/usr/armv7m-cros-eabi/usr/lib/libc++_static.a(string.cpp.o at 784090)'
and 'ld-temp.o'
Signed-off-by: Tom Hughes <tomhughes@chromium.org>
Added secure proxy mailbox driver for supported devices using
the binding ti,secure-proxy. This is used to communicate with
a device manager running on a separate core via a secure proxy
mailbox for TI K3 devices. Required for enabling TISCI layer
communication.
Refer: https://software-dl.ti.com/tisci/esd/latest/1_intro/TISCI.html
Tested on MAIN_CORTEX_R5_0 on AM243x EVM.
Refer:https://www.ti.com/lit/pdf/spruim2
Co-developed-by: Vaishnav Achath <vaishnav.a@ti.com>
Signed-off-by: Dave Joseph <d-joseph@ti.com>
Rather than hardcoding the human readable full names of the archs in the
board catalog, we now retrieve them dynamically from the archs.yml file.
Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
Allow to specify a human readable full name for archs that can then be
leveraged e.g. in the documentation.
Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
speed up the various list_*.py scripts by means of caching the
pykwalify core object so that schemas don't get unnecessarily
processed multiple times.
Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
Several drivers checked for the presense and availability of data cache
through Kconfig symbol. This is supported according to the current
documentation, but the symbol DCACHE masks two types of cache devices: arch
and external caches. The latter is present on some Cortex-M33 chips, like
the STM32U5xx. The external dcache is bypassed when accessing internal
SRAM and only used for external memories.
In commit a2dd232410 ("drivers: adc: stm32: dma support") the rationale
for gating dcache for adc_stm32 behind STM32H7X is only hinted at, but
reason seems to be that it was the only SOC the change was tested on. The
SOC configures DCACHE=y so it is most likely safe to swap the SOC gate for
DCACHE.
The DCACHE ifdefs are now hidden inside the shared stm32_buf_in_nocache()
implementation.
Signed-off-by: Henrik Lindblom <henrik.lindblom@vaisala.com>
Updates the heap code to ensure that when converting the requested
number of bytes to chunks, we do not return a value that exceeds
the number of chunks in the heap.
Fixes#90306
Signed-off-by: Peter Mitsis <peter.mitsis@intel.com>
When the device was suspended and the pin level changed during
that time, the pin level of course isn't updated in the pins cb_data.
Once the device is resumed, this leads to potentially having
a wrong value in the pin state data leading to swallowing the first
event due to comparing the stored level vs. the new level before
reporting.
Also added some `const`s and deleted an unused struct element.
Signed-off-by: Marcel Krüger <marcel@mkgr.dev>
'timings' is an array of 'struct i2c_config_timing' (3 x uint32_t).
'i2c_timings_##index' is an array of uint32_t (hence the cast when it
is assigned to 'timings'). Therefore 'ARRAY_SIZE(i2c_timings_##index)' is
off by a factor 3 when used for n_timings.
Signed-off-by: Abderrahmane JARMOUNI <git@jarmouni.me>
When running naive sim builds using clang, respect user passed
SYSROOT_DIR values. Additionally, allow overriding the archive tool
when calling Make for the native simulator.
Add the sysroot (if available) to the native_simulator target and
TOOLCHAIN_C_FLAGS and TOOLCHAIN_LD_FLAGS. Additionally pass CMAKE_AR
to NSI_AR.
Signed-off-by: Yuval Peress <peress@google.com>
Simplify the logic for the `uart_stm32_cfg2ll_databits` function
regarding `LL_USART_DATAWIDTH_9B` being defined or not.
Signed-off-by: Yishai Jaffe <yishai1999@gmail.com>
This shield includes a drv8426 stepper driver and a mcp4726 dac for
current control. Note that the micro-step pins are controlled by
physical switches and are thus not available in Zephyr.
Signed-off-by: Jan Behrens <jan.behrens@navimatix.de>
This shield includes a ti drv8424 stepper driver that is controlled
via gpio. Some of these pins are only available via the tca9538a gpio
expander on the shield.
Signed-off-by: Jan Behrens <jan.behrens@navimatix.de>
Fix the flash size to 64KB for the stm32H7RS series.
Restore the get_size API function for that series.
This is a specificity of this stm32 mcu (RefMan RM0477).
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Add configuration for the STM32N6 DCMIPP driver which currently
requires to have the sensor pixel format and resolutions set via
KConfig
Signed-off-by: Alain Volmat <alain.volmat@foss.st.com>
