Commit graph

18 commits

Author SHA1 Message Date
Gerard Marull-Paretas
76f0d72e5d drivers: pwm: stm32: add support for polarity
Add support for the polarity flag in the STM32 PWM driver.

STM32 boards using PWM have been updated accordingly.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2020-06-19 15:18:50 +02:00
Kumar Gala
7a15afc1d4 drivers: flash: replace DT_FLASH_DEV_NAME with DT macro
Replace DT_FLASH_DEV_NAME with DT_CHOSEN_ZEPHYR_FLASH_CONTROLLER_LABEL.
We now set zephyr,flash-controller in the chosen node of the device
tree to the flash controller device.

NOTE: For a SoCs with on die flash, this points to the controller and
      not the 'soc-nv-flash' node.  Typically the controller is the
      parent of the 'soc-nv-flash' node).

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-04-27 18:43:20 -05:00
Erwan Gouriou
c2833af1af dts: stm32: Add generic compatible for flash controller
Add "st,stm32-flash-controller" as stm32 generic flash controller.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2020-04-20 03:51:36 -05:00
Erwan Gouriou
d3664b063e drivers/spi: stm32: Modify use of "st,stm32-spi-fifo" compatible
On stm32 spi devices, there are 2 main IP variants, with and w/o
fifo. Fifo is not really used today, but still there is some
additional code handling fifo. Today this code is protected under
Kconfig symbol SPI_STM32_HAS_FIFO.
This code carries redundant information vs dedicated compatible
"st,stm32-spi-fifo", which is provided as unique driver compatible
for devices supporting this IP as opposed to use of "st,stm32-spi"
when fifo is not supported.

Having these 2 compatibles defined exclusively is not convenient for
migration to DT_INST as DT_INST macros contain compatible string and
hence it cannot be used to provide common compatible code for devices
defining different compatibles.

Based on these observations, review stm32 spi devices compatible
declarations. Devices supporting fifo will now declare both
compatibles, as proposed by dt spec: "[compatible] property value
consists of a concatenated list of null terminated strings,
from most specific to most general". Hence field will now be:
"st,stm32-spi-fifo", "st,stm32-spi"

This way, fifo enabled stm32 spi devices will generate both:
DT_INST_STM32_SPI_FOO and DT_INST_STM32_SPI_FIFO_FOO
As well as:
DT_COMPAT_ST_STM32_SPI and DT_COMPAT_ST_STM32_SPI_FIFO
So, DT_INST_STM32_SPI_FOO could be used for device initialization.
Also DT_COMPAT_ST_STM32_SPI_FIFO could be used for FIFO handling
code inside driver. Hence use it to replace Kconfig symbol
SPI_STM32_HAS_FIFO.


Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2020-03-17 11:03:10 -06:00
Francois Ramu
82799d2ae4 dts: bindings: dma controller supports mem2mem transfer
This checks if the DMA controller supports or not
the memory-to-memory transfers. For DMA Version1,
in the stm32f2xx, stm32f4xx, stm32f7xx series,
only DMA instance 2 is able to transfer mem-to-mem.
For other series, with DMA Version2, there is no such a limitation.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2020-01-28 12:58:44 -06:00
Erwan Gouriou
4dc303b99b dts: stm32: Remove pinctrl definitions
dts pinctrl definitions were pushed in tree without the code
available to deal with it. They have been kept waiting for the
code, but this is taking much more time than initially thought.

So in current zephyr tree, for all STM32 boards, we have pinmux.c
file which is used to configure pins and these files that are
basically no-op. This situation is creating a lot of confusion
especially to new comers, and create useless maintenance effort.

Remove these files for now.
When zephyr will ready to use them, this commit could be reverted.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2019-11-06 18:26:04 +01:00
Song Qiang
ff3889a051 dt-bindings: arm: st: add dts support for DMA of some series of stm32
Add dts support for f0/f1/f2/f3/f4/f7/l0/l4 series STM32.

Signed-off-by: Song Qiang <songqiang1304521@gmail.com>
2019-11-06 14:14:39 +01:00
Erwan Gouriou
a0da140a2a dt: stm32f0: Fix clock bus for SPI1 and few timers
There is no APB2 bus on stm32f0 series.
What could be found as APB2 in CMSIS files is actually
second group of APB (A.K.A APB1_2).
Fix nodes that are using this wrong reference accorss the series.

Fixes #20310

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2019-11-05 14:55:21 -06:00
Ioannis Konstantelias
1db2685b57 dts: stm32: Add WWDG in STM32 dtsi files
Added System WWDG support for STM32 devices.

Signed-off-by: Ioannis Konstantelias <ikonstadel@gmail.com>
2019-09-11 22:13:36 -05:00
Kumar Gala
e8524965c5 dts: Add io-channel details to ADC nodes/bindings
Update the ADC bindings to include #io-channel-cells and update the
related dts files to set #io-channel-cells.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2019-09-07 10:25:02 -05:00
Kumar Gala
b52b1b2222 dts: arm: Remove device_type = "memory" from SRAM nodes
The true mmio-sram nodes should not have had a 'device_type' property.
Remove it from the cases that we clearly know are SRAM.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2019-08-06 08:59:22 -04:00
Kumar Gala
12589d6b64 dts: remove unused clock-controllers property
The 'clock-controllers' property isn't specified and not used for any
generation.  Lets remove it.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2019-06-28 07:23:31 -05:00
Song Qiang
da56cad3a4 dts: arm: stm32: add dts support for ADC1 of stm32
All series of stm32 have at least one ADC instance and this commit adds
one ADC node to the root dts file of each soc, and also adds fixing up
mappings to them.

Signed-off-by: Song Qiang <songqiang1304521@gmail.com>
2019-05-07 23:15:58 -04:00
Yong Jin
8515b841a1 driver: watchdog: stm32: rename the independent watchdog name
rename the name idwg to iwdg.

Signed-off-by: Yong Jin <jinyong.iot@foxmail.com>
2019-04-26 03:35:09 -07:00
Erwan Gouriou
12166b61ee dts: stm32: Add watchdog nodes to STM32 dtsi files
Provide watchdog node definition to stm32 dtsi files to enable
watchdog configuration by device tree.
Add matching st,stm32-watchdog binding.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2019-02-01 19:16:59 -05:00
Erwan Gouriou
f6b014e6dd dts/arm: stm32f0: AHB2 but is not supported
AHB2 bus does not exist on STM32F0 series, replace with AHB1.

Fixes #11904

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2018-12-07 11:31:48 -05:00
Kumar Gala
944f3a90ec dts: Update STM32 PWM device tree binding/nodes for #pwm-cells
Add #pwm-cells to the STM32 PWM binding and dts files.  This is to
support have a pwms clients work properly.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2018-11-10 10:42:51 -06:00
Kumar Gala
ebd0ff9f28 dts: arm: st: Remove use of CONFIG_SOC_* from STM32 F0 dts files
To move forward and remove use of Kconfig in dts files lets just create
SoC specific dtsi files that the boards can include.  We also seperate
out the F0 dtsi files into their own dir.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2018-09-27 08:09:42 -05:00
Renamed from dts/arm/st/stm32f0.dtsi (Browse further)