Use `DT_REG_ADDR_BY_NAME` and `DT_REG_SIZE_BY_NAME` to access register
properties from dts.
Signed-off-by: Michal Sieron <msieron@internships.antmicro.com>
Adds addresses and names for individual CSR registers to device tree.
This way liteuart driver no longer depends on CSR data width being 8
bits.
Also when register names or their number changes, then overlay generated
by LiteX will be incompatible with one defined here.
This should make finding breaking changes easier.
I also appended `_ADDR` suffix to defines, to distinguish them from
normal values like `LITEETH_EV_RX`.
Signed-off-by: Michal Sieron <msieron@internships.antmicro.com>
Adds addresses and names for individual CSR registers to device tree.
This way liteuart driver no longer depends on CSR data width being 8
bits.
Also when register names or their number changes, then overlay generated
by LiteX will be incompatible with one defined here.
This should make finding breaking changes easier.
I also appended `_ADDR` suffix to defines, to distinguish them from
normal values like `UART_EX_TX`.
Signed-off-by: Michal Sieron <msieron@internships.antmicro.com>
Adds addresses and names for individual CSR registers to device tree.
This way timer driver no longer depends on CSR data width being 8 bits.
Also when register names their number changes, then overlay generated by
LiteX will be incompatible with one defined here.
This should make finding breaking changes easier.
I also updated register names to those used in current LiteX and
appended `_ADDR` suffix to defines which lacked them.
Because register `total` was renamed to `value` and `update_total` to
`update_value` I updated variables accordingly as well.
Signed-off-by: Michal Sieron <msieron@internships.antmicro.com>
Add Kconfig to limit the Primary Advertising Interval and
Periodic Advertising Interval maximum supported values in
the Controller implementation.
Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
Currently we use incorrect memory layout for SMP boards as
we put data (which need do be accessible from all cores) to
DCCM which is private for each CPU core.
This works for nSIM which doesn't simulate CCMs (as we don't pass
corresponding nSIM options for SMP configurations) however
it won't work if we run that code on real HW (we want to achieve
that nSIM configurations are also runnable on HAPS - FPGA platform).
Let's fix that issue by using DDR instead of CCMs for SMP
configurations (nsim_hs_smp and nsim_hs6x_smp).
While I'm at it - switch UP HS6x configuration (nsim_hs6x)
for DDR usage instead of CCMs - to make that configuration closer
to the HAPS config we have.
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Evgeniy Paltsev <PaltsevEvgeniy@gmail.com>
Host might send command or data immediately after EC read the
KBC input buffer (IBF gets cleared).
This change make sure EC won't get wrong event type in IBF ISR.
Signed-off-by: Dino Li <Dino.Li@ite.com.tw>
The bt_audio_stream_qos function checked if stream->ep was
NULL before checking if the stream were even valid for this
QoS procedure.
Signed-off-by: Emil Gydesen <emil.gydesen@nordicsemi.no>
When create the CIG for a unicast group, we did not
verify whether stream->iso was NULL before attempting
to use that to create the CIG.
Signed-off-by: Emil Gydesen <emil.gydesen@nordicsemi.no>
Socket offloading has been in the tree for a while and improved a lot
over time (from a simple define-based API override to a complex
vtable-based solution, supporting mutliple offloaded interfaces). As the
feature is heavily used by certain vendors (Nordic and its nRF Connect
SDK), I propose to move it out of experimental phase.
Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
In order to bring consistency in-tree, migrate all samples to the use
the new prefix <zephyr/...>. Note that the conversion has been scripted:
```python
from pathlib import Path
import re
EXTENSIONS = ("c", "h", "cpp", "rst")
for p in Path(".").glob("samples/**/*"):
if not p.is_file() or p.suffix and p.suffix[1:] not in EXTENSIONS:
continue
content = ""
with open(p) as f:
for line in f:
m = re.match(r"^(.*)#include <(.*)>(.*)$", line)
if (m and
not m.group(2).startswith("zephyr/") and
(Path(".") / "include" / "zephyr" / m.group(2)).exists()):
content += (
m.group(1) +
"#include <zephyr/" + m.group(2) +">" +
m.group(3) + "\n"
)
else:
content += line
with open(p, "w") as f:
f.write(content)
```
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Sometimes the remote ssh server is not on default port. This patch makes
cavstwist.sh accept an ssh port in the host address: host[:port].
Signed-off-by: Ederson de Souza <ederson.desouza@intel.com>
On non Linux system, the compilation failed because the main
CMake did not pass the CMAKE_SYSTEM_NAME to the bootloader's
CMake. This caused the variable to be empty, instead of being
"Generic".
Signed-off-by: Yonatan Schachter <yonatan.schachter@gmail.com>
The close function on a TCP socket can return before the complete
socket has been closed, as there might be packets still in flight.
Add a wait at the end of the test so we are sure all sockets have
been closed before the next test starts.
Signed-off-by: Sjors Hettinga <s.a.hettinga@gmail.com>
The close function on a TCP socket can return before the complete
socket has been closed, as there might be packets still in flight.
Modify the test to wait briefly (less then the retransmit time), before
counting the number of still open net_contexts. This makes the test
outcome not dependent on the scheduling order of the different tasks.
Secondly the test actually checks the number of open contexts to be zero
so there is no need to wait for any open contexts to still close.
Signed-off-by: Sjors Hettinga <s.a.hettinga@gmail.com>
When there is no response from the server, a client side connect
should return a ETIMEOUT. This tests breaks the connection and validates
this behavior.
Signed-off-by: Sjors Hettinga <s.a.hettinga@gmail.com>
There was missing kconfig option that enables refactored LLCPs.
That caused build error in Direction Finding connection_cte_tx_params.
Signed-off-by: Piotr Pryga <piotr.pryga@nordicsemi.no>
The ll_scan_set::per_sync was renamed to ll_scan_set::periodic.
Direction finding connectionless_cte_rx test didn't build.
The commit fixes the issue.
Signed-off-by: Piotr Pryga <piotr.pryga@nordicsemi.no>
None of the common DF configs should depend on using BT_LL_SW_SPLIT.
Added dependencies to it where this was the case.
Signed-off-by: Rubin Gerritsen <rubin.gerritsen@nordicsemi.no>
These configurations are tighlty coupled to the implementation,
so these should be hidden when not using BT_LL_SW_SPLIT.
Signed-off-by: Rubin Gerritsen <rubin.gerritsen@nordicsemi.no>
Some controllers may support only TXing or RXing CTE.
As all DF features are guarded by BT_CTLR_DF, we need to ensure
that it is possible to select those when only TX or RX is available.
Signed-off-by: Rubin Gerritsen <rubin.gerritsen@nordicsemi.no>
Move period and pulse computation to right before
the channel enable code.
That fixes the inability to disable the channel by
providing the period of 0.
Signed-off-by: Georgij Cernysiov <geo.cgv@gmail.com>
Add support for the fdcan peripheral to the stm32u5 series device tree
include. This can be applied here since (at present) all of the stm32u5
series MCUs have an FDCAN peripheral.
Signed-off-by: Peter Maxwell Warasila <madmaxwell@soundcomesout.com>
The STM32u% series of processors has a unique set of clock sources for
the FDCAN peripheral. This brings the selection in line with the
existing can_stm32fd clock selection Kconfigs.
This change was tested on a proprietary board using the STM32U5 series
which exposes the CAN pins of the SOC using a transciever on a live CAN
bus as well as on the nucleo_g474re board from ST in loopback mode.
HSE and PLL1Q tests run and all passed.
PLL2P is not currently supported by the clock drivers for STM32U5, and
as such is currently untested. When this support is added, the driver
should be able to use this clock without issue.
When changes from #42097 are merged this fix should be deprecated in
favor of using the methods outlined there.
Signed-off-by: Peter Maxwell Warasila <madmaxwell@soundcomesout.com>
Update the documentation to inform about /omit-if-no-ref/ when using the
node-based approach.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The file with pinctrl nodes has been updated to
st/g0/stm32g0b1r(b-c-e)tx-pinctrl.dtsi for this board.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
All DT nodes end up being part of the generated 'devicetree_unfixed.h'
header, wether they are referenced or not. The number of entries in that
file can grow quickly when using pre-generated pinctrl nodes.
Considering <devicetree.h> (file uncluding devicetree_unfixed.h) is used
in lots of places nowaday, not using /omit-if-no-ref/ can lead to
increased build times.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
When in_len is 0 then length is calculated from the package and
assignment was missing.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
With the new <zephyr/> include prefix, the "types" header ended up being
located in <zephyr/zephyr/types.h>, ie weird. Code that hasn't migrated
to <zephyr/zephyr/types.h> (no occurences in tree) will be automatically
prepared for the removal of the legacy include path. Most applications
will not be impacted as both include and include/zephyr are now in the
include path, and they'll be already prepared for the future.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
When legacy mode is enabled, Zephyr includes both include/ and
include/zephyr. Allow the zefi.py script to accept multiple include
paths to cover this scenario.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Allow mwdt toolchain usage for 2 cores HSDK configuration
as we have it for 4 cores configuration.
Signed-off-by: Evgeniy Paltsev <PaltsevEvgeniy@gmail.com>
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Set the PCR[MUX] field to kPORT_MuxAsGpio as part of configuring a GPIO
pin. This removes the need to explicitly call pinmux_pin_set() in board
code.
Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
The OpenISA RV32M1 pinctrl groups need a dummy pinctrl node to populate
with pinctrl options at the board level.
Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
