Commit graph

112893 commits

Author SHA1 Message Date
Jilay Pandya
6bfea730b1 doc: migration-guide: 4.2: add migration guide entry for enable
- Add migration guide entry for enable->enable/disable function
- Add stepper_disable to stepper.rst

Signed-off-by: Jilay Pandya <jilay.pandya@outlook.com>
2025-04-03 00:03:29 +02:00
Jilay Pandya
d18f49132c drivers: stepper: refactor enable(dev,flag) to enable & disable
refactoring enable function into enable and disable increasing readability
and increasing coherence with other stepper apis in terms of
nomenclature

Signed-off-by: Jilay Pandya <jilay.pandya@outlook.com>
2025-04-03 00:03:29 +02:00
Bjarki Arge Andreasen
3b4383b61c samples: boards: nordic: add audiopll
Add audiopll to sample.

Signed-off-by: Bjarki Arge Andreasen <bjarki.andreasen@nordicsemi.no>
2025-04-03 00:03:14 +02:00
Bjarki Arge Andreasen
bfd200bdb4 drivers: clock_control: add nrfs_audiopll clock driver
Add NRFS AudioPLL clock control device driver.

Signed-off-by: Bjarki Arge Andreasen <bjarki.andreasen@nordicsemi.no>
2025-04-03 00:03:14 +02:00
Bjarki Arge Andreasen
d88fa8dd6c dts: common: nordic: nrf54h20: add audiopll node
Add audiopll node to nrf54h20.

Signed-off-by: Bjarki Arge Andreasen <bjarki.andreasen@nordicsemi.no>
2025-04-03 00:03:14 +02:00
Bjarki Arge Andreasen
791db47d51 dts: bindings: clock: add nordic,nrfs-audiopll
Introduce Nordic NRFS AudioPLL bindings.

Signed-off-by: Bjarki Arge Andreasen <bjarki.andreasen@nordicsemi.no>
2025-04-03 00:03:14 +02:00
William Tambe
7c2848486c samples: smp: pi: use K_SEM_DEFINE() for simplicity
This change uses K_SEM_DEFINE() instead of calling k_sem_init()
and having to check for its return value.

It makes the smp pi sample a bit simpler to go through.

Signed-off-by: William Tambe <williamt@cadence.com>
2025-04-02 19:03:22 +02:00
Marcin Szymczyk
5a4f0dcd95 boards: nordic: use JLink device for FLPR on nRF54L15 SoC
JLink now supports custom target for nRF54L15 FLPR.

Signed-off-by: Marcin Szymczyk <marcin.szymczyk@nordicsemi.no>
2025-04-02 19:03:07 +02:00
Hao Luo
8b60fa834c drivers: mfd: Add ambiq iom binding file
This commit adds ambiq iom binding file to consolidate
spi and i2c that share the same IO Master module on
Apollo MCUs

Signed-off-by: Hao Luo <hluo@ambiq.com>
2025-04-02 19:02:56 +02:00
Luca Burelli
652ee91b7f llext-edk: fix BOARD_TARGET variable generation to be Zephyr-compatible
The board revision is not part of the NORMALIZED_BOARD_TARGET variable
as composed by Zephyr, so it must also not be used in the EDK exported
value to avoid mismatches. The revision is exported as a separate
variable, so it can still be used to differentiate between board
revisions.

Signed-off-by: Luca Burelli <l.burelli@arduino.cc>
2025-04-02 19:02:45 +02:00
Raffael Rostagno
fa6a9aef7b drivers: dma: esp32: Update for interrupt allocator
Update driver for unified interrupt allocator (Xtensa/RISCV),
to allow using shared interrupts.

Signed-off-by: Raffael Rostagno <raffael.rostagno@espressif.com>
2025-04-02 19:02:27 +02:00
Raffael Rostagno
4b8dc5f3ff drivers: esp32: Update for shared intc
Drivers update to use shared interrupt allocator for Xtensa
and RISCV devices.

Signed-off-by: Raffael Rostagno <raffael.rostagno@espressif.com>
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
2025-04-02 19:02:27 +02:00
Raffael Rostagno
034c0cb977 drivers: intc: esp32: Shared allocator for Xtensa and RISCV
Update interrupt allocator to use the same driver for both
Xtensa and RISCV devices.

Signed-off-by: Raffael Rostagno <raffael.rostagno@espressif.com>
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
2025-04-02 19:02:27 +02:00
Raffael Rostagno
eb606a8e7d soc: esp32: Update IRQ config for shared allocator
Update IRQ handling related files to unify interrupt controller
between Xtensa and RISCV devices.

Signed-off-by: Raffael Rostagno <raffael.rostagno@espressif.com>
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
2025-04-02 19:02:27 +02:00
Raffael Rostagno
3e8b246618 west.yml: hal_espressif: Update for shared intc
Shared allocator for Xtensa and RISCV

Signed-off-by: Raffael Rostagno <raffael.rostagno@espressif.com>
2025-04-02 19:02:27 +02:00
Adrien Ricciardi
c53fb67f56 task_wdt: Add suspend and resume API functions
The goal is to be able to use the Task Watchdog on a system that is also
using power management to reach low-power modes. In some low-power modes,
the watchdog channels can't be feed anymore.

The task_wdt_suspend() function allows to prepare the Task Watchdog for
a system low-power mode, in which the hardware watchdog (if enabled) is
also suspended.

The task_wdt_resume() function will reschedule the internal timer that
manages the channels, feed all channels and also the hardware watchdog.
Thus, the application is good to go and has enough time to feed the
channels by itself.

Signed-off-by: Adrien Ricciardi <aricciardi@baylibre.com>
2025-04-02 13:05:14 +02:00
Adrien Ricciardi
6ca9bffe48 task_wdt: Kconfig: Allow to pause the hardware watchdog in sleep
The hardware watchdog optionally used by the Task Watchdog can support
being automatically paused when the system enters a sleep power state.

Add a Kconfig flag to enable such feature.

Signed-off-by: Adrien Ricciardi <aricciardi@baylibre.com>
2025-04-02 13:05:14 +02:00
Fin Maaß
36e830f446 drivers: ethernet: stm32: remove hal api v1 ptp code
Only STM32F1X and STM32F2X are using the hal api v1,
both of these soc don't support ptp, so ptp support
for hal api v1 can be dropped.

Signed-off-by: Fin Maaß <f.maass@vogl-electronic.com>
2025-04-02 13:04:48 +02:00
John Barbero Unenge
64fe9344e1 driver: flash: mcux_flexspi_nor: Fix for is25lpxxxd chips
IS25LPXXXD uses the same jedec-id as IS25LPXXX, but the latter has
an extended read register, similar to IS25WPXXX. This change will
attempt to read the extended read register to determine what the
appropriate initialization value for read register should be.

Signed-off-by: John Barbero Unenge <git@lsrkttn.com>
2025-04-02 13:04:38 +02:00
Seppo Ingalsuo
d457a6a5ef Drivers: DAI: Intel: DMIC: Program start symmetrically for PDMx
This change is assumed to fix the random corruption of 4ch
capture for PDM1 channels 3-4 in PTL platform. There are no
solid facts behind this change but assumption that PDMx
controllers are not in sync if the start sequence for PDM1
is further away from PDM0. The PDM0 internal state may be
different from PDM1

The single for loop to handle the CIC and FIR start sequence
is split into two for loops to handle same registers update
tasks symmetrically for all stereo PDM controllers. E.g. two
PDMs for four microphones.

First loop programs the CIC_CONTROL and MIC_CONTROL registers
of the PDMx controllers. These features belong to the CIC block
in DMIC IP. Second loop programs the FIR_CONTROL registers of
the PDMx controllers.

In a stress test of 100 times repeated commands:

arecord -Dhw:0,6 -fS32_LE -r48000 -c4 -d 10 dmic_test_1.wav; \
sleep 0.5; \
arecord -Dhw:0,6 -fS32_LE -r48000 -c4 -d 10 dmic_test_2.wav; \
sleep 1

The corruption occurrence with xt-clang build was e.g. 87/200
fails in one of wav files giving 43.5% occurrence. The test was
done with Zephyr commit fe29c40a93
("llext: add inspection API test suite").

In a gcc build the occurrence of corruption is lower, around 6%
but it is seen that the channels 3-4 pdm1 are swapping randomly.

With this fix the corruption occurred zero times in xt-clang
and gcc builds with same 100 repeats.

Signed-off-by: Seppo Ingalsuo <seppo.ingalsuo@linux.intel.com>
2025-04-02 13:04:32 +02:00
Martin Hoff
cb07e991c2 drivers: serial: silabs: introduce pm for silabs eusart
Make use of pm_device_driver_init to perform driver initialization.
Implement PM suspend and resume, which performs the following actions:

* Enables/disables the USART
* Gates the USART clock
* Configures USART pins

Also take PM locks to prevent deep sleep during TX and RX operations.

Signed-off-by: Martin Hoff <martin.hoff@silabs.com>
2025-04-02 13:04:19 +02:00
Martin Hoff
cb9c27e7ad tests: driver: uart: add xg23_rb4210a board overlay
Add xg23_rb4210a board overlay to test asynchronous api with eusart
driver

Signed-off-by: Martin Hoff <martin.hoff@silabs.com>
2025-04-02 13:04:19 +02:00
Martin Hoff
87141ed455 drivers: serial: silabs: introduce asynchronous silabs eusart
Introduce silabs asynchronous eusart with dma support.

Signed-off-by: Martin Hoff <martin.hoff@silabs.com>
2025-04-02 13:04:19 +02:00
Martin Hoff
4ec3405d16 drivers: serial: silabs: replace prefix in silabs eusart driver
Replace prefix from "uart_silabs_eusart" to "eusart" in order to
simplify the code, and make it more readable.

Signed-off-by: Martin Hoff <martin.hoff@silabs.com>
2025-04-02 13:04:19 +02:00
Martin Hoff
a1389541ff drivers: serial: silabs: introduce silabs eusart runtime configure
Introduce runtime configuration API for the silabs eusart driver.

Signed-off-by: Martin Hoff <martin.hoff@silabs.com>
2025-04-02 13:04:19 +02:00
Martin Hoff
02c8d02565 drivers: serial: silabs: harmonize silabs eusart code with silabs usart
Apply code cleaning done in silabs usart driver to silabs eusart driver.

Signed-off-by: Martin Hoff <martin.hoff@silabs.com>
2025-04-02 13:04:19 +02:00
Martin Hoff
6fc53a6ed2 drivers: serial: silabs: split init in silabs eusart driver
Split of uart_silabs_eusart_init function to have better visibility of
initialization.

Signed-off-by: Martin Hoff <martin.hoff@silabs.com>
2025-04-02 13:04:19 +02:00
Martin Hoff
3382b6769d drivers: serial: silabs: correction of silabs eusart code indentation
Apply correct indentation to silabs eusart driver.

Signed-off-by: Martin Hoff <martin.hoff@silabs.com>
2025-04-02 13:04:19 +02:00
TOKITA Hiroshi
bc70d7e101 boards: arduino: uno_r4: Add PWM mapping
Add an `arduino-header-pwm` node to map the PWM channels.

Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
2025-04-02 12:56:06 +02:00
TOKITA Hiroshi
02e9ebfba2 dts: bindings: pwm: Add Arduino PWM nexus mapping
Add `adruino-header-pwm` map node to describe well Arduino PWM
pin configuration.

Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
2025-04-02 12:56:06 +02:00
TOKITA Hiroshi
1ebffbdabb include: zephyr: dt-bindings: gpio: Add arduino-header-r3 defines
To make the pin names of the Arduino header easier to understand,
we will introduce a macro definition for the pin names.

We will use this to update the definition of `arduino_uno_r4`.

Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
2025-04-02 12:56:06 +02:00
Andrej Butok
172811b69c tests: nvs: allow to build & run on real platforms
- Allows to build and run NVS tests on real platforms.
- Enables NVS tests designed for a flash-simulator only when
  built for qemu_x86, mps2_an385 or native_sim targets.

Signed-off-by: Andrej Butok <andrey.butok@nxp.com>
2025-04-02 12:55:33 +02:00
Andrej Butok
a12f71d5e5 tests: littlefs: fix test_fs_mkfs_custom littlefs_init_cfg() fail
Fixes the littleFS test_fs_mkfs_custom test fail
in littlefs_init_cfg(): "erase size must be multiple of write size".
It happens for platforms with erase size < 2*write size (e.g. lpc55s).

Signed-off-by: Andrej Butok <andrey.butok@nxp.com>
2025-04-02 12:55:18 +02:00
Andrej Butok
b477a60a9c tests: littlefs: fix false negative test_lfs_basic
Fixes the false negative littlefs.test_lfs_basic test that can occur
if the small_partition size > 64KB, and for
platforms with CONFIG_FS_LITTLEFS_PROG_SIZE > 64 (e.g. lpc55s, mcxn).

Signed-off-by: Andrej Butok <andrey.butok@nxp.com>
2025-04-02 12:55:12 +02:00
Lyle Zhu
bfbe764cb3 Bluetooth: Classic: Check LK before clearing it
After SSP has been completed and before LK event notification, the
link key may be invalid when handling the ACL disconnection event.

Check `conn->br.link_key` before calling the function
`bt_keys_link_key_clear()` to clear it.

Fixes #87880.

Signed-off-by: Lyle Zhu <lyle.zhu@nxp.com>
2025-04-02 12:54:58 +02:00
Etienne Carriere
0103de7b51 drivers: i2c: stm32: support DMA when CONFIG_MEM_ATTR=n
Allow STM32 I2C driver v2 to operate with DMA support even when
CONFIG_MEM_ATTR is disabled which happen when CONFIG_ARM_MPU is
intentionally disabled despite the CPU supports MPU.

By the way, remove a #ifdef directive on header files inclusion
that adds noise in the header file inclusion section without any
benefit.

Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
2025-04-02 12:54:50 +02:00
Etienne Carriere
bec3a6fc98 drivers: adc: stm32: support DMA when CONFIG_MEM_ATTR=n
Allow STM32 ADC driver to operate with DMA support even when
CONFIG_MEM_ATTR is disabled which happen when CONFIG_ARM_MPU is
intentionally disabled despite the CPU supports MPU.

By the way, remove some #ifdef directive on header files inclusion
that add noise in the header file inclusion section without any
benefit. Also remove inclusion of zephyr/arch/cache.h that is not
needed at all.

Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
2025-04-02 12:54:50 +02:00
Etienne Carriere
bd92d69b64 drivers: spi: stm32: support DMA when CONFIG_MEM_ATTR=n
Allow STM32 SPI driver to operate with DMA support even when
CONFIG_MEM_ATTR is disabled which happen when CONFIG_ARM_MPU is
intentionally disabled despite the CPU supports MPU.

By the way, remove some #ifdef directive on header files inclusion
that add noise in the header file inclusion section without any
benefit.

Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
2025-04-02 12:54:50 +02:00
Etienne Carriere
4e37a1bb4b drivers: serial: uart_stm32: support DMA when CONFIG_MEM_ATTR=n
Allow STM32 UART driver to operate with DMA support even when
CONFIG_MEM_ATTR is disabled which happen when CONFIG_ARM_MPU is
intentionally disabled despite the CPU supports MPU.

By the way, remove some #ifdef directive on header files inclusion
that add noise in the header file inclusion section without any
benefit.

Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
2025-04-02 12:54:50 +02:00
Benjamin Cabé
52d8903123 boards: arduino: add twister file for Portenta rev 4.10
Add ability to target rev 4.10 of the M7 core in Twister

Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
2025-04-02 12:54:36 +02:00
James Roy
ee17657ad3 edtlib: binding: Add a title keyword
Add a 'title' keyword to the binding to provide a short
description of the binding, while 'description' serves as
the long description.

Signed-off-by: James Roy <rruuaanng@outlook.com>
2025-04-02 12:54:24 +02:00
Charles Hardin
b1775914d6 cmake: mcuboot: refactor the checks for west and the key files
As of c952f09a79 the calls to west
sign were replaced with imgtool but a lingering integration with
WEST_TOPDIR was allowed to remain which is not needed when there
are absolute paths available for the configuration. So, this
attempts to refactor the code to allow a few things

- allow a search of relative paths to application config and
  then west topdir
- only fatal error when a west workspace is needed but not found,
  so if the config is all absolute files then a west workspace is
  not required

Fixes: #86438
Signed-off-by: Charles Hardin <ckhardin@gmail.com>
2025-04-02 12:53:13 +02:00
Jeppe Odgaard
0dffe7cc7e drivers: dac: Add TI DAC161S997 driver
Initial DAC driver for TI DAC161S997. This is a 1 channel 16 bit
DAC designed for 4-20 mA loops.

Signed-off-by: Jeppe Odgaard <jeppe.odgaard@prevas.dk>
2025-04-02 12:53:03 +02:00
Quang Le
da076a9924 drivers: gpio: Add support for RZ/T2M
Add GPIO driver support for RZ/T2M

Signed-off-by: Quang Le <quang.le.eb@bp.renesas.com>
Signed-off-by: Nhut Nguyen <nhut.nguyen.kc@renesas.com>
Signed-off-by: Binh Nguyen <binh.nguyen.xw@renesas.com>
2025-04-02 12:52:54 +02:00
Quang Le
9736851528 drivers: interrupt controller: Add support for RZ/T
- Add interrupt controller driver support for RZ/T
- Remove a duplicate USE_RZ_FSP_EXT_IRQ in Kconfig

Signed-off-by: Quang Le <quang.le.eb@bp.renesas.com>
Signed-off-by: Nhut Nguyen <nhut.nguyen.kc@renesas.com>
Signed-off-by: Binh Nguyen <binh.nguyen.xw@renesas.com>
2025-04-02 12:52:54 +02:00
Hieu Nguyen
70f9b46342 drivers: serial: Add support for RZ/T2M
Add serial driver support for Renesas RZ/T2M

Signed-off-by: Hieu Nguyen <hieu.nguyen.ym@bp.renesas.com>
Signed-off-by: Nhut Nguyen <nhut.nguyen.kc@renesas.com>
Signed-off-by: Binh Nguyen <binh.nguyen.xw@renesas.com>
2025-04-02 12:52:54 +02:00
Hieu Nguyen
303376a76b drivers: pinctrl: Add support for RZ/T2M
This is the initial commit to support pinctrl driver for Renesas RZ/T2M
Corrected space in the comment.

Signed-off-by: Hieu Nguyen <hieu.nguyen.ym@bp.renesas.com>
Signed-off-by: Nhut Nguyen <nhut.nguyen.kc@renesas.com>
Signed-off-by: Binh Nguyen <binh.nguyen.xw@renesas.com>
2025-04-02 12:52:54 +02:00
Nhut Nguyen
df630d6159 boards: renesas: Maintain the minimal support of board RSK+ RZ/T2M
Renesas takes over the maintainer of board RSK+ RZ/T2M to unify with
other RZ boards

- Rename rzt2m_starter_kit to rzt2m_rsk
- Support xSPI boot mode to boot code from flash
- Change to use HAL Renesas

Signed-off-by: Nhut Nguyen <nhut.nguyen.kc@renesas.com>
Signed-off-by: Binh Nguyen <binh.nguyen.xw@renesas.com>
2025-04-02 12:52:54 +02:00
Nhut Nguyen
4c8b47effd MAINTAINERS: Remove an invalid path of RZ Platforms
Since the folder soc/renesas/rzt2m has been moved into soc/renesas/rz
to unify with other RZ devices, so the path soc/renesas/rzt2m must be
removed to pass pipeline.

Signed-off-by: Nhut Nguyen <nhut.nguyen.kc@renesas.com>
Signed-off-by: Binh Nguyen <binh.nguyen.xw@renesas.com>
2025-04-02 12:52:54 +02:00
Hieu Nguyen
f961578b7d soc: renesas: Maintain the minimal support of Renesas RZ/T2M
Renesas takes over the maintainer of SoC Renesas RZ/T2M to unify with
other RZ devices

- Move soc/renesas/rzt2m to soc/renesas/rz
- Support xSPI boot mode to boot code from flash
- Change to use HAL Renesas

Signed-off-by: Hieu Nguyen <hieu.nguyen.ym@bp.renesas.com>
Signed-off-by: Nhut Nguyen <nhut.nguyen.kc@renesas.com>
Signed-off-by: Binh Nguyen <binh.nguyen.xw@renesas.com>
2025-04-02 12:52:54 +02:00