Commit graph

13785 commits

Author SHA1 Message Date
Michał Barnaś
0918442ba6 ec_host_cmd: add ITE SHI peripheral for the host commands
This commit adds the support for host commands being transported
by the Serial Host Interface on the IT8xxx2 SoC.

Signed-off-by: Michał Barnaś <mb@semihalf.com>
2023-01-11 09:38:45 +01:00
Michał Barnaś
3ae105e76b ec_host_cmd: add NPCX SHI peripheral for the host commands
This commit adds the support for host commands being transported
by the Serial Host Interface on the NPCX SoC.

Signed-off-by: Michał Barnaś <mb@semihalf.com>
2023-01-11 09:38:45 +01:00
Michał Barnaś
cbb6742855 ec_host_cmd: add Kconfig to set ec host commands logging level
This commit adds Kconfig CONFIG_EC_HC_LOG_LEVEL that sets the logging
level of host commands subsystem.

Signed-off-by: Michał Barnaś <mb@semihalf.com>
2023-01-11 09:38:45 +01:00
Nick Ward
658b618289 drivers: pwm: add NXP PCA9685 controller
Adds PCA9685 16-channel, 12-bit PWM Fm+ I2C-bus LED controller

Signed-off-by: Nick Ward <nix.ward@gmail.com>
2023-01-11 09:38:18 +01:00
Tom Burdick
15786ce648 sensor: tdk 42688 driver
Adds a driver for TDK InvenSense 42688 six axis IMU. Verified using
the sensor shell sample app via:

- sensor info
- sensor get icm42688p@0

Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
Signed-off-by: Yuval Peress <peress@google.com>
2023-01-10 14:45:36 -06:00
Francois Ramu
c14670abea drivers: timer: lptim timer clock on stm32u5 has a prescaler
The stm32 devices shows a x2 factor on the LPTIM1,3,4
clock source but it acts as a prescaler.
The max lptim counter (timebase) is counting 4 sec
In that case, the LPTIM count unit is double.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2023-01-10 15:54:25 +00:00
Mathis Raemy
c4b07e8321 drivers: flash: bug fix inline function was not inlined
During flash operation, you have to disable XiP which force function
to be located in RAM. On top of that, the function `flash_put_cmd_addr`
is time critical so we need to declare as inline. For some reason,
sometimes the function was not really inline. Changed it to
ALWAYS_INLINE fixed the bug.

Signed-off-by: Mathis Raemy <mathis.raemy@gmail.com>
2023-01-10 09:26:37 +01:00
TOKITA Hiroshi
c1fc906599 drivers: counter: gd32_timer: Remove is_bit_mask() implementation
Replace is_bit_mask() with IS_BIT_MASK() and remove the implementation.

Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@fujitsu.com>
2023-01-10 09:23:14 +01:00
TOKITA Hiroshi
33963c43ca drivers: counter: nrfx_timer: Remove is_bit_mask() implementation
Replace is_bit_mask() with IS_BIT_MASK() and remove the implementation.

Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@fujitsu.com>
2023-01-10 09:23:14 +01:00
TOKITA Hiroshi
21dc3f58e4 drivers: counter: nrfx_rtc: Remove is_bit_mask() implementation
Replace is_bit_mask() with IS_BIT_MASK() and remove the implementation.

Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@fujitsu.com>
2023-01-10 09:23:14 +01:00
TOKITA Hiroshi
429b05a79a drivers: counter: stm32_timer: remove counter_stm32_is_bit_mask() function
Remove implementation of counter_stm32_is_bit_mask() and
Use IS_BIT_MASK() macro.

Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@fujitsu.com>
2023-01-10 09:23:14 +01:00
Chris Friedt
8659e2f69e libc: minimal: include: move fcntl.h to posix
The `fcntl.h` header has never been a part of ISO C so move it to
`include/zephyr/posix`.

To ensure a smooth migration, a header was left in
`lib/libc/minimal/include` that prints a deprecation warning.

Users should either include `<zephyr/posix/fcntl.h>` or switch to
`CONFIG_POSIX_API=y`.

Signed-off-by: Chris Friedt <cfriedt@meta.com>
2023-01-10 09:02:21 +09:00
Erwan Gouriou
773f96b763 drivers: stm32: stm32_hal: Generate device id based mac address
In case user didn't set mac address in any way (locally defined or
randomly generated), define mac address using device unique id.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2023-01-09 19:22:54 +01:00
Erwan Gouriou
179963899e drivers: ethernet: stm32_hal: Move mac address configuration to dt
Deprecate Kconfig mac address related symbols and replace by existing
device tree properties:
- local-mac-address
- zephyr,random-mac-address

User who wants to keep using deprecating method of defining random
MAC address using Kconfig should set CONFIG_ETH_STM32_HAL_RANDOM_MAC=y.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2023-01-09 19:22:54 +01:00
Erwan Gouriou
eee1d7fc66 drivers: ethernet: stm32_hal: Centralize mac address configuration
Get the mac address be set in a central function rather than split
between 2 places.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2023-01-09 19:22:54 +01:00
Erwan Gouriou
ddb457a8d9 drivers: ethernet: stm32_hal: Make MAC address setting method a K choice
In order to ease deprecation of these methods (in favor of dt based
configuration), introduce a choice for MAC address configuration method.

Default to random method (no change).

User wanting to still use ETH_STM32_HAL_MACX symbols should define
CONFIG_ETH_STM32_HAL_USER_STATIC_MAC=y

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2023-01-09 19:22:54 +01:00
Jani Hirsimäki
e92b067b7f net: ip: net_context: AF_PACKET/SOCK_RAW/IPPROTO_RAW: set pkt family
Setting a detected packet family (ipv4 or ipv6) in net_context level
instead in lower layers for AF_PACKET/SOCK_RAW/IPPROTO_RAW type sockets
when sending data.

Signed-off-by: Jani Hirsimäki <jani.hirsimaki@nordicsemi.no>
2023-01-09 19:21:18 +01:00
Marco Peter
ec3857dbcf drivers: flash: stm32: Use consistent log priorities
Any error erasing the flash might want to log
the event with "ERROR" priority.

Signed-off-by: Marco Peter <marco.peter@joylab.ch>
2023-01-09 19:19:49 +01:00
Flavio Ceolin
24cb520698 timer: hpet: Remove deadcode
Move hpet_int_sts_set to inside HPET_INT_LEVEL_TRIGGER guard.

Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2023-01-09 12:07:28 -05:00
Gerard Marull-Paretas
a6575e5834 drivers: regulator: npm6001: add support for BUCK1/2 disable
BUCK1/2 are defined as "always on" regulators, however, there is a
special override register that allows to turn them on/off.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2023-01-09 16:19:09 +00:00
Gerard Marull-Paretas
7feb008c85 drivers: regulator: common: allow to specify on by default
Some regulators are enabled by default, however, such condition cannot
be captured now by the regulator driver API. Refactor
regulator_common_init_enable to regulator_common_init (enable removed,
as it also sets mode) and add a new argument to specify such condition.
With this change, regulator_disable() and regulator_is_enabled() work as
expected without a first call to regulator_enable().

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2023-01-09 16:19:09 +00:00
Raul Pando
cd1d7e4bb8 drivers: usb: make USB VBUS sensing configurable for STM32 devices
Vbus detection is required by self-powered, with external non-USB
supply, devices to have an operational USB peripheral. The voltage
sensing, when enabled, is performed via a designated pin (PA9 is
the most common).

For greater details see section 2.6, ST application note AN4879.

Signed-off-by: Raul Pando <raul.pando@bytegrity.co.uk>
2023-01-09 15:26:21 +00:00
Erwan Gouriou
079470be02 drivers: clock_control: stm32: Fix HSI48 oversights
Take into account HSI48 when computing susbys rate.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2023-01-09 14:01:28 +00:00
Patryk Duda
09277d44e3 drivers: watchdog: Make SOC reset as an option in counter watchdog
When using watchdog which doesn't support callbacks (e.g. STM32 IWDG)
it's very useful to have counter based watchdog with shorter timeout.
This way we can gather useful information before IWDG resets SOC.

In above case it's usually not desired to reset SOC when counter
watchdog is triggerd, because we can lose information about reset cause.
For example, STM32 can determine if the reset was caused by watchdog.

Another use case for counter watchdog without SOC reset is to detect
slow code paths.

Signed-off-by: Patryk Duda <pdk@semihalf.com>
2023-01-09 10:15:33 +01:00
Guillaume Gautier
3e6c9c40aa drivers: counter: Properly deprecate Kconfig symbols in STM32 RTC driver
Now that both RTC source clock Kconfig symbols are disabled by default,
we invert the ifdef so that in the absence of configuration we still
fall in the LSI configuration.

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2023-01-09 10:14:35 +01:00
Guillaume Gautier
1cbc1c14f0 drivers: counter: Deprecate Kconfig STM32 source clock
Following #50104, properly deprecates old Kconfig symbols concerning
RTC source clock and makes them optional to have them disabled by
default.

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2023-01-09 10:14:35 +01:00
Erwan Gouriou
af0576b7ea drivers: flash: stm32: Remove useless Kconfig
SOC_FLASH_STM32_V1 is not used anymore.
Remove it

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2023-01-08 19:49:12 +01:00
Erwan Gouriou
cc1601fde7 driver: flash: stm32: Use compat information to select file to build
Now that compatible is directly linked with driver version,
use DT compat based Kconfig flag to build the correct flash driver
version.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2023-01-08 19:49:12 +01:00
Erwan Gouriou
a934cce35b drivers: flash: stm32: Rename v1 driver into f1x
Instead of introducing a vX driver version, use series name.
With this commit F0, F1, F3, L0 and L1 series are using F1 flash driver.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2023-01-08 19:49:12 +01:00
Daniel DeGrasse
29c53f4f6a drivers: adc_mcux_lpadc: add clock setup for RT5xx SOC
Add clock setup code for RT5xx series SOC to LPADC driver

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2023-01-08 19:48:54 +01:00
Erwan Gouriou
c5ab922f50 drivers: hci: stm32wb: Use clock_control driver for clock configuration
Instead of relying on STM32Cube API, use clock_control framework
for clock configuration inside this driver.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2023-01-08 19:48:27 +01:00
Erwan Gouriou
f3e788e84e drivers: hci: stm32wb: Refactor c2_reset()
In preparation of the introduction of dt configured clock in this
driver, refactor clock related clocks.
- remove start_ble_rf()
- Move  IPCC clock activation in c2_reset()

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2023-01-08 19:48:27 +01:00
Erwan Gouriou
079a43d9f8 drivers: hci: stm32wb: LSE clock configuration not required
As long as LSE clock is set in device tree, configuration will be
done in clock control driver, no need to do it here.
Besides, remove back up domain related code as this is also already
handled in clock_control driver.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2023-01-08 19:48:27 +01:00
Erwan Gouriou
52b9724a88 drivers: hci: stm32wb: LSI is not an allowed clock for BLE RF.
Remove code related to LSI used as clock source for RF wakeup,
it isn't a valid clock source.
Also don't disable LSI when LSE is selected.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2023-01-08 19:48:27 +01:00
Erwan Gouriou
f1dfeff282 drivers: hci: stm32wb: Don't mess with RTC Clock source
No reason to update RTC clock source in this driver.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2023-01-08 19:48:27 +01:00
Aaron Massey
c4be38dec1 fuel_gauge: sbs_gauge: Enable MFR ACC write
Update the SBS Gauge driver that implements the fuel_gauge API to implement
a set_property function allowing the writing of an SBS word to the
manufacturer access register per the SBS spec.

Includes an update to the SBS Gauge emulator and SBS fuel gauge tests to
weakly verify the code runs.

Signed-off-by: Aaron Massey <aaronmassey@google.com>
2023-01-08 19:48:12 +01:00
Aaron Massey
c0762d003a fuel_gauge: Implement sbs gauge read for mfr acc
Implement and weakly test fetching the manufacturer access word from an SBS
compatible fuel gauge.

Signed-off-by: Aaron Massey <aaronmassey@google.com>
2023-01-08 19:48:12 +01:00
Chris Wilson
18d47316ed drivers: clock_control: esp32: fix cpu_freq divisor typo.
Current divisor is 10000000 (should be 1000000).

For example, ESP32_CLK_CPU_240M / 10000000 == 24 MHz (incorrect).

Signed-off-by: Chris Wilson <christopher.david.wilson@gmail.com>
2023-01-05 12:43:17 +01:00
Dino Li
5bcd47f9b9 espi: it8xxx2: make sure h2ram offset is configured correctly
This change for addressing the below symptoms.
Two FW images have different h2ram offset settings.
Jumping to each other will cause offset setting errors.

Signed-off-by: Dino Li <Dino.Li@ite.com.tw>
2023-01-04 18:41:29 +00:00
Dino Li
02578cb834 it8xxx2/espi: protect clear OBF request
At default, IBF (input buffer full) interrupt status will be cleared
after reading keyboard data input register (KBHIDIR) in ISR.
For request to clear OBF (output buffer full), we need to enable clear
mode. In the mode, IBF status cannot be cleared by reading KBHIDIR
register. It means that if AP output data to 60h/64h port during the
mode enable, IBF interrupt will keep triggering until the watchdog is
reset. This patch addresses this issue.

Signed-off-by: Dino Li <Dino.Li@ite.com.tw>
2023-01-04 18:40:55 +00:00
Mahesh Mahadevan
3f38b011c3 drivers: counter: Update NXP LPC RTC for wakeup source
Add support to wakeup from low power modes

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
2023-01-04 11:03:42 -06:00
Mahesh Mahadevan
db7dedaead drivers: memc: Add device PM to MCUX Flexspi driver
Add Device level power manangement support to the
MCUX FlexSPI driver.

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
2023-01-04 11:03:42 -06:00
Manuel Arguelles
a7743a49aa drivers: pinctrl: rename S32 to NXP S32
Following updates previously done for other drivers, rename all
occurrences of S32 to NXP S32 to avoid ambiguity.

Signed-off-by: Manuel Arguelles <manuel.arguelles@nxp.com>
2023-01-04 16:51:38 +01:00
Manuel Arguelles
415131c2e4 drivers: serial: rename S32 to NXP S32
Following updates previously done for other drivers, rename all
occurrences of S32 to NXP S32 to avoid ambiguity.

Signed-off-by: Manuel Arguelles <manuel.arguelles@nxp.com>
2023-01-04 16:51:38 +01:00
Manuel Arguelles
492e196e8a drivers: gpio: rename S32 to NXP S32
Following updates previously done for other drivers, rename all
occurrences of S32 to NXP S32 to avoid ambiguity.

Signed-off-by: Manuel Arguelles <manuel.arguelles@nxp.com>
2023-01-04 16:51:38 +01:00
Cong Nguyen Huu
d167d3a29a driver: can: add new filter to match CAN-FD frames
Add support FD frame filter to configure type frame for
each Rx msg to receive corresponding frames (classic, FD frames).

The Bosch M_CAN driver does not support FD frame filter,
so inmplement driver to handle it in software.

Signed-off-by: Cong Nguyen Huu <cong.nguyenhuu@nxp.com>
2023-01-04 08:18:13 -06:00
Martin Jäger
c8c0879963 drivers: can: mcan: Fix flag overflow for some MCUs
The number of extended filters can be up to 15 for MCUs like the NXP
LPC55Sxx series, so the flags don't fit into uint8_t.

Fixes #53417

Signed-off-by: Martin Jäger <martin@libre.solar>
2023-01-04 14:24:35 +01:00
Sylvio Alves
cff71c8d2b driver: systimer: increase esp32c3 tick resolution
hal_espressif systimer HAL calls are based on 1MHz reference.
This changes systimer driver to allow max clocking reference of 16MHz
and increases soc tick resolution by reducing min delay interval.

This also sets all ESP32-C3 socs to 16MHz hardware cycles reference.

Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
2023-01-04 14:24:25 +01:00
Gerard Marull-Paretas
24f2c30678 drivers: regulator: shell: fix isdigit() usage
ISO/IEC 9899:1999 (C Standard), §7.4 Character handling <ctype.h>:

In all cases the argument is an int, the value of which shall be
representable as an unsigned char or shall equal the value of the macro
EOF. If the argument has any other value, the behavior is undefined.

So add a cast to unsigned char to make sure we do not trigger UB.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2023-01-04 11:19:25 +01:00
Al Semjonovs
211e4d276e gpio: Add driver support for software based gpio debounce
Software based GPIO debounce driver implementation.

Signed-off-by: Al Semjonovs <asemjonovs@google.com>
2023-01-04 10:36:00 +01:00