A call to exit_dpd mode for the nrf QSPI nor flash should always be
made, even if the currently executing image is compiled with
CONFIG_PM_DEVICE=n, because a previously executing image could have set
the device into DPD mode, and a call to exit_dpd is required for proper
functionality. Call `exit_dpd` regardless of the setting of
CONFIG_PM_DEVICE during QSPI nor initialization.
Signed-off-by: Nickolas Lapp <nickolaslapp@gmail.com>
Previously channels could be tore down before a sequence completes,
either when using async, or when ADC_ACTION_REPEAT was specified
The teardown is now moved to after an entire context is complete
Signed-off-by: Hein Wessels <heinwessels93@gmail.com>
This optional function allows a driver to do operations
after a complete sampling sequence is completed.
Signed-off-by: Hein Wessels <heinwessels93@gmail.com>
Add dependency on SYS_CLOCK_EXISTS to all timer configurations.
This would avoid a situation where a possible timer configuration would
be wrongfully selected but SYS_CLOCK_EXISTS is disabled.
This simplifies code that wants to check for system clock capabilities
don't have to check if the system clock exists in addition.
Signed-off-by: Joakim Andersson <joakim.andersson@nordicsemi.no>
Minor rework to perform the PLLI2S VCO computations in floating point as
per the original seemingly intent.
Signed-off-by: Raul Pando <raul.pando@bytegrity.co.uk>
Point to the modified version of hal_stm32 which allow to use
ETH HAL V2 on stm32F7.
Update zephyr driver to allow it.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Similarly to what was done in USB or RNG drivers, configure 48MHz domain
clock using device tree.
By default a freq clock check is enabled.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Fix handling of failed NXP FlexCAN RX mailbox reads. Instead of re-enabling
the RX MB in the ISR, we need to handle a failed RX MB read (e.g. due to a
busy MB bit).
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Add a locking semaphore so that multiple threads
doing transfers with the same i2c will not produce
unexpected results. The lock will ensure that only one
transfer will happen at a time and it must be completed
before another thread can request a new transfer.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
Program the right trim control register for mec150x.
This fixes uart debug console output issue.
Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
This change takes advantage of line information coming from new properties
to simplify exti_irq_table definition and isr routing related code.
All __stm32_exti_isr_x routing functions are removed and instead,
stm32_exti_isr is now taking a exti_range structure which provides,
for each irq, start line and range length.
This argument is provided by IRQ_CONNECT macro instead of previous
dev info (which is constant and doesn't need to be provided as argument).
line_range_x variables are generated at driver init thanks to a
mix of dt magic and runtime implementation:
DT_FOREACH_PROP_ELEM iterates over each irq line (counted as
interrupt-names property) call a macro which instantiates populated
line_range_x variables, and calls IRQ_CONNECT for each IRQ.
Additionally, at each iteration stm32_fill_irq_table() is called to
fill exti_irq_table.
Since not required anymore, Kconfig symbols EXTI_STM32_EXTIX_Y_IRQ_PRI
are removed. IRQ prio is now supposed to be configured in device tree.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
The hda driver uses -EPIPE to signal xrun, as proposed in the alsa lib
https://www.alsa-project.org/alsa-doc/alsa-lib/pcm.html. This commit
changes the xrun error code in dw dma driver from -ENODATA to -EPIPE to
make it consistent across drivers.
Signed-off-by: Adrian Warecki <adrian.warecki@intel.com>
The uart_mux_recv() documentation was wrong, the function parameters
were incorrectly documented.
Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
There are various call to z_soc_cached_ptr() which returns values
in the cached address space and are stored in temporary variables
that are not marked as in the cached address space. This results
in sparse complaining about discarding the cached address space
attribute. These temporary variables are then passed to other
internal memory management related functions which do not have
the concept of cached address space (as it is currently Xtensa
specific). Because of this, we cannot change the signature of
these functions. Instead, we force a change of address space
when those temporary variables are being assigned to suppress
sparse warnings.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
To support the repeated start/stop, the stm32 dma driver is
returning 0 if the channel is already started/stopped.
This is not done at the dmamux level if any.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
- Applied changes on the most recent version of the driver
- Using CONFIG_ETH_MULTICAST_FILTER to enable/disable the hash filter
- Using read-modify-write the hash table for a single address
when joining
- When leaving rebuild the entire hash table and ensure that multicast
addresses used for the hash calcuation doesn't have the joined flag set
I have tested these conditions:
- IGMP enabled and disabled on my ethernet network
- Observed the network utilisation on a STM32H7 device running these
changes with the hash filter enabled and disabled while the device is
on a ethernet network with high rate multicast traffic
- When the application closes a socket for a multicast receive, ensure
it doesn't affect the receiption of existing sockets as well as IGMP
Fixes#53773
Signed-off-by: Chamira Perera <chamira.perera@audinate.com>
Use the MAC's hash table to filter incoming multicast frames that are
targeted to subscribed multicast groups and discard all others.
Signed-off-by: Markus Fuchs <markus.fuchs@ch.sauter-bc.com>
# Conflicts:
# drivers/ethernet/eth_stm32_hal.c
This reverts commit 271b306.
In rare conditions, this commit causes the uart shell mechanism to
corrupt on Cros ec system. Revert this commit on upstream repo first to
avoid blocking the development. Will dig out why this symptom occurs
later.
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
When the PAUSE or STOP command was triggered, the driver was first
requesting the PDM peripheral to stop by calling nrfx_pdm_stop() and
then it was setting a flag that was in turn checked in an interrupt
that was generated when the PDM actually stopped (what happens a moment
after the stop request is made). But that setting of the flag could get
preempted and the interrupt handler could get executed first causing
the stopping to be not handled properly and leaving the driver falsely
considering the peripheral as still active.
This commit reverses the order of these two operations to avoid
the described race condition.
Same sequence is corrected also in event_handler(), but this is
done only for consistency (it is in the interrupt handler itself
so there is no race possible in this case).
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
The number of HPSRAM memory blocks in use is reported to the
PMC via the sideband channel supported by the communication widget.
Signed-off-by: Adrian Warecki <adrian.warecki@intel.com>
the watchdog is enabled by the wdt_setup()
coming after the wdt_install_timeout.
Due to PR #44972, the code did not follow that.
This PR fixes the correct other in the sequence.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
RNG clock configuration constraints differ between each series.
Rather than providing complex build time code to verify RNG clock
configuration is correct, take advantage of CECS bit (Clock error
current status) to assess clock configuration.
This check is implemented under a specific ENTROPY_STM32_CLK_CHECK
Kconfig option. This allows user to disable this feature in specific
conditions:
- CED bit disabled in application (in which case CECS status is not valid)
- Clock configuration is deemed as correct by user. Note that RNG number
are always generated, whatever the clock status.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
RNG domain source clock is now configured via call to clock_control
driver.
Besides, add static checks to verify domain clock configuration
is correct:
- If HSI48 is used because it is default domain clock config,
it should be enabled
- If no HSI48 is available, a specific domain clock should be set
- In L0 case, PLL could be used as domain clock only at a specific freq.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Use STM32_DT_INST_CLOCKS to populate device clock information.
This will allow to add clock source information in next commits.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
The interrupt is used to wake up EC from low power mode.
So EC does not defer eSPI bus while transaction is accepted.
Fixes EC host commands slow issue.
Signed-off-by: Dino Li <Dino.Li@ite.com.tw>
This commit makes the peripheral-id property optional and removes it's
usage from the Gecko SPI driver.
Signed-off-by: Pawel Czarnecki <pczarnecki@antmicro.com>
Update usage of zephyr_code_relocate to follow new API. The old method
of relocating a file was the following directive:
zephyr_code_relocate(file location)
The new API for zephyr_code_relocate uses the following directive:
zephyr_code_relocate(FILES file LOCATION location)
update in tree usage to follow this model. Also, update the NXP HAL SHA,
as NXP's HAL uses this macro as well.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
There is no need to disable interrupts while just checking if
a channel needs to be processed in the ISR, as that section
does not contain anything that needs to be protected against
overwriting from some other context. In particular, if a given
timeout is changed or even aborted while its event is being
checked, this will be correctly handled in the code that follows
and that checks the expiration time.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Values to be set to the comparator need to be specified in RTC cycles,
not ticks, so the initial value used in the tickless mode needs to be
MAX_CYCLES, otherwise when CONFIG_SYS_CLOCK_TICKS_PER_SEC is set to
a value less then the RTC frequency, the initially configured timeout
will be unnecessarily shorter.
On the occassion, remove also the call to counter() when setting the
initial timeout value in non-tickless mode. RTC is cleared a few lines
above, so at this point it will most likely be 0, and even if it was
not, compare_set() would properly handle a target time value that had
already passed.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
In non-tickless mode, the timeout handler always announced maximum 1
tick to kernel, but in fact it cannot be guaranteed that the handler
execution is not delayed and that the number of elapsed ticks does not
exceed 1. Use the actual number instead.
Switch also to using a 32-bit value for `dticks` to get a bit simpler
generated code (ticks delta is not supposed to be that huge).
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Align the condition checked in compare_set_no_locks() with what
set_absolute_alarm() actually provides (and slightly correct the
latter function so that it provides what it is supposed to).
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Add missing masking against `BIT(chan)` when handling a forced ISR
to avoid unnecessary processing of multiple channels instead of just
the one that actually requires it.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Remove a piece of code that was supposed to bring an extra update
of the anchor value but which in fact was not able to provide it,
because of the target time checking performed in process_channel(),
and which is anyway unnecessary because the timeout span is limited
to MAX_CYCLES in sys_clock_set_timeout(), so the timeout handler is
guaranteed to be executed at least twice per each RTC overflow.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Eliminate waiting for a potential COMPARE event when setting a CC
value close to the previously set one and rely instead on checking
target time when processing channel events in the ISR.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
