Set the LTDC buffer alignment to 256 in order to avoid an
issue when accessing to PSRAM via XSPI.
Signed-off-by: Alain Volmat <alain.volmat@foss.st.com>
The SMH attribute when using the XSPI PSRAM is set to EXTERNAL (2)
within the driver hence set default for both LTDC and video
buffer SMH attribute to 2 if all conditions are validated.
Signed-off-by: Alain Volmat <alain.volmat@foss.st.com>
Add the CONFIG_STM32_LTDC_FB_SMH_ALIGN option in order to
indicate the alignment required for the buffer allocated via
SMH.
Signed-off-by: Alain Volmat <alain.volmat@foss.st.com>
Removes a superfluous Kconfig for setting the MCUboot operating
mode as sysbuild does this automatically, adds a comment about why
it is omitted, and then sets it in the correct place
Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
Update getting started guide, release notes, CI actions and
Python version compliance check to use Python 3.12 as
minimum supported version.
Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
Add semihosting support for Xtensa architecture.
Existing semihosting instructions are based on ARM, so they are
converted to Xtensa codes before the semihosting call is invoked.
Return codes of read, write and seek calls had to be converted to match
semihosting API definitions.
Signed-off-by: Tahsin Mutlugun <Tahsin.Mutlugun@analog.com>
Move semihost_x_args structs to include/semihost_types.h so that
semihost implementations can access their elements if needed.
Signed-off-by: Tahsin Mutlugun <Tahsin.Mutlugun@analog.com>
Several subsystems have configuration options that allow large buffers
to be placed in specialized memory sections. When PSRAM is enabled, the
MBEDTLS heap and LVGL heap and buffer can be relocated to custom sections
within the PSRAM segment.
Enabling `CONFIG_ESP_SPIRAM` together with any of the following options:
* `CONFIG_MBEDTLS_HEAP_CUSTOM_SECTION`
* `CONFIG_LV_Z_MEMORY_POOL_CUSTOM_SECTION`
* `CONFIG_LV_Z_VDB_CUSTOM_SECTION`
will place the corresponding buffers into the `.mbedtls_heap`,
`.lvgl_heap`, and `.lvgl_buf` sections, respectively.
If none of these custom section options are enabled, the buffers will
fall back to the `.ext_ram.bss` section.
Signed-off-by: Marek Matej <marek.matej@espressif.com>
Python 3.10 and 3.11 are no longer supported so drop them from the
GitHub Actions test matrices.
Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
Native sim was inadvertently forgotten from the platform_allow list with
commit 257e56c.
It should be in there as it is an integration platform.
Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
When calling device_get_binding(NULL) from userspace, this eventually
funnels down to a call to arch_user_string_nlen() where it tried to
verify that the kernel has access to this address (0x0). But since
this originates from userspace, we really want to know if this is
accessible from userspace, so using arch_buffer_validate() instead
of xtensa_mem_kernel_has_access() is preferable.
Signed-off-by: Peter Mitsis <peter.mitsis@intel.com>
This stupid errata will not leave me alone, here is another bandaid to
deal with an issue where an extra byte was being sent on version 1
LPSPIs due to the algorithm of filling NOPs when only RX is left was not
expecting the situation where the LPSPI actually consumed everything
from the fifo but is not sending it due to this ridiculous stalling errata.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
The buf_len parameter of lpspi_fill_tx_fifo is supposed to be bytes, so
we do not need to convert it. This could cause an issue if the end of
the buffer is less bytes than the word size.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
Fixing some issues with the TX fifo fill logic in two places:
First in the normal fill function, it didn't take into account a
situation where the TX fifo is already partially filled. This currently
doesn't cause a problem because the driver is written in a way that the
watermark is always 0 for TDF, but in case the watermark were anything
else it would cause a problem.
Second, when filling the TX fifo with NOPS in order to clock the rest of
the RX in from the bus, the calculation regarding the current TX fifo
length was just wrong and was leading to a bug in some cases where there
was a subtraction underflow and billions of NOPs were being filled.
Also, there could be a problem where a few extra NOPs are put in the TX
fifo if we don't count what we already have in the TX fifo, so fixing
that as well.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
There is no need to update the tx context in interrupt instead of
directly after the fill, this just makes the code more complex. Also,
the spi context header already handled iterating over buffers so we can
remove that code too.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
Since the LPSPI drivers no long use MCUX at all, remove the MCUX
branding, to avoid confusion. In the future if an implementation uses
the MCUX SDK driver, it should specifically be called by MCUX in the
name.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
For optimization purpose, remove calls to SDK. Since we know exactly
what we want, this results in smaller code size.
Also, this code calculates the SCK parameters more efficiently than the
SDK driver did it by using a binary (instead of linear) search.
Lastly, remove call to LPSPI_Reset in the init call and replace with
native driver code, and remove inclusion of SDK header.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
Instead of waiting forever and potentially allowing infinite loop on
ISR, wait some arbitrary amount of cycles to error out if it isn't
happening. Still make this configurable for debugging purposes.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
Since I expect that the drivers will need to read this version ID maybe
multiple times, instead of repeatedly doing so over the peripheral bus,
it is probably worth it to store a byte in RAM representing this
version. The behavior of the LPSPI is fairly significantly different
between versions. Not enough to warrant separate drivers but enough to
need a few workarounds or different code branches depending on this.
Also, the interrupt based driver is currently using a wrong macro to
read this, and that is a bug.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
Clarify at the top of the common lpspi file what is the purpose of the
file to be clear to future developers that this file is not supposed to
make any assumption about a particular implementation of the zephyr API
using the LPSPI, because I imagine it could be very likely that more
lpspi implementation will be done in the future to make different
tradeoffs than the current two. Also the current two are different
enough that we should avoid making assumptions even if they currently
hold for both because they might not always, as things change.
We should disable interrupt events while configuring the LPSPI
regardless of implementation. The specific implementation should enable
the interrupts it needs on its own transceive implementation.
Also clarify and simplify some code in the configure function. Namely,
we no longer need to check if we are already configured to write to
registers because a recent commit made it so that we clock the
peripheral from the zephyr driver init instead of upon the MasterInit
call on the SDK. There is also a redundant CR write which I have removed.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
These settings are used to put the pins in power saving mode
when we enter SUSPEND power mode.
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
The sleep-output property is no longer used. This results in the sleep
bit to be always cleared. Delete this code so we can retain any sleep
mode configuration done.
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
Create a virtual shield to connect an OpenThread RCP radio device with a
host using the UART or SPI bus.
Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
Implement the HDLC over SPI adapter driver to support the Openthread RCP
with SPI communication.
Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
Registers driver with pm_device_driver_init(); implements TURN_ON,
SUSPEND and RESUME. Sets ODR = 0 on suspend per datasheet
Signed-off-by: Van Petrosyan <van.petrosyan@sensirion.com>
Cast NSEC_PER_SEC to long to resolve a compiler warning about comparison
between signed and unsigned integer expression.
Signed-off-by: Tim Pambor <tim.pambor@codewrights.de>
Change the default of the mac address for a few example boards
to use the "unique" option based on the chip unique ID,
instead of random. The RW was chosen because it has HWINFO implemented
currently. RT1050 was chosen as one of the RT boards.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
Use the HWINFO API for getting the unique mac address, and use the
pre-existing hardcoded macros as fallbacks if hwinfo is not implemented
properly.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
The DHT driver incorrectly assumes all sensor instances are the same
type as the first instance (dht@0). The data parsing logic uses a
hardcoded check of the devicetree property for instance 0, which
causes incorrect readings when different sensor models (e.g., DHT11
and DHT22) are used together.
This change stores the model type in each per-instance config struct
during initialization. The data parsing logic is updated to use this
per-instance flag, ensuring each sensor is handled correctly
according to its specific model.
Signed-off-by: John Shelton <moosery@gmail.com>
Adds details on a new optional parameter for the OS mgmt reset
command which can specify the boot mode
Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
Adds an optional boot mode field which can be used to boot into a
specific image or mode using MCUmgr's OS mgmt reset command
Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
- Adds NXP platforms for the filesystem.fat.ram.api test case.
- Renames prj_native_ram.conf to prj_ram.conf,
as it can be used by all platforms.
Signed-off-by: Andrej Butok <andrey.butok@nxp.com>
