Commit graph

26 commits

Author SHA1 Message Date
Kumar Gala
cc334c7273 Convert remaining code to using newly introduced integer sized types
Convert code to use u{8,16,32,64}_t and s{8,16,32,64}_t instead of C99
integer types.  This handles the remaining includes and kernel, plus
touching up various points that we skipped because of include
dependancies.  We also convert the PRI printf formatters in the arch
code over to normal formatters.

Jira: ZEP-2051

Change-Id: Iecbb12601a3ee4ea936fd7ddea37788a645b08b0
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2017-04-21 11:38:23 -05:00
Anas Nashif
110df98619 Merge "Merge arm branch into master" 2017-02-11 04:00:58 +00:00
Andy Gross
ac37e3e2c7 arm: include: Add DTS generated file to arch.h
This patch moves the include for the generated_dts_board.h inside of
the include/arch/arm/arch.h file.  This was done to simplify the
includes required for files.  Only two files will include the dts
generated include file directly: arch.h and the linker.ld

Change-Id: I2614f4fd4eeed2ab635a3264d7dac8b83f97b760
Signed-off-by: Andy Gross <andy.gross@linaro.org>
2017-02-10 15:31:26 -06:00
Kumar Gala
6ca87b576e arm: cmsis: Remove last bits of scs/scb as we've converted to CMSIS
We now use CMSIS for ARM Cortex-M SoCs so we can remove the last bits of
scs and scb.

Jira: ZEP-1568

Change-Id: I0c7c45b0321dc402ed594e9faffb5109922edcf0
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2017-02-10 15:14:23 -06:00
Kumar Gala
52cf45c62a arm: cmsis: Convert _Scb*Fault*Reset to use direct CMSIS register access
Coverted:
	_ScbMemFaultMmfarReset
	_ScbBusFaultBfarReset
	_ScbUsageFaultAllFaultsReset

To use direct CMSIS register access.

Also removed scb.h and references as there is no longer any code in it.

Jira: ZEP-1568

Change-Id: I469f6af39d1bd41db712454b0b3e5ab331979033
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2017-02-10 14:47:41 -06:00
Kumar Gala
69b9d345ae arm: cmsis: Remove nvic.h and use CMSIS NVIC calls directly
Kill of nvic.h and use either CMSIS helper functions for NVIC or direct
NVIC register access via CMSIS for IRQ handling code.

Jira: ZEP-1568

Change-Id: If21910b9293121efe85c3c9076a1c2b475ef91ef
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2017-01-30 11:02:36 -06:00
David B. Kinder
ac74d8b652 license: Replace Apache boilerplate with SPDX tag
Replace the existing Apache 2.0 boilerplate header with an SPDX tag
throughout the zephyr code tree. This patch was generated via a
script run over the master branch.

Also updated doc/porting/application.rst that had a dependency on
line numbers in a literal include.

Manually updated subsys/logging/sys_log.c that had a malformed
header in the original file.  Also cleanup several cases that already
had a SPDX tag and we either got a duplicate or missed updating.

Jira: ZEP-1457

Change-Id: I6131a1d4ee0e58f5b938300c2d2fc77d2e69572c
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2017-01-19 03:50:58 +00:00
Anas Nashif
ea8c6aad24 kernel: remove last nanokernel ocrrurances from include/
Jira: ZEP-1323
Change-Id: I32e2dc33406a74c2e592bb2df215bd9170bf286d
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-12-25 14:34:43 -05:00
Anas Nashif
5ad2905532 arm: remove old GDB_INFO support
That module is not used anymore: it was introduced pre-Zephyr to add
some kind of awareness when debugging ARM Cortex-M3 code with GDB but
was never really used by anyone. It has bitrotted, and with the recent
move of the tTCS and tNANO data structures to common _kernel and
k_thread, it does not even compile anymore.

Jira: ZEP-1284, ZEP-951

Change-Id: Ic9afed00f4229324fe5d2aa97dc6f1c935953244
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-12-19 19:17:30 +00:00
Dan Kalowsky
983ec93bd4 arch: arm: move nmi to common location
The nmi_on_reset.S functions are used by all ARM platforms.  It
makes no sense to repeat the same code for all platforms.  Moving
the code from each SOC implementation to arch/arm/core.

The same treatment for the NMI_INIT() macro.  Moving it from a per
SOC implementation to the include/arch/arm/cortex_m/nmi.h.

Change-Id: I574d8880a44046cc7b9e1b635e80d6e83657b8c1
Signed-off-by: Dan Kalowsky <daniel.kalowsky@intel.com>
2016-03-12 03:20:36 +00:00
Jeff Blais
6896a7c2b4 arm: add generic memory-mapped I/O routines for Cortex-M
Add sys_read32(), sys_write32 and sys_set_bit() routines.

Change-Id: I4c624f30cda743d575afdef7f7790d6cc260e01d
Signed-off-by: Jeff Blais <jeff.blais@windriver.com>
2016-03-09 06:39:15 +00:00
Benjamin Walsh
85138855f0 arm: add macro for defining GPRs with aliases
On ARM, GPRs are often known by two names. E.g. the stack pointer is
both 'sp' and 'r13', the first parameter to a function 'a1' and 'r0',
etc. This macro allows defining them in a data structure, e.g. in the
ESF,  without having to create a union, use the correct type, etc: it is
less error-prone and makes for shorter code.

	sys_define_gpr_with_alias(name1, name2)

Change-Id: Ie4a6caa1ac23f26be4f7f0e05e9265f2655062cc
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
2016-02-05 20:25:24 -05:00
Anas Nashif
275ca60b08 Fixed file description and applied doxygen style
Removed old style file description and documnetation and apply
doxygen synatx.

Change-Id: I3ac9f06d4f574bf3c79c6f6044cec3a7e2f6e4c8
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-02-05 20:24:58 -05:00
Benjamin Walsh
4690457b17 arm: Add paddr_t/vaddr_t
ARM targets now have access to the address types 'paddr_t' and 'vaddr_t'.

Change-Id: Ic7225647f3776d4afa853cf2c4a19699b656866a
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
2016-02-05 20:24:41 -05:00
Dan Kalowsky
da67b29569 checkpatch: warning - block_comment_style
Change-Id: I6da43e41f9c6efee577b70513ec368ae3cce0144
Signed-off-by: Dan Kalowsky <daniel.kalowsky@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-02-05 20:24:33 -05:00
Javier B Perez Hernandez
f7fffae8aa Change BSD-3 licenses to Apache 2
Change all the Intel and Wind River code license from BSD-3 to Apache 2.

Change-Id: Id8be2c1c161a06ea8a0b9f38e17660e11dbb384b
Signed-off-by: Javier B Perez Hernandez <javier.b.perez.hernandez@linux.intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Signed-off-by: Allan Stephens <allan.stephens@windriver.com>
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
2016-02-05 20:24:29 -05:00
Anas Nashif
218e148ade trivial: fixed typo addressible -> addressable
Change-Id: I1fde074c3747862fd34319ad7ae0bb8a9a8bb7e5
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-02-05 20:24:23 -05:00
Benjamin Walsh
97f2622f55 arm: rename instances of CortexM
Directory names: CortexM -> cortex_m
Code comments: CortexM -> Cortex-M

Change-Id: If946ed25fac863e0be9dbb6f6c275199402b0b0a
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
2016-02-05 20:15:27 -05:00
Benjamin Walsh
910970ed0f ffs: remove non-inline find_[first|last]_set()
The inline versions are renamed to remove the _inline suffix, and the
non-inline versions are removed from the code base.

Change-Id: Iee2e6adcfb5da1fe0a978a05aa854e10ae82a8b8
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
2016-02-05 20:15:25 -05:00
Anas Nashif
ea0d0b220c doxygen: change comment style to match javadoc
The change replaces multiple asterisks to ** at
the beginning of comments and adds a space before
the asterisks at the beginning of lines.

Change-Id: I7656bde3bf4d9a31e38941e43b580520432dabc1
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-02-05 20:14:32 -05:00
Peter Mitsis
25fd37d9d5 Rename option CPU_CORTEXM to CPU_CORTEX_M
Makes name more consistent with other CPU_CORTEX_M* options.

Change-Id: I65968cb300207ba0de6231d9a67f2720be77b6ba
Signed-off-by: Peter Mitsis <peter.mitsis@windriver.com>
2016-02-05 20:14:25 -05:00
Allan Stephens
53165a631b Eliminate architecture-specific init.h files
These files now have no useful content.

Change-Id: If5d2df361eb8769ca38c4ae63f68a5681b3ad85b
Signed-off-by: Allan Stephens <allan.stephens@windriver.com>
2016-02-05 20:14:15 -05:00
Allan Stephens
f547a5b7b8 Eliminate cputype.h and its arch-specific derivatives
Since cputype.h no longer has any meaningful content it can be
eliminated, along with the arch-specific files it incorporated.
(This means that the arch-specific nanokernel public APIs are
now referenced only via cpu.h and its derivatives.)

Change-Id: I7f35b6c3c6c092d61c372ff85d73e49414474938
Signed-off-by: Allan Stephens <allan.stephens@windriver.com>
2016-02-05 20:14:15 -05:00
Allan Stephens
03a2abe737 Relocate macros for supporting non-byte addressible architectures
Moves these macros to the main public API include file for each
supported architecture, since the <arch>type.h include file is
to be eliminated.

Change-Id: Ia87b9c0bed1501bcce7f363bd4155f7ef642376a
Signed-off-by: Allan Stephens <allan.stephens@windriver.com>
2016-02-05 20:14:14 -05:00
Peter Mitsis
ad74658009 Add __stack tag for aligning task/fiber stacks
The "__stack" tag is to be used to align an array (to STACK_ALIGN) for stack
use by either a fiber or task.

Change-Id: I5828f3ee1b09b0b5ba894ea30689d179de347494
Signed-off-by: Peter Mitsis <peter.mitsis@windriver.com>
2016-02-05 20:14:13 -05:00
Dan Kalowsky
c02dd34277 Renaming include/nanokernel to include/arch
Renaming the directory include/nanokernel to be include/arch, which
better reflects the real nature of the directory and the contents
inside.

Change-Id: I2bc33ebc6715e2f0403227a558279fdf52398ade
Signed-off-by: Dan Kalowsky <daniel.kalowsky@intel.com>
2016-02-05 20:14:12 -05:00
Renamed from include/nanokernel/arm/arch.h (Browse further)