Add __stack tag for aligning task/fiber stacks

The "__stack" tag is to be used to align an array (to STACK_ALIGN) for stack
use by either a fiber or task.

Change-Id: I5828f3ee1b09b0b5ba894ea30689d179de347494
Signed-off-by: Peter Mitsis <peter.mitsis@windriver.com>
This commit is contained in:
Peter Mitsis 2015-05-26 10:21:42 -04:00 committed by Anas Nashif
commit ad74658009
7 changed files with 33 additions and 27 deletions

View file

@ -354,7 +354,7 @@ void *_NewContext(
* stack
*/
ccs = (tCCS *)ROUND_UP(pStackMem, CCS_ALIGN);
ccs = (tCCS *)ROUND_UP(pStackMem, STACK_ALIGN);
_NewContextInternal(ccs, pStackMem, stackSize, priority, options);

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@ -68,31 +68,6 @@ offsets.o module.
#define STACK_ALIGN_SIZE 4
/*
* Alignment requirement for the tFpRegSet structure
*
* If support for SSEx extensions is enabled a 16 byte boundary is required,
* since the 'fxsave' and 'fxrstor' instructions require this. In all other
* cases a 4 byte bounday is sufficient.
*/
#ifdef CONFIG_SSE
#define FP_REG_SET_ALIGN 16
#else
#define FP_REG_SET_ALIGN 4
#endif /* CONFIG_SSE */
/*
* Alignment requirement for the CCS structure
*
* The CCS must be aligned to the same boundary as that used by
* the FP register set that appears at the end of the structure.
* This applies even for contexts that don't initially use floating point,
* since it is possible to enable floating point support later on.
*/
#define CCS_ALIGN FP_REG_SET_ALIGN
/*
* Bitmask definitions for the tCCS->flags bit field
*

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@ -60,6 +60,8 @@ extern "C" {
#include <arch/arc/v2/arcv2_irq_unit.h>
#endif
#define STACK_ALIGN 4
#ifdef __cplusplus
}
#endif

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@ -64,6 +64,8 @@ extern "C" {
#include <arch/arm/CortexM/asm_inline.h>
#endif
#define STACK_ALIGN 4
#ifdef __cplusplus
}
#endif

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@ -71,8 +71,30 @@ by the generic nanokernel interface header (nanokernel.h)
#define _INT_STUB_ALIGN 1
#endif
typedef unsigned char __aligned(_INT_STUB_ALIGN) NANO_INT_STUB[_INT_STUB_SIZE];
/*
* Floating point register set alignment.
*
* If support for SSEx extensions is enabled a 16 byte boundary is required,
* since the 'fxsave' and 'fxrstor' instructions require this. In all other
* cases a 4 byte bounday is sufficient.
*/
#ifdef CONFIG_SSE
#define FP_REG_SET_ALIGN 16
#else
#define FP_REG_SET_ALIGN 4
#endif
/*
* The CCS must be aligned to the same boundary as that used by the floating
* point register set. This applies even for contexts that don't initially
* use floating point, since it is possible to enable floating point support
* later on.
*/
#define STACK_ALIGN FP_REG_SET_ALIGN
typedef unsigned char __aligned(_INT_STUB_ALIGN) NANO_INT_STUB[_INT_STUB_SIZE];
typedef struct s_isrList {
void *fnc; /* Address of ISR/stub */

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@ -34,6 +34,7 @@
#define _MICROKERNEL_H
#include <nanokernel.h>
#include <arch/cpu.h>
#include <cputype.h>
#include <microkernel/k_types.h>

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@ -122,6 +122,10 @@ Macros to abstract compiler capabilities (common to all toolchains).
#define _STRINGIFY(x) #x
/* Indicate that an array will be used for stack space. */
#define __stack __aligned(STACK_ALIGN)
#ifdef CONFIG_UNALIGNED_WRITE_UNSUPPORTED
extern void _Unaligned32Write(unsigned int *ptr, unsigned int val);
extern unsigned _Unaligned32Read(unsigned int *ptr);