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Convert remaining code to using newly introduced integer sized types

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Convert code to use u{8,16,32,64}_t and s{8,16,32,64}_t instead of C99
integer types.  This handles the remaining includes and kernel, plus
touching up various points that we skipped because of include
dependancies.  We also convert the PRI printf formatters in the arch
code over to normal formatters.

Jira: ZEP-2051

Change-Id: Iecbb12601a3ee4ea936fd7ddea37788a645b08b0
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This commit is contained in:
Kumar Gala 2017-04-21 10:55:34 -05:00
commit cc334c7273
132 changed files with 1420 additions and 1429 deletions
Download patch file Download diff file Expand all files Collapse all files

2
arch/arc/core/fault.c
View file

@ -53,7 +53,7 @@ void _FaultDump(const NANO_ESF *esf, int fault)
u32_t exc_addr = _arc_v2_aux_reg_read(_ARC_V2_EFA);
u32_t ecr = _arc_v2_aux_reg_read(_ARC_V2_ECR);
PR_EXC("Exception vector: 0x%x, cause code: 0x%x, parameter 0x%xn",
PR_EXC("Exception vector: 0x%x, cause code: 0x%x, parameter 0x%x\n",
_ARC_V2_ECR_VECTOR(ecr),
_ARC_V2_ECR_CODE(ecr),
_ARC_V2_ECR_PARAMETER(ecr));

2
arch/arc/core/irq_manage.c
View file

@ -74,7 +74,7 @@ void _arch_irq_disable(unsigned int irq)
* @return N/A
*/
void _irq_priority_set(unsigned int irq, unsigned int prio, uint32_t flags)
void _irq_priority_set(unsigned int irq, unsigned int prio, u32_t flags)
{
ARG_UNUSED(flags);

29
arch/arm/core/cortex_m/exc_manage.c
View file

@ -15,24 +15,23 @@
#include <misc/printk.h>
void sys_exc_esf_dump(NANO_ESF *esf)
{
printk("r0/a1: %" PRIx32 " ", esf->a1);
printk("r1/a2: %" PRIx32 " ", esf->a2);
printk("r2/a3: %" PRIx32 "\n", esf->a3);
printk("r3/a4: %" PRIx32 " ", esf->a4);
printk("r12/ip: %" PRIx32 " ", esf->ip);
printk("r14/lr: %" PRIx32 "\n", esf->lr);
printk("r15/pc: %" PRIx32 " ", esf->pc);
printk("xpsr: %" PRIx32 "\n", esf->xpsr);
printk("r0/a1: %x ", esf->a1);
printk("r1/a2: %x ", esf->a2);
printk("r2/a3: %x\n", esf->a3);
printk("r3/a4: %x ", esf->a4);
printk("r12/ip: %x ", esf->ip);
printk("r14/lr: %x\n", esf->lr);
printk("r15/pc: %x ", esf->pc);
printk("xpsr: %x\n", esf->xpsr);
#ifdef CONFIG_FLOAT
for (int i = 0; i < 16; i += 4) {
printk("s[%d]: %" PRIx32 " s[%d]: %" PRIx32 " s[%d]: %"
PRIx32 " s[%d]: %" PRIx32 "\n",
i, (uint32_t)esf->s[i],
i + 1, (uint32_t)esf->s[i + 1],
i + 2, (uint32_t)esf->s[i + 2],
i + 3, (uint32_t)esf->s[i + 3]);
printk("s[%d]: %x s[%d]: %x s[%d]: %x s[%d]: %x\n",
i, (u32_t)esf->s[i],
i + 1, (u32_t)esf->s[i + 1],
i + 2, (u32_t)esf->s[i + 2],
i + 3, (u32_t)esf->s[i + 3]);
}
printk("fpscr: %" PRIx32 "\n", esf->fpscr);
printk("fpscr: %x\n", esf->fpscr);
#endif
}

2
arch/arm/core/fatal.c
View file

@ -89,7 +89,7 @@ FUNC_NORETURN void _NanoFatalErrorHandler(unsigned int reason,
break;
}
PR_EXC("Current thread ID = %p\n"
"Faulting instruction address = 0x%" PRIx32 "\n",
"Faulting instruction address = 0x%x\n",
k_current_get(), pEsf->pc);
/*

16
arch/arm/core/fault.c
View file

@ -54,7 +54,7 @@
*/
void _FaultDump(const NANO_ESF *esf, int fault)
{
PR_EXC("Fault! EXC #%d, Thread: %p, instr @ 0x%" PRIx32 "\n",
PR_EXC("Fault! EXC #%d, Thread: %p, instr @ 0x%x\n",
fault,
k_current_get(),
esf->pc);
@ -70,18 +70,18 @@ void _FaultDump(const NANO_ESF *esf, int fault)
: "Bus fault on vector table read\n");
}
PR_EXC("MMFSR: 0x%" PRIx32 ", BFSR: 0x%" PRIx32 ", UFSR: 0x%"
PRIx32 "\n", SCB_MMFSR, SCB_BFSR, SCB_MMFSR);
PR_EXC("MMFSR: 0x%x, BFSR: 0x%x, UFSR: 0x%x\n",
SCB_MMFSR, SCB_BFSR, SCB_MMFSR);
if (SCB->CFSR & CFSR_MMARVALID_Msk) {
PR_EXC("MMFAR: 0x%" PRIx32 "\n", SCB->MMFAR);
PR_EXC("MMFAR: 0x%x\n", SCB->MMFAR);
if (escalation) {
/* clear MMAR[VALID] to reset */
SCB->CFSR &= ~CFSR_MMARVALID_Msk;
}
}
if (SCB->CFSR & CFSR_BFARVALID_Msk) {
PR_EXC("BFAR: 0x%" PRIx32 "\n", SCB->BFAR);
PR_EXC("BFAR: 0x%x\n", SCB->BFAR);
if (escalation) {
/* clear CFSR_BFAR[VALID] to reset */
SCB->CFSR &= ~CFSR_BFARVALID_Msk;
@ -108,7 +108,7 @@ void _FaultDump(const NANO_ESF *esf, int fault)
static void _FaultThreadShow(const NANO_ESF *esf)
{
PR_EXC(" Executing thread ID (thread): %p\n"
" Faulting instruction address: 0x%" PRIx32 "\n",
" Faulting instruction address: 0x%x\n",
k_current_get(), esf->pc);
}
@ -136,7 +136,7 @@ static void _MpuFault(const NANO_ESF *esf, int fromHardFault)
} else if (SCB->CFSR & CFSR_DACCVIOL_Msk) {
PR_EXC(" Data Access Violation\n");
if (SCB->CFSR & CFSR_MMARVALID_Msk) {
PR_EXC(" Address: 0x%" PRIx32 "\n", SCB->MMFAR);
PR_EXC(" Address: 0x%x\n", (u32_t)SCB->MMFAR);
if (fromHardFault) {
/* clear MMAR[VALID] to reset */
SCB->CFSR &= ~CFSR_MMARVALID_Msk;
@ -168,7 +168,7 @@ static void _BusFault(const NANO_ESF *esf, int fromHardFault)
} else if (SCB->CFSR & CFSR_PRECISERR_Msk) {
PR_EXC(" Precise data bus error\n");
if (SCB->CFSR & CFSR_BFARVALID_Msk) {
PR_EXC(" Address: 0x%" PRIx32 "\n", SCB->BFAR);
PR_EXC(" Address: 0x%x\n", (u32_t)SCB->BFAR);
if (fromHardFault) {
/* clear CFSR_BFAR[VALID] to reset */
SCB->CFSR &= ~CFSR_BFARVALID_Msk;

2
arch/arm/core/irq_manage.c
View file

@ -82,7 +82,7 @@ int _arch_irq_is_enabled(unsigned int irq)
*
* @return N/A
*/
void _irq_priority_set(unsigned int irq, unsigned int prio, uint32_t flags)
void _irq_priority_set(unsigned int irq, unsigned int prio, u32_t flags)
{
/* Hardware priority levels 0 and 1 reserved for Kernel use.
* So we add 2 to the requested priority level. If we support

16
arch/nios2/core/fatal.c
View file

@ -78,16 +78,12 @@ FUNC_NORETURN void _NanoFatalErrorHandler(unsigned int reason,
* registers, at the expense of some stack space.
*/
printk("Current thread ID: %p\n"
"Faulting instruction: 0x%" PRIx32 "\n"
" r1: 0x%" PRIx32 " r2: 0x%" PRIx32
" r3: 0x%" PRIx32 " r4: 0x%" PRIx32 "\n"
" r5: 0x%" PRIx32 " r6: 0x%" PRIx32
" r7: 0x%" PRIx32 " r8: 0x%" PRIx32 "\n"
" r9: 0x%" PRIx32 " r10: 0x%" PRIx32
" r11: 0x%" PRIx32 " r12: 0x%" PRIx32 "\n"
" r13: 0x%" PRIx32 " r14: 0x%" PRIx32
" r15: 0x%" PRIx32 " ra: 0x%" PRIx32 "\n"
"estatus: %" PRIx32 "\n", k_current_get(), esf->instr - 4,
"Faulting instruction: 0x%x\n"
" r1: 0x%x r2: 0x%x r3: 0x%x r4: 0x%x\n"
" r5: 0x%x r6: 0x%x r7: 0x%x r8: 0x%x\n"
" r9: 0x%x r10: 0x%x r11: 0x%x r12: 0x%x\n"
" r13: 0x%x r14: 0x%x r15: 0x%x ra: 0x%x\n"
"estatus: %x\n", k_current_get(), esf->instr - 4,
esf->r1, esf->r2, esf->r3, esf->r4,
esf->r5, esf->r6, esf->r7, esf->r8,
esf->r9, esf->r10, esf->r11, esf->r12,

16
arch/riscv32/core/fatal.c
View file

@ -91,16 +91,12 @@ FUNC_NORETURN void _NanoFatalErrorHandler(unsigned int reason,
}
PRINTK("Current thread ID = %p\n"
"Faulting instruction address = 0x%" PRIx32 "\n"
" ra: 0x%" PRIx32 " gp: 0x%" PRIx32
" tp: 0x%" PRIx32 " t0: 0x%" PRIx32 "\n"
" t1: 0x%" PRIx32 " t2: 0x%" PRIx32
" t3: 0x%" PRIx32 " t4: 0x%" PRIx32 "\n"
" t5: 0x%" PRIx32 " t6: 0x%" PRIx32
" a0: 0x%" PRIx32 " a1: 0x%" PRIx32 "\n"
" a2: 0x%" PRIx32 " a3: 0x%" PRIx32
" a4: 0x%" PRIx32 " a5: 0x%" PRIx32 "\n"
" a6: 0x%" PRIx32 " a7: 0x%" PRIx32 "\n",
"Faulting instruction address = 0x%x\n"
" ra: 0x%x gp: 0x%x tp: 0x%x t0: 0x%x\n"
" t1: 0x%x t2: 0x%x t3: 0x%x t4: 0x%x\n"
" t5: 0x%x t6: 0x%x a0: 0x%x a1: 0x%x\n"
" a2: 0x%x a3: 0x%x a4: 0x%x a5: 0x%x\n"
" a6: 0x%x a7: 0x%x\n",
k_current_get(),
(esf->mepc == 0xdeadbaad) ? 0xdeadbaad : esf->mepc - 4,
esf->ra, esf->gp, esf->tp, esf->t0,

2
arch/x86/core/fatal.c
View file

@ -192,7 +192,7 @@ FUNC_NORETURN void page_fault_handler(const NANO_ESF *pEsf)
err = pEsf->errorCode;
printk("***** CPU Page Fault (error code 0x%08x)\n", err);
printk("%s thread %s address 0x%08" PRIx32 "\n",
printk("%s thread %s address 0x%08x\n",
err & US ? "User" : "Supervisor",
err & ID ? "executed" : (err & WR ? "wrote" : "read"),
cr2);

2
drivers/grove/lcd_rgb.c
View file

@ -102,7 +102,7 @@ static inline void _sleep(u32_t sleep_in_ms)
/********************************************
* PUBLIC FUNCTIONS
*******************************************/
void glcd_print(struct device *port, char *data, uint32_t size)
void glcd_print(struct device *port, char *data, u32_t size)
{
const struct glcd_driver * const rom = (struct glcd_driver *)
port->config->config_info;

2
drivers/i2c/i2c_atmel_sam3.c
View file

@ -184,7 +184,7 @@ static u32_t clk_div_calc(struct device *dev)
#endif /* CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC == 84000000 */
}
static int i2c_sam3_runtime_configure(struct device *dev, uint32_t config)
static int i2c_sam3_runtime_configure(struct device *dev, u32_t config)
{
const struct i2c_sam3_dev_config * const cfg = dev->config->config_info;
struct i2c_sam3_dev_data * const dev_data = dev->driver_data;

2
drivers/i2c/i2c_qmsi_ss.c
View file

@ -219,7 +219,7 @@ static void i2c_qmsi_ss_config_irq_1(void)
}
#endif /* CONFIG_I2C_SS_1 */
static int i2c_qmsi_ss_configure(struct device *dev, uint32_t config)
static int i2c_qmsi_ss_configure(struct device *dev, u32_t config)
{
qm_ss_i2c_t instance = GET_CONTROLLER_INSTANCE(dev);
struct i2c_qmsi_ss_driver_data *driver_data = GET_DRIVER_DATA(dev);

2
drivers/timer/altera_avalon_timer.c
View file

@ -96,7 +96,7 @@ int _sys_clock_driver_init(struct device *device)
}
uint32_t _timer_cycle_get_32(void)
u32_t _timer_cycle_get_32(void)
{
/* XXX Per the Altera Embedded IP Peripherals guide, you cannot
* use a timer instance for both the system clock and timestamps

2
drivers/timer/arcv2_timer0.c
View file

@ -413,7 +413,7 @@ int sys_clock_device_ctrl(struct device *port, u32_t ctrl_command,
}
#endif /* CONFIG_DEVICE_POWER_MANAGEMENT */
uint32_t _timer_cycle_get_32(void)
u32_t _timer_cycle_get_32(void)
{
u32_t acc, count;

2
drivers/timer/cortex_m_systick.c
View file

@ -557,7 +557,7 @@ int _sys_clock_driver_init(struct device *device)
* systick counter is a 24-bit down counter which is reset to "reload" value
* once it reaches 0.
*/
uint32_t _timer_cycle_get_32(void)
u32_t _timer_cycle_get_32(void)
{
u32_t cac, count;

2
drivers/timer/hpet.c
View file

@ -593,7 +593,7 @@ int _sys_clock_driver_init(struct device *device)
* it will need to call _hpetMainCounterAtomic().
*/
uint32_t _timer_cycle_get_32(void)
u32_t _timer_cycle_get_32(void)
{
return (u32_t) *_HPET_MAIN_COUNTER_VALUE;
}

2
drivers/timer/loapic_timer.c
View file

@ -581,7 +581,7 @@ int sys_clock_device_ctrl(struct device *port, u32_t ctrl_command,
*
* @return up counter of elapsed clock cycles
*/
uint32_t _timer_cycle_get_32(void)
u32_t _timer_cycle_get_32(void)
{
#if CONFIG_TSC_CYCLES_PER_SEC != 0
u64_t tsc;

2
drivers/timer/nrf_rtc_timer.c
View file

@ -305,7 +305,7 @@ int _sys_clock_driver_init(struct device *device)
return 0;
}
uint32_t _timer_cycle_get_32(void)
u32_t _timer_cycle_get_32(void)
{
u32_t elapsed_cycles;

2
drivers/timer/pulpino_timer.c
View file

@ -68,7 +68,7 @@ int _sys_clock_driver_init(struct device *device)
*
* @return up counter of elapsed clock cycles
*/
uint32_t _timer_cycle_get_32(void)
u32_t _timer_cycle_get_32(void)
{
return accumulated_cycle_count + timer->val;
}

2
drivers/timer/riscv_machine_timer.c
View file

@ -97,7 +97,7 @@ int _sys_clock_driver_init(struct device *device)
*
* @return up counter of elapsed clock cycles
*/
uint32_t _timer_cycle_get_32(void)
u32_t _timer_cycle_get_32(void)
{
/* We just want a cycle count so just post what's in the low 32
* bits of the mtime real-time counter

14
include/adc.h
View file

@ -34,18 +34,18 @@ extern "C" {
*/
struct adc_seq_entry {
/** Clock ticks delay before sampling the ADC. */
int32_t sampling_delay;
s32_t sampling_delay;
/** Buffer pointer where the sample is written.*/
uint8_t *buffer;
u8_t *buffer;
/** Length of the sampling buffer.*/
uint32_t buffer_length;
u32_t buffer_length;
/** Channel ID that should be sampled from the ADC */
uint8_t channel_id;
u8_t channel_id;
uint8_t stride[3];
u8_t stride[3];
};
/**
@ -59,8 +59,8 @@ struct adc_seq_table {
struct adc_seq_entry *entries;
/* Number of entries in the sequence entry array. */
uint8_t num_entries;
uint8_t stride[3];
u8_t num_entries;
u8_t stride[3];
};
/**

10
include/aio_comparator.h
View file

@ -23,12 +23,12 @@ enum aio_cmp_polarity {
typedef void (*aio_cmp_cb)(void *);
typedef int (*aio_cmp_api_disable)(struct device *dev, uint8_t index);
typedef int (*aio_cmp_api_disable)(struct device *dev, u8_t index);
typedef int (*aio_cmp_api_configure)(struct device *dev, uint8_t index,
typedef int (*aio_cmp_api_configure)(struct device *dev, u8_t index,
enum aio_cmp_polarity polarity, enum aio_cmp_ref refsel,
aio_cmp_cb cb, void *param);
typedef uint32_t (*aio_cmp_api_get_pending_int)(struct device *dev);
typedef u32_t (*aio_cmp_api_get_pending_int)(struct device *dev);
struct aio_cmp_driver_api {
aio_cmp_api_disable disable;
@ -46,7 +46,7 @@ struct aio_cmp_driver_api {
*
* @return 0 if successful, otherwise failed.
*/
static inline int aio_cmp_disable(struct device *dev, uint8_t index)
static inline int aio_cmp_disable(struct device *dev, u8_t index)
{
const struct aio_cmp_driver_api *api = dev->driver_api;
@ -68,7 +68,7 @@ static inline int aio_cmp_disable(struct device *dev, uint8_t index)
*
* @return 0 if successful, otherwise failed.
*/
static inline int aio_cmp_configure(struct device *dev, uint8_t index,
static inline int aio_cmp_configure(struct device *dev, u8_t index,
enum aio_cmp_polarity polarity,
enum aio_cmp_ref refsel,
aio_cmp_cb cb, void *param)

74
include/arch/arc/v2/asm_inline_gcc.h
View file

@ -24,43 +24,43 @@ extern "C" {
/**
* @brief read timestamp register (CPU frequency)
*/
extern uint64_t _tsc_read(void);
extern u64_t _tsc_read(void);
/* Implementation of sys_io.h's documented functions */
static ALWAYS_INLINE
void sys_out8(uint8_t data, io_port_t port)
void sys_out8(u8_t data, io_port_t port)
{
_arc_v2_aux_reg_write(port, data);
}
static ALWAYS_INLINE
uint8_t sys_in8(io_port_t port)
u8_t sys_in8(io_port_t port)
{
return (uint8_t)(_arc_v2_aux_reg_read(port) & 0x000000ff);
return (u8_t)(_arc_v2_aux_reg_read(port) & 0x000000ff);
}
static ALWAYS_INLINE
void sys_out16(uint16_t data, io_port_t port)
void sys_out16(u16_t data, io_port_t port)
{
_arc_v2_aux_reg_write(port, data);
}
static ALWAYS_INLINE
uint16_t sys_in16(io_port_t port)
u16_t sys_in16(io_port_t port)
{
return (uint16_t)(_arc_v2_aux_reg_read(port) & 0x0000ffff);
return (u16_t)(_arc_v2_aux_reg_read(port) & 0x0000ffff);
}
static ALWAYS_INLINE
void sys_out32(uint32_t data, io_port_t port)
void sys_out32(u32_t data, io_port_t port)
{
_arc_v2_aux_reg_write(port, data);
}
static ALWAYS_INLINE
uint32_t sys_in32(io_port_t port)
u32_t sys_in32(io_port_t port)
{
return _arc_v2_aux_reg_read(port);
}
@ -68,7 +68,7 @@ static ALWAYS_INLINE
static ALWAYS_INLINE
void sys_io_set_bit(io_port_t port, unsigned int bit)
{
uint32_t reg = 0;
u32_t reg = 0;
__asm__ volatile("lr %1, [%0]\n"
"bset %1, %1, %2\n"
@ -82,7 +82,7 @@ static ALWAYS_INLINE
static ALWAYS_INLINE
void sys_io_clear_bit(io_port_t port, unsigned int bit)
{
uint32_t reg = 0;
u32_t reg = 0;
__asm__ volatile("lr %1, [%0]\n"
"bclr %1, %1, %2\n"
@ -96,9 +96,9 @@ static ALWAYS_INLINE
static ALWAYS_INLINE
int sys_io_test_bit(io_port_t port, unsigned int bit)
{
uint32_t status = _ARC_V2_STATUS32;
uint32_t reg = 0;
uint32_t ret;
u32_t status = _ARC_V2_STATUS32;
u32_t reg = 0;
u32_t ret;
__asm__ volatile("lr %2, [%1]\n"
"btst %2, %3\n"
@ -134,66 +134,66 @@ static ALWAYS_INLINE
}
static ALWAYS_INLINE
void sys_write8(uint8_t data, mm_reg_t addr)
void sys_write8(u8_t data, mm_reg_t addr)
{
__asm__ volatile("stb%U1 %0, %1;\n\t"
:
: "r" (data), "m" (*(volatile uint8_t *) addr)
: "r" (data), "m" (*(volatile u8_t *) addr)
: "memory");
}
static ALWAYS_INLINE
uint8_t sys_read8(mm_reg_t addr)
u8_t sys_read8(mm_reg_t addr)
{
uint8_t ret;
u8_t ret;
__asm__ volatile("ldb%U1 %0, %1;\n\t"
: "=r" (ret)
: "m" (*(volatile uint8_t *) addr)
: "m" (*(volatile u8_t *) addr)
: "memory");
return ret;
}
static ALWAYS_INLINE
void sys_write16(uint16_t data, mm_reg_t addr)
void sys_write16(u16_t data, mm_reg_t addr)
{
__asm__ volatile("sth%U1 %0, %1;\n\t"
:
: "r" (data), "m" (*(volatile uint16_t *) addr)
: "r" (data), "m" (*(volatile u16_t *) addr)
: "memory");
}
static ALWAYS_INLINE
uint16_t sys_read16(mm_reg_t addr)
u16_t sys_read16(mm_reg_t addr)
{
uint16_t ret;
u16_t ret;
__asm__ volatile("ldh%U1 %0, %1;\n\t"
: "=r" (ret)
: "m" (*(volatile uint16_t *) addr)
: "m" (*(volatile u16_t *) addr)
: "memory");
return ret;
}
static ALWAYS_INLINE
void sys_write32(uint32_t data, mm_reg_t addr)
void sys_write32(u32_t data, mm_reg_t addr)
{
__asm__ volatile("st%U1 %0, %1;\n\t"
:
: "r" (data), "m" (*(volatile uint32_t *) addr)
: "r" (data), "m" (*(volatile u32_t *) addr)
: "memory");
}
static ALWAYS_INLINE
uint32_t sys_read32(mm_reg_t addr)
u32_t sys_read32(mm_reg_t addr)
{
uint32_t ret;
u32_t ret;
__asm__ volatile("ld%U1 %0, %1;\n\t"
: "=r" (ret)
: "m" (*(volatile uint32_t *) addr)
: "m" (*(volatile u32_t *) addr)
: "memory");
return ret;
@ -202,12 +202,12 @@ static ALWAYS_INLINE
static ALWAYS_INLINE
void sys_set_bit(mem_addr_t addr, unsigned int bit)
{
uint32_t reg = 0;
u32_t reg = 0;
__asm__ volatile("ld %1, %0\n"
"bset %1, %1, %2\n"
"st %1, %0;\n\t"
: "+m" (*(volatile uint32_t *) addr)
: "+m" (*(volatile u32_t *) addr)
: "r" (reg), "Mr" (bit)
: "memory", "cc");
}
@ -215,12 +215,12 @@ static ALWAYS_INLINE
static ALWAYS_INLINE
void sys_clear_bit(mem_addr_t addr, unsigned int bit)
{
uint32_t reg = 0;
u32_t reg = 0;
__asm__ volatile("ld %1, %0\n"
"bclr %1, %1, %2\n"
"st %1, %0;\n\t"
: "+m" (*(volatile uint32_t *) addr)
: "+m" (*(volatile u32_t *) addr)
: "r" (reg), "Mr" (bit)
: "memory", "cc");
}
@ -228,15 +228,15 @@ static ALWAYS_INLINE
static ALWAYS_INLINE
int sys_test_bit(mem_addr_t addr, unsigned int bit)
{
uint32_t status = _ARC_V2_STATUS32;
uint32_t reg = 0;
uint32_t ret;
u32_t status = _ARC_V2_STATUS32;
u32_t reg = 0;
u32_t ret;
__asm__ volatile("ld %2, %1\n"
"btst %2, %3\n"
"lr %0, [%4];\n\t"
: "=r" (ret)
: "m" (*(volatile uint32_t *) addr),
: "m" (*(volatile u32_t *) addr),
"r" (reg), "Mr" (bit), "i" (status)
: "memory", "cc");

4
include/arch/arc/v2/aux_regs.h
View file

@ -113,8 +113,8 @@ extern "C" {
#if defined(__GNUC__)
#include <zephyr/types.h>
#define _arc_v2_aux_reg_read(reg) __builtin_arc_lr((volatile uint32_t)reg)
#define _arc_v2_aux_reg_write(reg, val) __builtin_arc_sr((unsigned int)val, (volatile uint32_t)reg)
#define _arc_v2_aux_reg_read(reg) __builtin_arc_lr((volatile u32_t)reg)
#define _arc_v2_aux_reg_write(reg, val) __builtin_arc_sr((unsigned int)val, (volatile u32_t)reg)
#else /* ! __GNUC__ */

4
include/arch/arc/v2/ffs.h
View file

@ -35,7 +35,7 @@ extern "C" {
*/
#if defined(__GNUC__)
static ALWAYS_INLINE unsigned int find_msb_set(uint32_t op)
static ALWAYS_INLINE unsigned int find_msb_set(u32_t op)
{
unsigned int bit;
@ -64,7 +64,7 @@ static ALWAYS_INLINE unsigned int find_msb_set(uint32_t op)
*/
#if defined(__GNUC__)
static ALWAYS_INLINE unsigned int find_lsb_set(uint32_t op)
static ALWAYS_INLINE unsigned int find_lsb_set(u32_t op)
{
unsigned int bit;

2
include/arch/arc/v2/irq.h
View file

@ -35,7 +35,7 @@ extern void _arch_irq_disable(unsigned int irq);
extern void _irq_exit(void);
extern void _irq_priority_set(unsigned int irq, unsigned int prio,
uint32_t flags);
u32_t flags);
extern void _isr_wrapper(void);
extern void _irq_spurious(void *unused);

2
include/arch/arc/v2/misc.h
View file

@ -23,7 +23,7 @@ extern unsigned int k_cpu_sleep_mode;
extern void k_cpu_idle(void);
extern void k_cpu_atomic_idle(unsigned int key);
extern uint32_t _timer_cycle_get_32(void);
extern u32_t _timer_cycle_get_32(void);
#define _arch_k_cycle_get_32() _timer_cycle_get_32()
#endif

2
include/arch/arm/arch.h
View file

@ -24,7 +24,7 @@ extern "C" {
#endif
/* ARM GPRs are often designated by two different names */
#define sys_define_gpr_with_alias(name1, name2) union { uint32_t name1, name2; }
#define sys_define_gpr_with_alias(name1, name2) union { u32_t name1, name2; }
/* APIs need to support non-byte addressable architectures */

4
include/arch/arm/cortex_m/asm_inline_gcc.h
View file

@ -45,7 +45,7 @@ extern "C" {
* @return most significant bit set, 0 if @a op is 0
*/
static ALWAYS_INLINE unsigned int find_msb_set(uint32_t op)
static ALWAYS_INLINE unsigned int find_msb_set(u32_t op)
{
if (!op) {
return 0;
@ -67,7 +67,7 @@ static ALWAYS_INLINE unsigned int find_msb_set(uint32_t op)
* @return least significant bit set, 0 if @a op is 0
*/
static ALWAYS_INLINE unsigned int find_lsb_set(uint32_t op)
static ALWAYS_INLINE unsigned int find_lsb_set(u32_t op)
{
return __builtin_ffs(op);
}

6
include/arch/arm/cortex_m/cmsis.h
View file

@ -36,9 +36,9 @@ extern "C" {
#define CPACR_CP11_RESERVED (2UL << CPACR_CP11_Pos)
#define CPACR_CP11_FULL_ACCESS (3UL << CPACR_CP11_Pos)
#define SCB_UFSR (*((__IOM uint16_t *) &SCB->CFSR + 2))
#define SCB_BFSR (*((__IOM uint8_t *) &SCB->CFSR + 1))
#define SCB_MMFSR (*((__IOM uint8_t *) &SCB->CFSR))
#define SCB_UFSR (*((__IOM u16_t *) &SCB->CFSR + 2))
#define SCB_BFSR (*((__IOM u8_t *) &SCB->CFSR + 1))
#define SCB_MMFSR (*((__IOM u8_t *) &SCB->CFSR))
/* CFSR[UFSR] */
#define CFSR_DIVBYZERO_Pos (25U)

6
include/arch/arm/cortex_m/exc.h
View file

@ -53,11 +53,11 @@ struct __esf {
sys_define_gpr_with_alias(ip, r12);
sys_define_gpr_with_alias(lr, r14);
sys_define_gpr_with_alias(pc, r15);
uint32_t xpsr;
u32_t xpsr;
#ifdef CONFIG_FLOAT
float s[16];
uint32_t fpscr;
uint32_t undefined;
u32_t fpscr;
u32_t undefined;
#endif
};

2
include/arch/arm/cortex_m/irq.h
View file

@ -43,7 +43,7 @@ extern void _IntExit(void);
/* internal routine documented in C file, needed by IRQ_CONNECT() macro */
extern void _irq_priority_set(unsigned int irq, unsigned int prio,
uint32_t flags);
u32_t flags);
/* Flags for use with IRQ_CONNECT() */

2
include/arch/arm/cortex_m/misc.h
View file

@ -21,7 +21,7 @@ extern "C" {
#ifndef _ASMLANGUAGE
extern void k_cpu_idle(void);
extern uint32_t _timer_cycle_get_32(void);
extern u32_t _timer_cycle_get_32(void);
#define _arch_k_cycle_get_32() _timer_cycle_get_32()
#endif

16
include/arch/arm/cortex_m/sys_io.h
View file

@ -17,15 +17,15 @@
/* Memory mapped registers I/O functions */
static inline uint32_t sys_read32(mem_addr_t addr)
static inline u32_t sys_read32(mem_addr_t addr)
{
return *(volatile uint32_t *)addr;
return *(volatile u32_t *)addr;
}
static inline void sys_write32(uint32_t data, mem_addr_t addr)
static inline void sys_write32(u32_t data, mem_addr_t addr)
{
*(volatile uint32_t *)addr = data;
*(volatile u32_t *)addr = data;
}
@ -33,16 +33,16 @@ static inline void sys_write32(uint32_t data, mem_addr_t addr)
static inline void sys_set_bit(mem_addr_t addr, unsigned int bit)
{
uint32_t temp = *(volatile uint32_t *)addr;
u32_t temp = *(volatile u32_t *)addr;
*(volatile uint32_t *)addr = temp | (1 << bit);
*(volatile u32_t *)addr = temp | (1 << bit);
}
static inline void sys_clear_bit(mem_addr_t addr, unsigned int bit)
{
uint32_t temp = *(volatile uint32_t *)addr;
u32_t temp = *(volatile u32_t *)addr;
*(volatile uint32_t *)addr = temp & ~(1 << bit);
*(volatile u32_t *)addr = temp & ~(1 << bit);
}
#endif /* !_ASMLANGUAGE */

38
include/arch/nios2/arch.h
View file

@ -131,24 +131,24 @@ void _arch_irq_enable(unsigned int irq);
void _arch_irq_disable(unsigned int irq);
struct __esf {
uint32_t ra; /* return address r31 */
uint32_t r1; /* at */
uint32_t r2; /* return value */
uint32_t r3; /* return value */
uint32_t r4; /* register args */
uint32_t r5; /* register args */
uint32_t r6; /* register args */
uint32_t r7; /* register args */
uint32_t r8; /* Caller-saved general purpose */
uint32_t r9; /* Caller-saved general purpose */
uint32_t r10; /* Caller-saved general purpose */
uint32_t r11; /* Caller-saved general purpose */
uint32_t r12; /* Caller-saved general purpose */
uint32_t r13; /* Caller-saved general purpose */
uint32_t r14; /* Caller-saved general purpose */
uint32_t r15; /* Caller-saved general purpose */
uint32_t estatus;
uint32_t instr; /* Instruction being executed when exc occurred */
u32_t ra; /* return address r31 */
u32_t r1; /* at */
u32_t r2; /* return value */
u32_t r3; /* return value */
u32_t r4; /* register args */
u32_t r5; /* register args */
u32_t r6; /* register args */
u32_t r7; /* register args */
u32_t r8; /* Caller-saved general purpose */
u32_t r9; /* Caller-saved general purpose */
u32_t r10; /* Caller-saved general purpose */
u32_t r11; /* Caller-saved general purpose */
u32_t r12; /* Caller-saved general purpose */
u32_t r13; /* Caller-saved general purpose */
u32_t r14; /* Caller-saved general purpose */
u32_t r15; /* Caller-saved general purpose */
u32_t estatus;
u32_t instr; /* Instruction being executed when exc occurred */
};
typedef struct __esf NANO_ESF;
@ -199,7 +199,7 @@ enum nios2_exception_cause {
BIT(NIOS2_EXCEPTION_ECC_DATA_ERR))
extern uint32_t _timer_cycle_get_32(void);
extern u32_t _timer_cycle_get_32(void);
#define _arch_k_cycle_get_32() _timer_cycle_get_32()
#endif /* _ASMLANGUAGE */

16
include/arch/nios2/asm_inline_gcc.h
View file

@ -32,7 +32,7 @@ extern "C" {
* @return most significant bit set, 0 if @a op is 0
*/
static ALWAYS_INLINE unsigned int find_msb_set(uint32_t op)
static ALWAYS_INLINE unsigned int find_msb_set(u32_t op)
{
if (!op)
return 0;
@ -51,7 +51,7 @@ static ALWAYS_INLINE unsigned int find_msb_set(uint32_t op)
* @return least significant bit set, 0 if @a op is 0
*/
static ALWAYS_INLINE unsigned int find_lsb_set(uint32_t op)
static ALWAYS_INLINE unsigned int find_lsb_set(u32_t op)
{
return __builtin_ffs(op);
}
@ -61,37 +61,37 @@ static ALWAYS_INLINE unsigned int find_lsb_set(uint32_t op)
*/
static ALWAYS_INLINE
void sys_write32(uint32_t data, mm_reg_t addr)
void sys_write32(u32_t data, mm_reg_t addr)
{
__builtin_stwio((void *)addr, data);
}
static ALWAYS_INLINE
uint32_t sys_read32(mm_reg_t addr)
u32_t sys_read32(mm_reg_t addr)
{
return __builtin_ldwio((void *)addr);
}
static ALWAYS_INLINE
void sys_write8(uint8_t data, mm_reg_t addr)
void sys_write8(u8_t data, mm_reg_t addr)
{
sys_write32(data, addr);
}
static ALWAYS_INLINE
uint8_t sys_read8(mm_reg_t addr)
u8_t sys_read8(mm_reg_t addr)
{
return __builtin_ldbuio((void *)addr);
}
static ALWAYS_INLINE
void sys_write16(uint16_t data, mm_reg_t addr)
void sys_write16(u16_t data, mm_reg_t addr)
{
sys_write32(data, addr);
}
static ALWAYS_INLINE
uint16_t sys_read16(mm_reg_t addr)
u16_t sys_read16(mm_reg_t addr)
{
return __builtin_ldhuio((void *)addr);
}

22
include/arch/nios2/nios2.h
View file

@ -60,22 +60,22 @@ extern "C"
*/
/* ET (Exception Temporary) register */
static inline uint32_t _nios2_read_et(void)
static inline u32_t _nios2_read_et(void)
{
uint32_t et;
u32_t et;
__asm__("mov %0, et" : "=r" (et));
return et;
}
static inline void _nios2_write_et(uint32_t et)
static inline void _nios2_write_et(u32_t et)
{
__asm__ volatile("mov et, %z0" : : "rM" (et));
}
static inline uint32_t _nios2_read_sp(void)
static inline u32_t _nios2_read_sp(void)
{
uint32_t sp;
u32_t sp;
__asm__("mov %0, sp" : "=r" (sp));
return sp;
@ -102,12 +102,12 @@ static inline void _nios2_dcache_addr_flush(void *addr)
__asm__ volatile ("flushda (%0)" :: "r" (addr));
}
static inline void _nios2_dcache_flush(uint32_t offset)
static inline void _nios2_dcache_flush(u32_t offset)
{
__asm__ volatile ("flushd (%0)" :: "r" (offset));
}
static inline void _nios2_icache_flush(uint32_t offset)
static inline void _nios2_icache_flush(u32_t offset)
{
__asm__ volatile ("flushi %0" :: "r" (offset));
}
@ -145,7 +145,7 @@ enum nios2_creg {
* we get errors "Control register number must be in range 0-31 for
* __builtin_rdctl" with the following code:
*
* static inline uint32_t _nios2_creg_read(enum nios2_creg reg)
* static inline u32_t _nios2_creg_read(enum nios2_creg reg)
* {
* return __builtin_rdctl(reg);
* }
@ -156,14 +156,14 @@ enum nios2_creg {
#define _nios2_creg_write(reg, val) __builtin_wrctl(reg, val)
#define _nios2_get_register_address(base, regnum) \
((void *)(((uint8_t *)base) + ((regnum) * (SYSTEM_BUS_WIDTH / 8))))
((void *)(((u8_t *)base) + ((regnum) * (SYSTEM_BUS_WIDTH / 8))))
static inline void _nios2_reg_write(void *base, int regnum, uint32_t data)
static inline void _nios2_reg_write(void *base, int regnum, u32_t data)
{
sys_write32(data, (mm_reg_t)_nios2_get_register_address(base, regnum));
}
static inline uint32_t _nios2_reg_read(void *base, int regnum)
static inline u32_t _nios2_reg_read(void *base, int regnum)
{
return sys_read32((mm_reg_t)_nios2_get_register_address(base, regnum));
}

4
include/arch/riscv32/arch.h
View file

@ -51,7 +51,7 @@ extern "C" {
* SOC-specific function to get the IRQ number generating the interrupt.
* __soc_get_irq returns a bitfield of pending IRQs.
*/
extern uint32_t __soc_get_irq(void);
extern u32_t __soc_get_irq(void);
void _arch_irq_enable(unsigned int irq);
void _arch_irq_disable(unsigned int irq);
@ -118,7 +118,7 @@ static ALWAYS_INLINE void _arch_irq_unlock(unsigned int key)
: "memory");
}
extern uint32_t _timer_cycle_get_32(void);
extern u32_t _timer_cycle_get_32(void);
#define _arch_k_cycle_get_32() _timer_cycle_get_32()
#endif /*_ASMLANGUAGE */

52
include/arch/riscv32/exp.h
View file

@ -23,38 +23,38 @@ extern "C" {
#include <toolchain.h>
struct __esf {
uint32_t ra; /* return address */
uint32_t gp; /* global pointer */
uint32_t tp; /* thread pointer */
u32_t ra; /* return address */
u32_t gp; /* global pointer */
u32_t tp; /* thread pointer */
uint32_t t0; /* Caller-saved temporary register */
uint32_t t1; /* Caller-saved temporary register */
uint32_t t2; /* Caller-saved temporary register */
uint32_t t3; /* Caller-saved temporary register */
uint32_t t4; /* Caller-saved temporary register */
uint32_t t5; /* Caller-saved temporary register */
uint32_t t6; /* Caller-saved temporary register */
u32_t t0; /* Caller-saved temporary register */
u32_t t1; /* Caller-saved temporary register */
u32_t t2; /* Caller-saved temporary register */
u32_t t3; /* Caller-saved temporary register */
u32_t t4; /* Caller-saved temporary register */
u32_t t5; /* Caller-saved temporary register */
u32_t t6; /* Caller-saved temporary register */
uint32_t a0; /* function argument/return value */
uint32_t a1; /* function argument */
uint32_t a2; /* function argument */
uint32_t a3; /* function argument */
uint32_t a4; /* function argument */
uint32_t a5; /* function argument */
uint32_t a6; /* function argument */
uint32_t a7; /* function argument */
u32_t a0; /* function argument/return value */
u32_t a1; /* function argument */
u32_t a2; /* function argument */
u32_t a3; /* function argument */
u32_t a4; /* function argument */
u32_t a5; /* function argument */
u32_t a6; /* function argument */
u32_t a7; /* function argument */
uint32_t mepc; /* machine exception program counter */
uint32_t mstatus; /* machine status register */
u32_t mepc; /* machine exception program counter */
u32_t mstatus; /* machine status register */
#if defined(CONFIG_SOC_RISCV32_PULPINO)
/* pulpino hardware loop registers */
uint32_t lpstart0;
uint32_t lpend0;
uint32_t lpcount0;
uint32_t lpstart1;
uint32_t lpend1;
uint32_t lpcount1;
u32_t lpstart0;
u32_t lpend0;
u32_t lpcount0;
u32_t lpstart1;
u32_t lpend1;
u32_t lpcount1;
#endif
};

4
include/arch/riscv32/fe310/asm_inline_gcc.h
View file

@ -32,7 +32,7 @@ extern "C" {
*
* @return least significant bit set, 0 if @a op is 0
*/
static ALWAYS_INLINE unsigned int find_lsb_set(uint32_t op)
static ALWAYS_INLINE unsigned int find_lsb_set(u32_t op)
{
return __builtin_ffs(op);
}
@ -48,7 +48,7 @@ static ALWAYS_INLINE unsigned int find_lsb_set(uint32_t op)
*
* @return most significant bit set, 0 if @a op is 0
*/
static ALWAYS_INLINE unsigned int find_msb_set(uint32_t op)
static ALWAYS_INLINE unsigned int find_msb_set(u32_t op)
{
if (!op)
return 0;

8
include/arch/riscv32/pulpino/asm_inline_gcc.h
View file

@ -38,7 +38,7 @@ extern "C" {
*
* @return least significant bit set, 0 if @a op is 0
*/
static ALWAYS_INLINE unsigned int find_lsb_set(uint32_t op)
static ALWAYS_INLINE unsigned int find_lsb_set(u32_t op)
{
unsigned int ret;
@ -63,7 +63,7 @@ static ALWAYS_INLINE unsigned int find_lsb_set(uint32_t op)
*
* @return most significant bit set, 0 if @a op is 0
*/
static ALWAYS_INLINE unsigned int find_msb_set(uint32_t op)
static ALWAYS_INLINE unsigned int find_msb_set(u32_t op)
{
unsigned int ret;
@ -84,12 +84,12 @@ static ALWAYS_INLINE unsigned int find_msb_set(uint32_t op)
* __builtin_ffs and __builtin_clz to handle respectively
* find_lsb_set and find_msb_set.
*/
static ALWAYS_INLINE unsigned int find_lsb_set(uint32_t op)
static ALWAYS_INLINE unsigned int find_lsb_set(u32_t op)
{
return __builtin_ffs(op);
}
static ALWAYS_INLINE unsigned int find_msb_set(uint32_t op)
static ALWAYS_INLINE unsigned int find_msb_set(u32_t op)
{
if (!op)
return 0;

4
include/arch/riscv32/riscv32-qemu/asm_inline_gcc.h
View file

@ -33,7 +33,7 @@ extern "C" {
*
* @return least significant bit set, 0 if @a op is 0
*/
static ALWAYS_INLINE unsigned int find_lsb_set(uint32_t op)
static ALWAYS_INLINE unsigned int find_lsb_set(u32_t op)
{
return __builtin_ffs(op);
}
@ -49,7 +49,7 @@ static ALWAYS_INLINE unsigned int find_lsb_set(uint32_t op)
*
* @return most significant bit set, 0 if @a op is 0
*/
static ALWAYS_INLINE unsigned int find_msb_set(uint32_t op)
static ALWAYS_INLINE unsigned int find_msb_set(u32_t op)
{
if (!op)
return 0;

26
include/arch/riscv32/sys_io.h
View file

@ -17,47 +17,47 @@
/* Memory mapped registers I/O functions */
static inline uint32_t sys_read32(mem_addr_t addr)
static inline u32_t sys_read32(mem_addr_t addr)
{
return *(volatile uint32_t *)addr;
return *(volatile u32_t *)addr;
}
static inline void sys_write32(uint32_t data, mem_addr_t addr)
static inline void sys_write32(u32_t data, mem_addr_t addr)
{
*(volatile uint32_t *)addr = data;
*(volatile u32_t *)addr = data;
}
static inline uint8_t sys_read8(mem_addr_t addr)
static inline u8_t sys_read8(mem_addr_t addr)
{
return *(volatile uint8_t *)addr;
return *(volatile u8_t *)addr;
}
static inline void sys_write8(uint8_t data, mem_addr_t addr)
static inline void sys_write8(u8_t data, mem_addr_t addr)
{
*(volatile uint8_t *)addr = data;
*(volatile u8_t *)addr = data;
}
/* Memory bit manipulation functions */
static inline void sys_set_bit(mem_addr_t addr, unsigned int bit)
{
uint32_t temp = *(volatile uint32_t *)addr;
u32_t temp = *(volatile u32_t *)addr;
*(volatile uint32_t *)addr = temp | (1 << bit);
*(volatile u32_t *)addr = temp | (1 << bit);
}
static inline void sys_clear_bit(mem_addr_t addr, unsigned int bit)
{
uint32_t temp = *(volatile uint32_t *)addr;
u32_t temp = *(volatile u32_t *)addr;
*(volatile uint32_t *)addr = temp & ~(1 << bit);
*(volatile u32_t *)addr = temp & ~(1 << bit);
}
static ALWAYS_INLINE
int sys_test_bit(mem_addr_t addr, unsigned int bit)
{
uint32_t temp = *(volatile uint32_t *)addr;
u32_t temp = *(volatile u32_t *)addr;
return temp & (1 << bit);
}

2
include/arch/x86/arch.h
View file

@ -488,7 +488,7 @@ extern void k_float_disable(k_tid_t thread);
extern void k_cpu_idle(void);
extern uint32_t _timer_cycle_get_32(void);
extern u32_t _timer_cycle_get_32(void);
#define _arch_k_cycle_get_32() _timer_cycle_get_32()
/** kernel provided routine to report any detected fatal error. */

80
include/arch/x86/asm_inline_gcc.h
View file

@ -96,7 +96,7 @@ static ALWAYS_INLINE void _do_irq_unlock(void)
* after the 'cmovzl', the correct results are yielded.
*/
static ALWAYS_INLINE unsigned int find_lsb_set(uint32_t op)
static ALWAYS_INLINE unsigned int find_lsb_set(u32_t op)
{
unsigned int bitpos;
@ -146,7 +146,7 @@ static ALWAYS_INLINE unsigned int find_lsb_set(uint32_t op)
* after the 'cmovzl', the correct results are yielded.
*/
static ALWAYS_INLINE unsigned int find_msb_set(uint32_t op)
static ALWAYS_INLINE unsigned int find_msb_set(u32_t op)
{
unsigned int bitpos;
@ -180,14 +180,14 @@ static ALWAYS_INLINE unsigned int find_msb_set(uint32_t op)
* @brief read timestamp register ensuring serialization
*/
static inline uint64_t _tsc_read(void)
static inline u64_t _tsc_read(void)
{
union {
struct {
uint32_t lo;
uint32_t hi;
u32_t lo;
u32_t hi;
};
uint64_t value;
u64_t value;
} rv;
/* rdtsc & cpuid clobbers eax, ebx, ecx and edx registers */
@ -217,9 +217,9 @@ static inline uint64_t _tsc_read(void)
*/
static ALWAYS_INLINE
uint32_t _do_read_cpu_timestamp32(void)
u32_t _do_read_cpu_timestamp32(void)
{
uint32_t rv;
u32_t rv;
__asm__ volatile("rdtsc" : "=a"(rv) : : "%edx");
@ -230,7 +230,7 @@ static ALWAYS_INLINE
/* Implementation of sys_io.h's documented functions */
static ALWAYS_INLINE
void sys_out8(uint8_t data, io_port_t port)
void sys_out8(u8_t data, io_port_t port)
{
__asm__ volatile("outb %b0, %w1;\n\t"
:
@ -239,9 +239,9 @@ void sys_out8(uint8_t data, io_port_t port)
static ALWAYS_INLINE
uint8_t sys_in8(io_port_t port)
u8_t sys_in8(io_port_t port)
{
uint8_t ret;
u8_t ret;
__asm__ volatile("inb %w1, %b0;\n\t"
: "=a"(ret)
@ -251,7 +251,7 @@ static ALWAYS_INLINE
static ALWAYS_INLINE
void sys_out16(uint16_t data, io_port_t port)
void sys_out16(u16_t data, io_port_t port)
{
__asm__ volatile("outw %w0, %w1;\n\t"
:
@ -260,9 +260,9 @@ static ALWAYS_INLINE
static ALWAYS_INLINE
uint16_t sys_in16(io_port_t port)
u16_t sys_in16(io_port_t port)
{
uint16_t ret;
u16_t ret;
__asm__ volatile("inw %w1, %w0;\n\t"
: "=a"(ret)
@ -272,7 +272,7 @@ static ALWAYS_INLINE
static ALWAYS_INLINE
void sys_out32(uint32_t data, io_port_t port)
void sys_out32(u32_t data, io_port_t port)
{
__asm__ volatile("outl %0, %w1;\n\t"
:
@ -281,9 +281,9 @@ static ALWAYS_INLINE
static ALWAYS_INLINE
uint32_t sys_in32(io_port_t port)
u32_t sys_in32(io_port_t port)
{
uint32_t ret;
u32_t ret;
__asm__ volatile("inl %w1, %0;\n\t"
: "=a"(ret)
@ -295,7 +295,7 @@ static ALWAYS_INLINE
static ALWAYS_INLINE
void sys_io_set_bit(io_port_t port, unsigned int bit)
{
uint32_t reg = 0;
u32_t reg = 0;
__asm__ volatile("inl %w1, %0;\n\t"
"btsl %2, %0;\n\t"
@ -307,7 +307,7 @@ static ALWAYS_INLINE
static ALWAYS_INLINE
void sys_io_clear_bit(io_port_t port, unsigned int bit)
{
uint32_t reg = 0;
u32_t reg = 0;
__asm__ volatile("inl %w1, %0;\n\t"
"btrl %2, %0;\n\t"
@ -319,7 +319,7 @@ static ALWAYS_INLINE
static ALWAYS_INLINE
int sys_io_test_bit(io_port_t port, unsigned int bit)
{
uint32_t ret;
u32_t ret;
__asm__ volatile("inl %w1, %0\n\t"
"btl %2, %0\n\t"
@ -352,66 +352,66 @@ static ALWAYS_INLINE
}
static ALWAYS_INLINE
void sys_write8(uint8_t data, mm_reg_t addr)
void sys_write8(u8_t data, mm_reg_t addr)
{
__asm__ volatile("movb %0, %1;\n\t"
:
: "q"(data), "m" (*(volatile uint8_t *) addr)
: "q"(data), "m" (*(volatile u8_t *) addr)
: "memory");
}
static ALWAYS_INLINE
uint8_t sys_read8(mm_reg_t addr)
u8_t sys_read8(mm_reg_t addr)
{
uint8_t ret;
u8_t ret;
__asm__ volatile("movb %1, %0;\n\t"
: "=q"(ret)
: "m" (*(volatile uint8_t *) addr)
: "m" (*(volatile u8_t *) addr)
: "memory");
return ret;
}
static ALWAYS_INLINE
void sys_write16(uint16_t data, mm_reg_t addr)
void sys_write16(u16_t data, mm_reg_t addr)
{
__asm__ volatile("movw %0, %1;\n\t"
:
: "r"(data), "m" (*(volatile uint16_t *) addr)
: "r"(data), "m" (*(volatile u16_t *) addr)
: "memory");
}
static ALWAYS_INLINE
uint16_t sys_read16(mm_reg_t addr)
u16_t sys_read16(mm_reg_t addr)
{
uint16_t ret;
u16_t ret;
__asm__ volatile("movw %1, %0;\n\t"
: "=r"(ret)
: "m" (*(volatile uint16_t *) addr)
: "m" (*(volatile u16_t *) addr)
: "memory");
return ret;
}
static ALWAYS_INLINE
void sys_write32(uint32_t data, mm_reg_t addr)
void sys_write32(u32_t data, mm_reg_t addr)
{
__asm__ volatile("movl %0, %1;\n\t"
:
: "r"(data), "m" (*(volatile uint32_t *) addr)
: "r"(data), "m" (*(volatile u32_t *) addr)
: "memory");
}
static ALWAYS_INLINE
uint32_t sys_read32(mm_reg_t addr)
u32_t sys_read32(mm_reg_t addr)
{
uint32_t ret;
u32_t ret;
__asm__ volatile("movl %1, %0;\n\t"
: "=r"(ret)
: "m" (*(volatile uint32_t *) addr)
: "m" (*(volatile u32_t *) addr)
: "memory");
return ret;
@ -422,7 +422,7 @@ static ALWAYS_INLINE
void sys_set_bit(mem_addr_t addr, unsigned int bit)
{
__asm__ volatile("btsl %1, %0;\n\t"
: "+m" (*(volatile uint32_t *) (addr))
: "+m" (*(volatile u32_t *) (addr))
: "Ir" (bit)
: "memory");
}
@ -431,7 +431,7 @@ static ALWAYS_INLINE
void sys_clear_bit(mem_addr_t addr, unsigned int bit)
{
__asm__ volatile("btrl %1, %0;\n\t"
: "+m" (*(volatile uint32_t *) (addr))
: "+m" (*(volatile u32_t *) (addr))
: "Ir" (bit));
}
@ -442,7 +442,7 @@ static ALWAYS_INLINE
__asm__ volatile("btl %2, %1;\n\t"
"sbb %0, %0\n\t"
: "=r" (ret), "+m" (*(volatile uint32_t *) (addr))
: "=r" (ret), "+m" (*(volatile u32_t *) (addr))
: "Ir" (bit));
return ret;
@ -455,7 +455,7 @@ static ALWAYS_INLINE
__asm__ volatile("btsl %2, %1;\n\t"
"sbb %0, %0\n\t"
: "=r" (ret), "+m" (*(volatile uint32_t *) (addr))
: "=r" (ret), "+m" (*(volatile u32_t *) (addr))
: "Ir" (bit));
return ret;
@ -468,7 +468,7 @@ static ALWAYS_INLINE
__asm__ volatile("btrl %2, %1;\n\t"
"sbb %0, %0\n\t"
: "=r" (ret), "+m" (*(volatile uint32_t *) (addr))
: "=r" (ret), "+m" (*(volatile u32_t *) (addr))
: "Ir" (bit));
return ret;

2
include/arch/x86/irq_controller.h
View file

@ -63,7 +63,7 @@
* @returns: N/A
*/
static inline void _irq_controller_irq_config(unsigned int vector,
unsigned int irq, uint32_t flags)
unsigned int irq, u32_t flags)
{
__irq_controller_irq_config(vector, irq, flags);
}

176
include/arch/x86/segmentation.h
View file

@ -69,56 +69,56 @@ extern "C" {
/* Section 7.2.1 of IA architecture SW developer manual, Vol 3. */
struct __packed task_state_segment {
uint16_t backlink;
uint16_t reserved_1;
uint32_t esp0;
uint16_t ss0;
uint16_t reserved_2;
uint32_t esp1;
uint16_t ss1;
uint16_t reserved_3;
uint32_t esp2;
uint16_t ss2;
uint16_t reserved_4;
uint32_t cr3;
uint32_t eip;
uint32_t eflags;
uint32_t eax;
uint32_t ecx;
uint32_t edx;
uint32_t ebx;
uint32_t esp;
uint32_t ebp;
uint32_t esi;
uint32_t edi;
uint16_t es;
uint16_t reserved_5;
uint16_t cs;
uint16_t reserved_6;
uint16_t ss;
uint16_t reserved_7;
uint16_t ds;
uint16_t reserved_8;
uint16_t fs;
uint16_t reserved_9;
uint16_t gs;
uint16_t reserved_10;
uint16_t ldt_ss;
uint16_t reserved_11;
uint8_t t:1; /* Trap bit */
uint16_t reserved_12:15;
uint16_t iomap;
u16_t backlink;
u16_t reserved_1;
u32_t esp0;
u16_t ss0;
u16_t reserved_2;
u32_t esp1;
u16_t ss1;
u16_t reserved_3;
u32_t esp2;
u16_t ss2;
u16_t reserved_4;
u32_t cr3;
u32_t eip;
u32_t eflags;
u32_t eax;
u32_t ecx;
u32_t edx;
u32_t ebx;
u32_t esp;
u32_t ebp;
u32_t esi;
u32_t edi;
u16_t es;
u16_t reserved_5;
u16_t cs;
u16_t reserved_6;
u16_t ss;
u16_t reserved_7;
u16_t ds;
u16_t reserved_8;
u16_t fs;
u16_t reserved_9;
u16_t gs;
u16_t reserved_10;
u16_t ldt_ss;
u16_t reserved_11;
u8_t t:1; /* Trap bit */
u16_t reserved_12:15;
u16_t iomap;
};
/* Section 3.4.2 of IA architecture SW developer manual, Vol 3. */
struct __packed segment_selector {
union {
struct {
uint8_t rpl:2;
uint8_t table:1; /* 0=gdt 1=ldt */
uint16_t index:13;
u8_t rpl:2;
u8_t table:1; /* 0=gdt 1=ldt */
u16_t index:13;
};
uint16_t val;
u16_t val;
};
};
@ -138,39 +138,39 @@ struct __packed segment_descriptor {
/* First DWORD: 0-15 */
union {
/* IRQ, call, trap gates */
uint16_t limit_low;
u16_t limit_low;
/* Task gates */
uint16_t reserved_task_gate_0;
u16_t reserved_task_gate_0;
/* Everything else */
uint16_t offset_low;
u16_t offset_low;
};
/* First DWORD: 16-31 */
union {
/* Call/Task/Interrupt/Trap gates */
uint16_t segment_selector;
u16_t segment_selector;
/* TSS/LDT/Segments */
uint16_t base_low; /* Bits 0-15 */
u16_t base_low; /* Bits 0-15 */
};
/* Second DWORD: 0-7 */
union {
/* TSS/LDT/Segments */
uint8_t base_mid; /* Bits 16-23 */
u8_t base_mid; /* Bits 16-23 */
/* Task gates */
uint8_t reserved_task_gate_1;
u8_t reserved_task_gate_1;
/* IRQ/Trap/Call Gates */
struct {
/* Reserved except in case of call gates */
uint8_t reserved_or_param:5;
u8_t reserved_or_param:5;
/* Bits 5-7 0 0 0 per CPU manual */
uint8_t always_0_0:3;
u8_t always_0_0:3;
};
};
@ -179,59 +179,59 @@ struct __packed segment_descriptor {
/* Code or data Segments */
struct {
/* Set by the processor, init to 0 */
uint8_t accessed:1;
u8_t accessed:1;
/* executable ? readable : writable */
uint8_t rw:1;
u8_t rw:1;
/* executable ? conforming : direction */
uint8_t cd:1;
u8_t cd:1;
/* 1=code 0=data */
uint8_t executable:1;
u8_t executable:1;
/* Next 3 fields actually common to all */
/* 1=code or data, 0=system type */
uint8_t descriptor_type:1;
u8_t descriptor_type:1;
uint8_t dpl:2;
uint8_t present:1;
u8_t dpl:2;
u8_t present:1;
};
/* System types */
struct {
/* One of the SEG_TYPE_* macros above */
uint8_t type:4;
u8_t type:4;
/* Alas, C doesn't let you do a union of the first
* 4 bits of a bitfield and put the rest outside of it,
* it ends up getting padded.
*/
uint8_t use_other_union:4;
u8_t use_other_union:4;
};
};
/* Second DWORD: 16-31 */
union {
/* Call/IRQ/trap gates */
uint16_t offset_hi;
u16_t offset_hi;
/* Task Gates */
uint16_t reserved_task_gate_2;
u16_t reserved_task_gate_2;
/* segment/LDT/TSS */
struct {
uint8_t limit_hi:4;
u8_t limit_hi:4;
/* flags */
uint8_t avl:1; /* CPU ignores this */
u8_t avl:1; /* CPU ignores this */
/* 1=Indicates 64-bit code segment in IA-32e mode */
uint8_t flags_l:1; /* L field */
u8_t flags_l:1; /* L field */
uint8_t db:1; /* D/B field 1=32-bit 0=16-bit*/
uint8_t granularity:1;
u8_t db:1; /* D/B field 1=32-bit 0=16-bit*/
u8_t granularity:1;
uint8_t base_hi; /* Bits 24-31 */
u8_t base_hi; /* Bits 24-31 */
};
};
@ -242,7 +242,7 @@ struct __packed segment_descriptor {
* IA manual calls this a 'pseudo descriptor'.
*/
struct __packed pseudo_descriptor {
uint16_t size;
u16_t size;
struct segment_descriptor *entries;
};
@ -254,7 +254,7 @@ struct __packed far_ptr {
/** Far pointer offset, unused when invoking a task. */
void *offset;
/** Far pointer segment/gate selector. */
uint16_t sel;
u16_t sel;
};
@ -270,7 +270,7 @@ struct __packed far_ptr {
* or implement some tool to populate values post-link like gen_idt does.
*/
#define _LIMIT_AND_BASE(base_p, limit_p, granularity_p) \
.base_low = (((uint32_t)base_p) & 0xFFFF), \
.base_low = (((u32_t)base_p) & 0xFFFF), \
.base_mid = (((base_p) >> 16) & 0xFF), \
.base_hi = (((base_p) >> 24) & 0xFF), \
.limit_low = ((limit_p) & 0xFFFF), \
@ -399,8 +399,8 @@ extern struct pseudo_descriptor _gdt;
* @param segment_selector Segment selector
*/
static inline void _sd_set_seg_offset(struct segment_descriptor *sd,
uint16_t segment_selector,
uint32_t offset)
u16_t segment_selector,
u32_t offset)
{
sd->offset_low = offset & 0xFFFF;
sd->offset_hi = offset >> 16;
@ -418,8 +418,8 @@ static inline void _sd_set_seg_offset(struct segment_descriptor *sd,
* @param dpl descriptor privilege level
*/
static inline void _init_irq_gate(struct segment_descriptor *sd,
uint16_t seg_selector, uint32_t offset,
uint32_t dpl)
u16_t seg_selector, u32_t offset,
u32_t dpl)
{
_sd_set_seg_offset(sd, seg_selector, offset);
sd->dpl = dpl;
@ -434,7 +434,7 @@ static inline void _init_irq_gate(struct segment_descriptor *sd,
* @param sel Segment selector
* @param offset Offset within that selector
*/
static inline void _far_jump(uint16_t sel, void *offset)
static inline void _far_jump(u16_t sel, void *offset)
{
struct far_ptr ptr = {
.sel = sel,
@ -451,7 +451,7 @@ static inline void _far_jump(uint16_t sel, void *offset)
* @param sel Segment selector
* @param offset Offset within that selector
*/
static inline void _far_call(uint16_t sel, void *offset)
static inline void _far_call(u16_t sel, void *offset)
{
struct far_ptr ptr = {
.sel = sel,
@ -467,7 +467,7 @@ static inline void _far_call(uint16_t sel, void *offset)
*
* @param sel Segment selector in GDT for desired TSS
*/
static inline void _set_tss(uint16_t sel)
static inline void _set_tss(u16_t sel)
{
__asm__ __volatile__ ("ltr %0" :: "r" (sel));
}
@ -478,9 +478,9 @@ static inline void _set_tss(uint16_t sel)
*
* @return Segment selector for current IA task
*/
static inline uint16_t _get_tss(void)
static inline u16_t _get_tss(void)
{
uint16_t sel;
u16_t sel;
__asm__ __volatile__ ("str %0" : "=r" (sel));
return sel;
@ -514,9 +514,9 @@ static inline void _get_idt(struct pseudo_descriptor *idt)
*
* @return Segment selector in the GDT for the current LDT
*/
static inline uint16_t _get_ldt(void)
static inline u16_t _get_ldt(void)
{
uint16_t ret;
u16_t ret;
__asm__ __volatile__ ("sldt %0" : "=m" (ret));
return ret;
@ -528,7 +528,7 @@ static inline uint16_t _get_ldt(void)
*
* @param ldt Segment selector in the GDT for an LDT
*/
static inline void _set_ldt(uint16_t ldt)
static inline void _set_ldt(u16_t ldt)
{
__asm__ __volatile__ ("lldt %0" :: "m" (ldt));
@ -564,9 +564,9 @@ static inline void _set_idt(const struct pseudo_descriptor *idt)
*
* @return Segment selector
*/
static inline uint16_t _get_cs(void)
static inline u16_t _get_cs(void)
{
uint16_t cs = 0;
u16_t cs = 0;
__asm__ __volatile__ ("mov %%cs, %0" : "=r" (cs));
return cs;
@ -578,9 +578,9 @@ static inline uint16_t _get_cs(void)
*
* @return Segment selector
*/
static inline uint16_t _get_ds(void)
static inline u16_t _get_ds(void)
{
uint16_t ds = 0;
u16_t ds = 0;
__asm__ __volatile__ ("mov %%ds, %0" : "=r" (ds));
return ds;

10
include/arch/xtensa/arch.h
View file

@ -52,7 +52,7 @@ extern "C" {
#define _NANO_ERR_RESERVED_IRQ (4) /* Reserved interrupt */
/* Xtensa GPRs are often designated by two different names */
#define sys_define_gpr_with_alias(name1, name2) union { uint32_t name1, name2; }
#define sys_define_gpr_with_alias(name1, name2) union { u32_t name1, name2; }
#include <arch/xtensa/exc.h>
@ -68,7 +68,7 @@ extern "C" {
* @return most significant bit set, 0 if @a op is 0
*/
static ALWAYS_INLINE unsigned int find_msb_set(uint32_t op)
static ALWAYS_INLINE unsigned int find_msb_set(u32_t op)
{
if (!op)
return 0;
@ -87,13 +87,13 @@ static ALWAYS_INLINE unsigned int find_msb_set(uint32_t op)
* @return least significant bit set, 0 if @a op is 0
*/
static ALWAYS_INLINE unsigned int find_lsb_set(uint32_t op)
static ALWAYS_INLINE unsigned int find_lsb_set(u32_t op)
{
return __builtin_ffs(op);
}
/* internal routine documented in C file, needed by IRQ_CONNECT() macro */
extern void _irq_priority_set(uint32_t irq, uint32_t prio, uint32_t flags);
extern void _irq_priority_set(u32_t irq, u32_t prio, u32_t flags);
/**
@ -142,7 +142,7 @@ extern void _irq_priority_set(uint32_t irq, uint32_t prio, uint32_t flags);
FUNC_NORETURN void _SysFatalErrorHandler(unsigned int reason,
const NANO_ESF *esf);
extern uint32_t _timer_cycle_get_32(void);
extern u32_t _timer_cycle_get_32(void);
#define _arch_k_cycle_get_32() _timer_cycle_get_32()
#endif /* !defined(_ASMLANGUAGE) && !defined(__ASSEMBLER__) */

2
include/arch/xtensa/exc.h
View file

@ -30,7 +30,7 @@ extern "C" {
struct __esf {
/* XXX - not finished yet */
sys_define_gpr_with_alias(a1, sp);
uint32_t pc;
u32_t pc;
};
typedef struct __esf NANO_ESF;

16
include/arch/xtensa/sys_io.h
View file

@ -12,15 +12,15 @@
/* Memory mapped registers I/O functions */
static ALWAYS_INLINE uint32_t sys_read32(mem_addr_t addr)
static ALWAYS_INLINE u32_t sys_read32(mem_addr_t addr)
{
return *(volatile uint32_t *)addr;
return *(volatile u32_t *)addr;
}
static ALWAYS_INLINE void sys_write32(uint32_t data, mem_addr_t addr)
static ALWAYS_INLINE void sys_write32(u32_t data, mem_addr_t addr)
{
*(volatile uint32_t *)addr = data;
*(volatile u32_t *)addr = data;
}
@ -28,16 +28,16 @@ static ALWAYS_INLINE void sys_write32(uint32_t data, mem_addr_t addr)
static ALWAYS_INLINE void sys_set_bit(mem_addr_t addr, unsigned int bit)
{
uint32_t temp = *(volatile uint32_t *)addr;
u32_t temp = *(volatile u32_t *)addr;
*(volatile uint32_t *)addr = temp | (1 << bit);
*(volatile u32_t *)addr = temp | (1 << bit);
}
static ALWAYS_INLINE void sys_clear_bit(mem_addr_t addr, unsigned int bit)
{
uint32_t temp = *(volatile uint32_t *)addr;
u32_t temp = *(volatile u32_t *)addr;
*(volatile uint32_t *)addr = temp & ~(1 << bit);
*(volatile u32_t *)addr = temp & ~(1 << bit);
}
static ALWAYS_INLINE int sys_test_bit(mem_addr_t addr, unsigned int bit)

4
include/arch/xtensa/xtensa_irq.h
View file

@ -19,7 +19,7 @@
*
* @return N/A
*/
static ALWAYS_INLINE void _arch_irq_enable(uint32_t irq)
static ALWAYS_INLINE void _arch_irq_enable(u32_t irq)
{
_xt_ints_on(1 << irq);
}
@ -33,7 +33,7 @@ static ALWAYS_INLINE void _arch_irq_enable(uint32_t irq)
*
* @return N/A
*/
static ALWAYS_INLINE void _arch_irq_disable(uint32_t irq)
static ALWAYS_INLINE void _arch_irq_disable(u32_t irq)
{
_xt_ints_off(1 << irq);
}

4
include/clock_control.h
View file

@ -34,7 +34,7 @@ typedef int (*clock_control)(struct device *dev, clock_control_subsys_t sys);
typedef int (*clock_control_get)(struct device *dev,
clock_control_subsys_t sys,
uint32_t *rate);
u32_t *rate);
struct clock_control_driver_api {
clock_control on;
@ -79,7 +79,7 @@ static inline int clock_control_off(struct device *dev,
*/
static inline int clock_control_get_rate(struct device *dev,
clock_control_subsys_t sys,
uint32_t *rate)
u32_t *rate)
{
const struct clock_control_driver_api *api = dev->driver_api;

2
include/console.h
View file

@ -34,7 +34,7 @@ void console_getchar_init(void);
*
* @return A character read, including control characters.
*/
uint8_t console_getchar(void);
u8_t console_getchar(void);
/** @brief Initialize console_getline() call.
*

10
include/counter.h
View file

@ -31,11 +31,11 @@ typedef void (*counter_callback_t)(struct device *dev, void *user_data);
typedef int (*counter_api_start)(struct device *dev);
typedef int (*counter_api_stop)(struct device *dev);
typedef uint32_t (*counter_api_read)(struct device *dev);
typedef u32_t (*counter_api_read)(struct device *dev);
typedef int (*counter_api_set_alarm)(struct device *dev,
counter_callback_t callback,
uint32_t count, void *user_data);
typedef uint32_t (*counter_api_get_pending_int)(struct device *dev);
u32_t count, void *user_data);
typedef u32_t (*counter_api_get_pending_int)(struct device *dev);
struct counter_driver_api {
counter_api_start start;
@ -85,7 +85,7 @@ static inline int counter_stop(struct device *dev)
*
* @return 32-bit value
*/
static inline uint32_t counter_read(struct device *dev)
static inline u32_t counter_read(struct device *dev)
{
const struct counter_driver_api *api = dev->driver_api;
@ -108,7 +108,7 @@ static inline uint32_t counter_read(struct device *dev)
*/
static inline int counter_set_alarm(struct device *dev,
counter_callback_t callback,
uint32_t count, void *user_data)
u32_t count, void *user_data)
{
const struct counter_driver_api *api = dev->driver_api;

8
include/crc16.h
View file

@ -28,8 +28,8 @@
*
* @return The computed CRC16 value
*/
uint16_t crc16(const uint8_t *src, size_t len, uint16_t polynomial,
uint16_t initial_value);
u16_t crc16(const u8_t *src, size_t len, u16_t polynomial,
u16_t initial_value);
/**
* @brief Compute CCITT variant of CRC 16
@ -42,7 +42,7 @@ uint16_t crc16(const uint8_t *src, size_t len, uint16_t polynomial,
*
* @return The computed CRC16 value
*/
static inline uint16_t crc16_ccitt(const uint8_t *src, size_t len)
static inline u16_t crc16_ccitt(const u8_t *src, size_t len)
{
return crc16(src, len, 0x1021, 0xffff);
}
@ -58,7 +58,7 @@ static inline uint16_t crc16_ccitt(const uint8_t *src, size_t len)
*
* @return The computed CRC16 value
*/
static inline uint16_t crc16_ansi(const uint8_t *src, size_t len)
static inline u16_t crc16_ansi(const u8_t *src, size_t len)
{
return crc16(src, len, 0x8005, 0xffff);
}

8
include/crypto/cipher.h
View file

@ -105,7 +105,7 @@ static inline int cipher_begin_session(struct device *dev,
enum cipher_op optype)
{
struct crypto_driver_api *api;
uint32_t flags;
u32_t flags;
api = (struct crypto_driver_api *) dev->driver_api;
ctx->device = dev;
@ -210,7 +210,7 @@ static inline int cipher_block_op(struct cipher_ctx *ctx,
* @return 0 on success, negative errno code on fail.
*/
static inline int cipher_cbc_op(struct cipher_ctx *ctx,
struct cipher_pkt *pkt, uint8_t *iv)
struct cipher_pkt *pkt, u8_t *iv)
{
__ASSERT(ctx->ops.cipher_mode == CRYPTO_CIPHER_MODE_CBC, "CBC mode "
"session invoking a different mode handler");
@ -237,7 +237,7 @@ static inline int cipher_cbc_op(struct cipher_ctx *ctx,
* @return 0 on success, negative errno code on fail.
*/
static inline int cipher_ctr_op(struct cipher_ctx *ctx,
struct cipher_pkt *pkt, uint8_t *iv)
struct cipher_pkt *pkt, u8_t *iv)
{
__ASSERT(ctx->ops.cipher_mode == CRYPTO_CIPHER_MODE_CTR, "CTR mode "
"session invoking a different mode handler");
@ -259,7 +259,7 @@ static inline int cipher_ctr_op(struct cipher_ctx *ctx,
* @return 0 on success, negative errno code on fail.
*/
static inline int cipher_ccm_op(struct cipher_ctx *ctx,
struct cipher_aead_pkt *pkt, uint8_t *nonce)
struct cipher_aead_pkt *pkt, u8_t *nonce)
{
__ASSERT(ctx->ops.cipher_mode == CRYPTO_CIPHER_MODE_CCM, "CCM mode "
"session invoking a different mode handler");

30
include/crypto/cipher_structs.h
View file

@ -51,13 +51,13 @@ typedef int (*block_op_t)(struct cipher_ctx *ctx, struct cipher_pkt *pkt);
* like CBC, CTR, CCM.
*/
typedef int (*cbc_op_t)(struct cipher_ctx *ctx, struct cipher_pkt *pkt,
uint8_t *iv);
u8_t *iv);
typedef int (*ctr_op_t)(struct cipher_ctx *ctx, struct cipher_pkt *pkt,
uint8_t *ctr);
u8_t *ctr);
typedef int (*ccm_op_t)(struct cipher_ctx *ctx, struct cipher_aead_pkt *pkt,
uint8_t *nonce);
u8_t *nonce);
struct cipher_ops {
@ -72,15 +72,15 @@ struct cipher_ops {
};
struct ccm_params {
uint16_t tag_len;
uint16_t nonce_len;
u16_t tag_len;
u16_t nonce_len;
};
struct ctr_params {
/* CTR mode counter is a split counter composed of iv and counter
* such that ivlen + ctr_len = keylen
*/
uint32_t ctr_len;
u32_t ctr_len;
};
/* Structure encoding session parameters. Refer to comments for individual
@ -98,7 +98,7 @@ struct cipher_ctx {
/* To be populated by the app before calling begin_session() */
union {
/* Cryptographic key to be used in this session */
uint8_t *bit_stream;
u8_t *bit_stream;
/* For cases where key is protected and is not
* available to caller
*/
@ -140,7 +140,7 @@ struct cipher_ctx {
/* Cryptographic keylength in bytes. To be populated by the app
* before calling begin_session()
*/
uint16_t keylen;
u16_t keylen;
/* How certain fields are to be interpreted for this sesssion.
@ -148,7 +148,7 @@ struct cipher_ctx {
* An app can obtain the capability flags supported by a hw/driver
* by calling cipher_query_hwcaps(). (A bitmask of CAP_* below)
*/
uint16_t flags;
u16_t flags;
};
/* Various cipher_ctx.flags options. Not all drivers support all flags.
@ -186,7 +186,7 @@ struct cipher_ctx {
struct cipher_pkt {
/* Start address of Input buffer */
uint8_t *in_buf;
u8_t *in_buf;
/* Bytes to be operated upon */
int in_len;
@ -195,7 +195,7 @@ struct cipher_pkt {
* the application. Can be NULL for in place ops. To be populated
* with contents by the driver on return from op / async_callback
*/
uint8_t *out_buf;
u8_t *out_buf;
/* Size of the out_buf area allocated by the application. Drivers should
* not write past the size of output buffer
@ -212,7 +212,7 @@ struct cipher_pkt {
* returns a first level success / failure status. To be populated
* by the driver on return from op / async_callback.
*/
uint8_t status;
u8_t status;
/* Context this packet relates to. This can be useful to get the
* session details esp for async ops. Will be populated by the
@ -230,16 +230,16 @@ struct cipher_aead_pkt {
struct cipher_pkt *pkt;
/* Start address for Associated data. This has to be supplied by app */
uint8_t *ad;
u8_t *ad;
/* Size of Associated data. This has to be supplied by the app */
uint32_t ad_len;
u32_t ad_len;
/* Start address for the Auth hash. For an Encryption op this will
* be populated by the driver when it returns from cipher_ccm_op call.
* For a decryption op this has to be supplied by the app.
*/
uint8_t *tag;
u8_t *tag;
};
/* Prototype for the application function to be invoked by the crypto driver

8
include/device.h
View file

@ -274,7 +274,7 @@ struct device_config {
char *name;
int (*init)(struct device *device);
#ifdef CONFIG_DEVICE_POWER_MANAGEMENT
int (*device_pm_control)(struct device *device, uint32_t command,
int (*device_pm_control)(struct device *device, u32_t command,
void *context);
#endif
const void *config_info;
@ -353,7 +353,7 @@ void device_busy_clear(struct device *busy_dev);
* @retval 0 Always returns 0
*/
int device_pm_control_nop(struct device *unused_device,
uint32_t unused_ctrl_command, void *unused_context);
u32_t unused_ctrl_command, void *unused_context);
/**
* @brief Call the set power state function of a device
*
@ -367,7 +367,7 @@ int device_pm_control_nop(struct device *unused_device,
* @retval Errno Negative errno code if failure.
*/
static inline int device_set_power_state(struct device *device,
uint32_t device_power_state)
u32_t device_power_state)
{
return device->config->device_pm_control(device,
DEVICE_PM_SET_POWER_STATE, &device_power_state);
@ -387,7 +387,7 @@ static inline int device_set_power_state(struct device *device,
* @retval Errno Negative errno code if failure.
*/
static inline int device_get_power_state(struct device *device,
uint32_t *device_power_state)
u32_t *device_power_state)
{
return device->config->device_pm_control(device,
DEVICE_PM_GET_POWER_STATE, device_power_state);

10
include/disk_access.h
View file

@ -72,8 +72,8 @@ int disk_access_status(void);
*
* @return 0 on success, negative errno code on fail
*/
int disk_access_read(uint8_t *data_buf, uint32_t start_sector,
uint32_t num_sector);
int disk_access_read(u8_t *data_buf, u32_t start_sector,
u32_t num_sector);
/*
* @brief write data to disk
@ -86,8 +86,8 @@ int disk_access_read(uint8_t *data_buf, uint32_t start_sector,
*
* @return 0 on success, negative errno code on fail
*/
int disk_access_write(const uint8_t *data_buf, uint32_t start_sector,
uint32_t num_sector);
int disk_access_write(const u8_t *data_buf, u32_t start_sector,
u32_t num_sector);
/*
* @brief Get/Configure disk parameters
@ -98,7 +98,7 @@ int disk_access_write(const uint8_t *data_buf, uint32_t start_sector,
*
* @return 0 on success, negative errno code on fail
*/
int disk_access_ioctl(uint8_t cmd, void *buff);
int disk_access_ioctl(u8_t cmd, void *buff);
#ifdef __cplusplus

20
include/display/grove_lcd.h
View file

@ -20,7 +20,7 @@ extern "C" {
* @param data the ASCII text to display
* @param size the length of the text in bytes
*/
void glcd_print(struct device *port, char *data, uint32_t size);
void glcd_print(struct device *port, char *data, u32_t size);
/**
@ -30,7 +30,7 @@ void glcd_print(struct device *port, char *data, uint32_t size);
* @param col the column for the cursor to be moved to (0-15)
* @param row the row it should be moved to (0 or 1)
*/
void glcd_cursor_pos_set(struct device *port, uint8_t col, uint8_t row);
void glcd_cursor_pos_set(struct device *port, u8_t col, u8_t row);
/**
* @brief Clear the current display
@ -57,7 +57,7 @@ void glcd_clear(struct device *port);
* @param opt An 8bit bitmask of GLCD_DS_* options.
*
*/
void glcd_display_state_set(struct device *port, uint8_t opt);
void glcd_display_state_set(struct device *port, u8_t opt);
/**
* @brief return the display feature set associated with the device
@ -66,7 +66,7 @@ void glcd_display_state_set(struct device *port, uint8_t opt);
*
* @return the display feature set associated with the device.
*/
uint8_t glcd_display_state_get(struct device *port);
u8_t glcd_display_state_get(struct device *port);
/* Defines for the GLCD_CMD_INPUT_SET to change text direction */
#define GLCD_IS_SHIFT_INCREMENT (1 << 1)
@ -83,7 +83,7 @@ uint8_t glcd_display_state_get(struct device *port);
* @param opt A bitmask of GLCD_IS_* options
*
*/
void glcd_input_state_set(struct device *port, uint8_t opt);
void glcd_input_state_set(struct device *port, u8_t opt);
/**
* @brief return the input set associated with the device
@ -92,7 +92,7 @@ void glcd_input_state_set(struct device *port, uint8_t opt);
*
* @return the input set associated with the device.
*/
uint8_t glcd_input_state_get(struct device *port);
u8_t glcd_input_state_get(struct device *port);
/* Defines for the LCD_FUNCTION_SET */
#define GLCD_FS_8BIT_MODE (1 << 4)
@ -111,7 +111,7 @@ uint8_t glcd_input_state_get(struct device *port);
* of the display as per needed. Controlling things like the number of rows,
* dot size, and text display quality.
*/
void glcd_function_set(struct device *port, uint8_t opt);
void glcd_function_set(struct device *port, u8_t opt);
/**
* @brief return the function set associated with the device
@ -120,7 +120,7 @@ void glcd_function_set(struct device *port, uint8_t opt);
*
* @return the function features set associated with the device.
*/
uint8_t glcd_function_get(struct device *port);
u8_t glcd_function_get(struct device *port);
/* Available color selections */
@ -133,7 +133,7 @@ uint8_t glcd_function_get(struct device *port);
* @param port Pointer to device structure for driver instance.
* @param color One of the pre-defined color options
*/
void glcd_color_select(struct device *port, uint8_t color);
void glcd_color_select(struct device *port, u8_t color);
/**
@ -144,7 +144,7 @@ void glcd_color_select(struct device *port, uint8_t color);
* @param g A numeric value for the green color (max is 255)
* @param b A numeric value for the blue color (max is 255)
*/
void glcd_color_set(struct device *port, uint8_t r, uint8_t g, uint8_t b);
void glcd_color_set(struct device *port, u8_t r, u8_t g, u8_t b);
/**

10
include/display/mb_display.h
View file

@ -36,13 +36,13 @@ extern "C" {
struct mb_image {
union {
struct {
uint8_t c1:1,
u8_t c1:1,
c2:1,
c3:1,
c4:1,
c5:1;
} r[5];
uint8_t row[5];
u8_t row[5];
};
};
@ -127,8 +127,8 @@ struct mb_display *mb_display_get(void);
* @param img Array of image bitmaps (struct mb_image objects).
* @param img_count Number of images in 'img' array.
*/
void mb_display_image(struct mb_display *disp, uint32_t mode, int32_t duration,
const struct mb_image *img, uint8_t img_count);
void mb_display_image(struct mb_display *disp, u32_t mode, s32_t duration,
const struct mb_image *img, u8_t img_count);
/**
* @brief Print a string of characters on the BBC micro:bit LED display.
@ -147,7 +147,7 @@ void mb_display_image(struct mb_display *disp, uint32_t mode, int32_t duration,
* @param ... Optional list of format arguments.
*/
__printf_like(4, 5) void mb_display_print(struct mb_display *disp,
uint32_t mode, int32_t duration,
u32_t mode, s32_t duration,
const char *fmt, ...);
/**

104
include/dma.h
View file

@ -66,7 +66,7 @@ enum dma_channel_direction {
*/
struct dma_channel_config {
/* Hardware Interface handshake for peripheral (I2C, SPI, etc) */
uint32_t handshake_interface;
u32_t handshake_interface;
/* Select active polarity for handshake (low/high) */
enum dma_handshake_polarity handshake_polarity;
/* DMA transfer direction from mem/peripheral to mem/peripheral */
@ -95,11 +95,11 @@ struct dma_channel_config {
*/
struct dma_transfer_config {
/* Total amount of data in bytes to transfer */
uint32_t block_size;
u32_t block_size;
/* Source address for the transaction */
uint32_t *source_address;
u32_t *source_address;
/* Destination address */
uint32_t *destination_address;
u32_t *destination_address;
};
/**
@ -137,23 +137,23 @@ struct dma_transfer_config {
* reserved [ 13 : 15 ]
*/
struct dma_block_config {
uint32_t source_address;
uint32_t source_gather_interval;
uint32_t dest_address;
uint32_t dest_scatter_interval;
uint16_t dest_scatter_count;
uint16_t source_gather_count;
uint32_t block_size;
u32_t source_address;
u32_t source_gather_interval;
u32_t dest_address;
u32_t dest_scatter_interval;
u16_t dest_scatter_count;
u16_t source_gather_count;
u32_t block_size;
struct dma_block_config *next_block;
uint16_t source_gather_en : 1;
uint16_t dest_scatter_en : 1;
uint16_t source_addr_adj : 2;
uint16_t dest_addr_adj : 2;
uint16_t source_reload_en : 1;
uint16_t dest_reload_en : 1;
uint16_t fifo_mode_control : 4;
uint16_t flow_control_mode : 1;
uint16_t reserved : 3;
u16_t source_gather_en : 1;
u16_t dest_scatter_en : 1;
u16_t source_addr_adj : 2;
u16_t dest_addr_adj : 2;
u16_t source_reload_en : 1;
u16_t dest_reload_en : 1;
u16_t fifo_mode_control : 4;
u16_t flow_control_mode : 1;
u16_t reserved : 3;
};
/**
@ -192,23 +192,23 @@ struct dma_block_config {
* (error_code: zero-transfer success, non zero-error happens).
*/
struct dma_config {
uint32_t dma_slot : 6;
uint32_t channel_direction : 3;
uint32_t complete_callback_en : 1;
uint32_t error_callback_en : 1;
uint32_t source_handshake : 1;
uint32_t dest_handshake : 1;
uint32_t channel_priority : 4;
uint32_t source_chaining_en : 1;
uint32_t dest_chaining_en : 1;
uint32_t reserved : 13;
uint32_t source_data_size : 16;
uint32_t dest_data_size : 16;
uint32_t source_burst_length : 16;
uint32_t dest_burst_length : 16;
uint32_t block_count;
u32_t dma_slot : 6;
u32_t channel_direction : 3;
u32_t complete_callback_en : 1;
u32_t error_callback_en : 1;
u32_t source_handshake : 1;
u32_t dest_handshake : 1;
u32_t channel_priority : 4;
u32_t source_chaining_en : 1;
u32_t dest_chaining_en : 1;
u32_t reserved : 13;
u32_t source_data_size : 16;
u32_t dest_data_size : 16;
u32_t source_burst_length : 16;
u32_t dest_burst_length : 16;
u32_t block_count;
struct dma_block_config *head_block;
void (*dma_callback)(struct device *dev, uint32_t channel,
void (*dma_callback)(struct device *dev, u32_t channel,
int error_code);
};
@ -219,22 +219,22 @@ struct dma_config {
* public documentation.
*/
typedef int (*dma_api_channel_config)(struct device *dev, uint32_t channel,
typedef int (*dma_api_channel_config)(struct device *dev, u32_t channel,
struct dma_channel_config *config);
typedef int (*dma_api_transfer_config)(struct device *dev, uint32_t channel,
typedef int (*dma_api_transfer_config)(struct device *dev, u32_t channel,
struct dma_transfer_config *config);
typedef int (*dma_api_transfer_start)(struct device *dev, uint32_t channel);
typedef int (*dma_api_transfer_start)(struct device *dev, u32_t channel);
typedef int (*dma_api_transfer_stop)(struct device *dev, uint32_t channel);
typedef int (*dma_api_transfer_stop)(struct device *dev, u32_t channel);
typedef int (*dma_api_config)(struct device *dev, uint32_t channel,
typedef int (*dma_api_config)(struct device *dev, u32_t channel,
struct dma_config *config);
typedef int (*dma_api_start)(struct device *dev, uint32_t channel);
typedef int (*dma_api_start)(struct device *dev, u32_t channel);
typedef int (*dma_api_stop)(struct device *dev, uint32_t channel);
typedef int (*dma_api_stop)(struct device *dev, u32_t channel);
struct dma_driver_api {
dma_api_channel_config channel_config;
@ -260,7 +260,7 @@ struct dma_driver_api {
* @retval 0 if successful.
* @retval Negative errno code if failure.
*/
static inline int dma_config(struct device *dev, uint32_t channel,
static inline int dma_config(struct device *dev, u32_t channel,
struct dma_config *config)
{
const struct dma_driver_api *api = dev->driver_api;
@ -279,7 +279,7 @@ static inline int dma_config(struct device *dev, uint32_t channel,
* @retval 0 if successful.
* @retval Negative errno code if failure.
*/
static inline int dma_start(struct device *dev, uint32_t channel)
static inline int dma_start(struct device *dev, u32_t channel)
{
const struct dma_driver_api *api = dev->driver_api;
@ -296,7 +296,7 @@ static inline int dma_start(struct device *dev, uint32_t channel)
* @retval 0 if successful.
* @retval Negative errno code if failure.
*/
static inline int dma_stop(struct device *dev, uint32_t channel)
static inline int dma_stop(struct device *dev, u32_t channel)
{
const struct dma_driver_api *api = dev->driver_api;
@ -315,7 +315,7 @@ static inline int dma_stop(struct device *dev, uint32_t channel)
* @retval Negative errno code if failure.
*/
static inline int __deprecated dma_channel_config(struct device *dev,
uint32_t channel, struct dma_channel_config *config)
u32_t channel, struct dma_channel_config *config)
{
const struct dma_driver_api *api = dev->driver_api;
@ -335,7 +335,7 @@ static inline int __deprecated dma_channel_config(struct device *dev,
* @retval Negative errno code if failure.
*/
static inline int __deprecated dma_transfer_config(struct device *dev,
uint32_t channel, struct dma_transfer_config *config)
u32_t channel, struct dma_transfer_config *config)
{
const struct dma_driver_api *api = dev->driver_api;
@ -354,7 +354,7 @@ static inline int __deprecated dma_transfer_config(struct device *dev,
* @retval Negative errno code if failure.
*/
static inline int __deprecated dma_transfer_start(struct device *dev,
uint32_t channel)
u32_t channel)
{
const struct dma_driver_api *api = dev->driver_api;
@ -372,7 +372,7 @@ static inline int __deprecated dma_transfer_start(struct device *dev,
* @retval Negative errno code if failure.
*/
static inline int __deprecated dma_transfer_stop(struct device *dev,
uint32_t channel)
u32_t channel)
{
const struct dma_driver_api *api = dev->driver_api;
@ -392,7 +392,7 @@ static inline int __deprecated dma_transfer_stop(struct device *dev,
*
* @retval common DMA index to be placed into registers.
*/
static inline enum dma_burst_length dma_width_index(uint32_t size)
static inline enum dma_burst_length dma_width_index(u32_t size)
{
/* Check boundaries (max supported width is 32 Bytes) */
if (size < 1 || size > 32) {
@ -421,7 +421,7 @@ static inline enum dma_burst_length dma_width_index(uint32_t size)
*
* @retval common DMA index to be placed into registers.
*/
static inline enum dma_burst_length dma_burst_index(uint32_t burst)
static inline enum dma_burst_length dma_burst_index(u32_t burst)
{
/* Check boundaries (max supported burst length is 256) */
if (burst < 1 || burst > 256) {

2
include/drivers/clock_control/arm_clock_control.h
View file

@ -34,7 +34,7 @@ struct arm_clock_control_t {
/* Clock can be configured for 3 states: Active, Sleep, Deep Sleep */
enum arm_soc_state_t state;
/* Identifies the device on the bus */
uint32_t device;
u32_t device;
};
#endif /* _ARM_CLOCK_CONTROL_H_ */

4
include/drivers/clock_control/stm32_clock_control.h
View file

@ -32,8 +32,8 @@ enum {
};
struct stm32_pclken {
uint32_t bus;
uint32_t enr;
u32_t bus;
u32_t enr;
};
#endif /* _STM32_CLOCK_CONTROL_H_ */

4
include/drivers/clock_control/stm32f4_clock_control.h
View file

@ -127,8 +127,8 @@ enum {
};
struct stm32f4x_pclken {
uint32_t bus;
uint32_t enr;
u32_t bus;
u32_t enr;
};
#endif /* _STM32F4_CLOCK_CONTROL_H_ */

2
include/drivers/console/console.h
View file

@ -40,7 +40,7 @@ struct console_input {
* @return N/A
*/
typedef void (*console_input_fn)(struct k_fifo *avail, struct k_fifo *lines,
uint8_t (*completion)(char *str, uint8_t len));
u8_t (*completion)(char *str, u8_t len));
#ifdef __cplusplus
}

2
include/drivers/console/ipm_console.h
View file

@ -41,7 +41,7 @@ struct ipm_console_receiver_config_info {
* Ring buffer data area for stashing characters from the interrupt
* callback
*/
uint32_t *ring_buf_data;
u32_t *ring_buf_data;
/** Size of ring_buf_data in 32-bit chunks */
unsigned int rb_size32;

2
include/drivers/console/telnet_console.h
View file

@ -28,7 +28,7 @@ extern "C" {
* @return N/A
*/
void telnet_register_input(struct k_fifo *avail, struct k_fifo *lines,
uint8_t (*completion)(char *str, uint8_t len));
u8_t (*completion)(char *str, u8_t len));
#ifdef __cplusplus
}

4
include/drivers/console/uart_console.h
View file

@ -30,7 +30,7 @@ extern "C" {
* @return N/A
*/
void uart_register_input(struct k_fifo *avail, struct k_fifo *lines,
uint8_t (*completion)(char *str, uint8_t len));
u8_t (*completion)(char *str, u8_t len));
/*
* Allows having debug hooks in the console driver for handling incoming
@ -44,7 +44,7 @@ typedef UART_CONSOLE_OUT_DEBUG_HOOK_SIG(uart_console_out_debug_hook_t);
void uart_console_out_debug_hook_install(
uart_console_out_debug_hook_t *hook);
typedef int (*uart_console_in_debug_hook_t) (uint8_t);
typedef int (*uart_console_in_debug_hook_t) (u8_t);
void uart_console_in_debug_hook_install(uart_console_in_debug_hook_t hook);

6
include/drivers/console/uart_pipe.h
View file

@ -29,7 +29,7 @@ extern "C" {
*
* @return Buffer to be used on next receive.
*/
typedef uint8_t *(*uart_pipe_recv_cb)(uint8_t *buf, size_t *off);
typedef u8_t *(*uart_pipe_recv_cb)(u8_t *buf, size_t *off);
/** @brief Register UART application.
*
@ -39,7 +39,7 @@ typedef uint8_t *(*uart_pipe_recv_cb)(uint8_t *buf, size_t *off);
* @param len Size of buffer.
* @param cb Callback to be called on data reception.
*/
void uart_pipe_register(uint8_t *buf, size_t len, uart_pipe_recv_cb cb);
void uart_pipe_register(u8_t *buf, size_t len, uart_pipe_recv_cb cb);
/** @brief Send data over UART.
*
@ -50,7 +50,7 @@ void uart_pipe_register(uint8_t *buf, size_t len, uart_pipe_recv_cb cb);
*
* @return 0 on success or negative error
*/
int uart_pipe_send(const uint8_t *data, int len);
int uart_pipe_send(const u8_t *data, int len);
#ifdef __cplusplus
}

8
include/drivers/gpio/gpio_mmio32.h
View file

@ -12,13 +12,13 @@
#include <zephyr/types.h>
struct gpio_mmio32_config {
volatile uint32_t *reg;
uint32_t mask;
volatile u32_t *reg;
u32_t mask;
};
struct gpio_mmio32_context {
const struct gpio_mmio32_config *config;
uint32_t invert; /* Mask of 'reg' bits that should be inverted */
u32_t invert; /* Mask of 'reg' bits that should be inverted */
};
int gpio_mmio32_init(struct device *dev);
@ -43,7 +43,7 @@ int gpio_mmio32_init(struct device *dev);
static struct gpio_mmio32_context _dev_name##_dev_data; \
\
static const struct gpio_mmio32_config _dev_name##_dev_cfg = { \
.reg = (volatile uint32_t *)_address, \
.reg = (volatile u32_t *)_address, \
.mask = _mask, \
}; \
\

2
include/drivers/ioapic.h
View file

@ -41,7 +41,7 @@ extern "C" {
void _ioapic_irq_enable(unsigned int irq);
void _ioapic_irq_disable(unsigned int irq);
void _ioapic_int_vec_set(unsigned int irq, unsigned int vector);
void _ioapic_irq_set(unsigned int irq, unsigned int vector, uint32_t flags);
void _ioapic_irq_set(unsigned int irq, unsigned int vector, u32_t flags);
#endif /* _ASMLANGUAGE */
#ifdef __cplusplus

214
include/drivers/k20_sim.h
View file

@ -28,116 +28,116 @@ extern "C" {
#define SIM_OCS32K_LPO 3 /* 1kHz */
typedef union {
uint32_t value; /* reset = 0x8000 F03F */
u32_t value; /* reset = 0x8000 F03F */
struct {
uint32_t res_0_11 : 12 __packed;
uint32_t ram_size : 4 __packed;
uint32_t res_16_17 : 2 __packed;
uint32_t osc32k_sel : 2 __packed;
uint32_t res_20_28 : 9 __packed;
uint32_t usb_volt_stby : 1 __packed;
uint32_t usb_stop_stby : 1 __packed;
uint32_t usb_reg_en : 1 __packed;
u32_t res_0_11 : 12 __packed;
u32_t ram_size : 4 __packed;
u32_t res_16_17 : 2 __packed;
u32_t osc32k_sel : 2 __packed;
u32_t res_20_28 : 9 __packed;
u32_t usb_volt_stby : 1 __packed;
u32_t usb_stop_stby : 1 __packed;
u32_t usb_reg_en : 1 __packed;
} field;
} SIM_SOPT1_t; /* 0x000 */
typedef union {
uint32_t value;
u32_t value;
struct {
uint32_t res_0_23 : 24 __packed;
uint32_t usb_reg_write_en : 1 __packed;
uint32_t usb_volt_write_en : 1 __packed;
uint32_t usb_stop_write_en : 1 __packed;
uint32_t res_27_31 : 5 __packed;
u32_t res_0_23 : 24 __packed;
u32_t usb_reg_write_en : 1 __packed;
u32_t usb_volt_write_en : 1 __packed;
u32_t usb_stop_write_en : 1 __packed;
u32_t res_27_31 : 5 __packed;
} field;
} SIM_SOPT1CFG_t; /* 0x004 */
typedef union {
uint32_t value;
u32_t value;
struct {
uint32_t res_0_3 : 4 __packed;
uint32_t rtc_clk_out_sel : 1 __packed;
uint32_t clk_out_sel : 3 __packed;
uint32_t flex_bus_sl : 2 __packed;
uint32_t res_10 : 1 __packed;
uint32_t ptd7pad : 1 __packed;
uint32_t trace_clk_sel : 1 __packed;
uint32_t res_13_15 : 3 __packed;
uint32_t fll_pll_clk_sel : 1 __packed;
uint32_t res_17 : 1 __packed;
uint32_t usb_src : 1 __packed;
uint32_t res_19_31 : 13 __packed;
u32_t res_0_3 : 4 __packed;
u32_t rtc_clk_out_sel : 1 __packed;
u32_t clk_out_sel : 3 __packed;
u32_t flex_bus_sl : 2 __packed;
u32_t res_10 : 1 __packed;
u32_t ptd7pad : 1 __packed;
u32_t trace_clk_sel : 1 __packed;
u32_t res_13_15 : 3 __packed;
u32_t fll_pll_clk_sel : 1 __packed;
u32_t res_17 : 1 __packed;
u32_t usb_src : 1 __packed;
u32_t res_19_31 : 13 __packed;
} field;
} SIM_SOPT2_t; /* 0x1004 */
typedef union {
uint32_t value;
u32_t value;
struct {
uint32_t ftm0_flt0 : 1 __packed;
uint32_t ftm0_flt1 : 1 __packed;
uint32_t ftm0_flt2 : 1 __packed;
uint32_t res_3 : 1 __packed;
uint32_t ftm1_flt0 : 1 __packed;
uint32_t res_5_7 : 3 __packed;
uint32_t ftm2_flt0 : 1 __packed;
uint32_t res_9_17 : 9 __packed;
uint32_t ftm1_ch0_src : 2 __packed;
uint32_t ftm2_ch0_src : 2 __packed;
uint32_t res_22_23 : 2 __packed;
uint32_t ftm0_clk_sel : 1 __packed;
uint32_t ftm1_clk_sel : 1 __packed;
uint32_t ftm2_clk_sel : 1 __packed;
uint32_t res_27 : 1 __packed;
uint32_t ftm0_trg0_src : 1 __packed;
uint32_t ftm0_trg1_src : 1 __packed;
uint32_t res_30_31 : 2 __packed;
u32_t ftm0_flt0 : 1 __packed;
u32_t ftm0_flt1 : 1 __packed;
u32_t ftm0_flt2 : 1 __packed;
u32_t res_3 : 1 __packed;
u32_t ftm1_flt0 : 1 __packed;
u32_t res_5_7 : 3 __packed;
u32_t ftm2_flt0 : 1 __packed;
u32_t res_9_17 : 9 __packed;
u32_t ftm1_ch0_src : 2 __packed;
u32_t ftm2_ch0_src : 2 __packed;
u32_t res_22_23 : 2 __packed;
u32_t ftm0_clk_sel : 1 __packed;
u32_t ftm1_clk_sel : 1 __packed;
u32_t ftm2_clk_sel : 1 __packed;
u32_t res_27 : 1 __packed;
u32_t ftm0_trg0_src : 1 __packed;
u32_t ftm0_trg1_src : 1 __packed;
u32_t res_30_31 : 2 __packed;
} field;
} SIM_SOPT4_t; /* 0x100C */
typedef union {
uint32_t value;
u32_t value;
struct {
uint32_t uart0_tx_src : 2 __packed;
uint32_t uart0_rx_src : 2 __packed;
uint32_t uart1_tx_src : 2 __packed;
uint32_t uart1_rx_src : 2 __packed;
uint32_t res_8_31 : 24 __packed;
u32_t uart0_tx_src : 2 __packed;
u32_t uart0_rx_src : 2 __packed;
u32_t uart1_tx_src : 2 __packed;
u32_t uart1_rx_src : 2 __packed;
u32_t res_8_31 : 24 __packed;
} field;
} SIM_SOPT5_t; /* 0x1010 */
typedef union {
uint32_t value;
u32_t value;
struct {
uint32_t uart0_tx_src : 2 __packed;
uint32_t uart0_rx_src : 2 __packed;
uint32_t uart1_tx_src : 2 __packed;
uint32_t uart1_rx_src : 2 __packed;
uint32_t res_8_9 : 2 __packed;
uint32_t uart4_clk_en : 1 __packed;
uint32_t uart5_clk_en : 1 __packed;
uint32_t res_12_31: 20 __packed;
u32_t uart0_tx_src : 2 __packed;
u32_t uart0_rx_src : 2 __packed;
u32_t uart1_tx_src : 2 __packed;
u32_t uart1_rx_src : 2 __packed;
u32_t res_8_9 : 2 __packed;
u32_t uart4_clk_en : 1 __packed;
u32_t uart5_clk_en : 1 __packed;
u32_t res_12_31: 20 __packed;
} field;
} SIM_SCGC1_t; /* 0x1028*/
typedef union {
uint32_t value;
u32_t value;
struct {
uint32_t res_0 : 1 __packed;
uint32_t ewm_clk_en_0 : 1 __packed;
uint32_t cmt_clk_en_0 : 1 __packed;
uint32_t res_3_5 : 3 __packed;
uint32_t i2c0_clk_en : 1 __packed;
uint32_t i2c1_clk_en : 1 __packed;
uint32_t res_8_9 : 2 __packed;
uint32_t uart0_clk_en : 1 __packed;
uint32_t uart1_clk_en : 1 __packed;
uint32_t uart2_clk_en : 1 __packed;
uint32_t uart3_clk_en : 1 __packed;
uint32_t res_14_17 : 4 __packed;
uint32_t usb_clk_en : 1 __packed;
uint32_t cmp_clk_en : 1 __packed;
uint32_t vref_clk_en : 1 __packed;
uint32_t res_21_31 : 11 __packed;
u32_t res_0 : 1 __packed;
u32_t ewm_clk_en_0 : 1 __packed;
u32_t cmt_clk_en_0 : 1 __packed;
u32_t res_3_5 : 3 __packed;
u32_t i2c0_clk_en : 1 __packed;
u32_t i2c1_clk_en : 1 __packed;
u32_t res_8_9 : 2 __packed;
u32_t uart0_clk_en : 1 __packed;
u32_t uart1_clk_en : 1 __packed;
u32_t uart2_clk_en : 1 __packed;
u32_t uart3_clk_en : 1 __packed;
u32_t res_14_17 : 4 __packed;
u32_t usb_clk_en : 1 __packed;
u32_t cmp_clk_en : 1 __packed;
u32_t vref_clk_en : 1 __packed;
u32_t res_21_31 : 11 __packed;
} field;
} SIM_SCGC4_t; /* 0x1034 */
@ -148,29 +148,29 @@ typedef union {
#define SIM_SCGC5_PORTE_CLK_EN (1 << 13)
typedef union {
uint32_t value; /* reset 0 */
u32_t value; /* reset 0 */
struct {
uint32_t lptimer : 1 __packed;
uint32_t res_1_4 : 4 __packed;
uint32_t tsi : 1 __packed;
uint32_t res_6_8 : 3 __packed;
uint32_t port_a_clk_en : 1 __packed;
uint32_t port_b_clk_en : 1 __packed;
uint32_t port_c_clk_en : 1 __packed;
uint32_t port_d_clk_en : 1 __packed;
uint32_t port_e_clk_en : 1 __packed;
uint32_t res_14_31 : 18 __packed;
u32_t lptimer : 1 __packed;
u32_t res_1_4 : 4 __packed;
u32_t tsi : 1 __packed;
u32_t res_6_8 : 3 __packed;
u32_t port_a_clk_en : 1 __packed;
u32_t port_b_clk_en : 1 __packed;
u32_t port_c_clk_en : 1 __packed;
u32_t port_d_clk_en : 1 __packed;
u32_t port_e_clk_en : 1 __packed;
u32_t res_14_31 : 18 __packed;
} field;
} SIM_SCGC5_t; /* 0x1038 */
typedef union {
uint32_t value; /* reset 0x0001 0000 */
u32_t value; /* reset 0x0001 0000 */
struct {
uint32_t res_0_15 : 16 __packed;
uint32_t outdiv4 : 4 __packed;
uint32_t outdiv3 : 4 __packed;
uint32_t outdiv2 : 4 __packed;
uint32_t outdiv1 : 4 __packed;
u32_t res_0_15 : 16 __packed;
u32_t outdiv4 : 4 __packed;
u32_t outdiv3 : 4 __packed;
u32_t outdiv2 : 4 __packed;
u32_t outdiv1 : 4 __packed;
} field;
} SIM_CLKDIV1_t; /* 0x1044 */
@ -179,24 +179,24 @@ typedef union {
struct K20_SIM {
SIM_SOPT1_t sopt1; /* 0x0000 */
SIM_SOPT1CFG_t sopt1_cfg; /* 0x0004 */
uint8_t res0008_1003[0x1003 - 0x8]; /* 0x0008-0x1003 Reserved */
u8_t res0008_1003[0x1003 - 0x8]; /* 0x0008-0x1003 Reserved */
SIM_SOPT2_t sopt2; /* 0x1004 */
uint32_t res1008; /* 0x1008 Reserved */
u32_t res1008; /* 0x1008 Reserved */
SIM_SOPT4_t sopt4; /* 0x100C */
SIM_SOPT5_t sopt5; /* 0x1010 */
uint32_t res1014; /* 0x1014 Reserved */
uint32_t sopt7; /* 0x1018 */
uint8_t res101c_1027[0x1027 - 0x101c]; /* Reserved */
u32_t res1014; /* 0x1014 Reserved */
u32_t sopt7; /* 0x1018 */
u8_t res101c_1027[0x1027 - 0x101c]; /* Reserved */
SIM_SCGC1_t scgc1; /* 0x1028 */
uint32_t scgc2; /* 0x102C */
uint32_t scgc3; /* 0x1030 */
u32_t scgc2; /* 0x102C */
u32_t scgc3; /* 0x1030 */
SIM_SCGC4_t scgc4; /* 0x1034 */
SIM_SCGC5_t scgc5; /* 0x1038 */
uint32_t scgc6; /* 0x103C */
uint32_t scgc7; /* 0x1040 */
u32_t scgc6; /* 0x103C */
u32_t scgc7; /* 0x1040 */
SIM_CLKDIV1_t clkdiv1; /* 0x1044 */
uint32_t clkdiv2; /* 0x1048 */
uint8_t res104c_1063[0x1063 - 0x104c]; /* Reserved */
u32_t clkdiv2; /* 0x1048 */
u8_t res104c_1063[0x1063 - 0x104c]; /* Reserved */
};
#ifdef __cplusplus

2
include/drivers/mvic.h
View file

@ -54,7 +54,7 @@
#define __IRQ_CONTROLLER_VECTOR_MAPPING(irq) ((irq) + 32)
void __irq_controller_irq_config(unsigned int vector, unsigned int irq,
uint32_t flags);
u32_t flags);
int __irq_controller_isr_vector_get(void);

22
include/drivers/pci/pci.h
View file

@ -30,20 +30,20 @@ extern "C" {
/* PCI device information */
struct pci_dev_info {
uint32_t addr; /* I/O or memory region address */
uint32_t size; /* memory region size */
u32_t addr; /* I/O or memory region address */
u32_t size; /* memory region size */
int irq;
uint32_t bus:8;
uint32_t dev:5;
uint32_t function:4;
uint32_t mem_type:1; /* memory type: BAR_SPACE_MEM/BAR_SPACE_IO */
uint32_t class_type:8;
uint32_t bar:3;
uint32_t _reserved:3;
u32_t bus:8;
u32_t dev:5;
u32_t function:4;
u32_t mem_type:1; /* memory type: BAR_SPACE_MEM/BAR_SPACE_IO */
u32_t class_type:8;
u32_t bar:3;
u32_t _reserved:3;
uint16_t vendor_id;
uint16_t device_id;
u16_t vendor_id;
u16_t device_id;
};
#ifdef CONFIG_PCI_ENUMERATION

482
include/drivers/pci/pci_mgr.h
View file

@ -91,24 +91,24 @@ extern "C" {
union pci_addr_reg {
struct {
#ifdef _BIG_ENDIAN
uint32_t enable : 1; /* access enabled */
uint32_t reserved1 : 7;
uint32_t bus : 8; /* PCI bus number */
uint32_t device : 5; /* PCI device number */
uint32_t func : 3; /* device function number */
uint32_t reg : 6; /* config space register number */
uint32_t offset : 2; /* offset for access data */
u32_t enable : 1; /* access enabled */
u32_t reserved1 : 7;
u32_t bus : 8; /* PCI bus number */
u32_t device : 5; /* PCI device number */
u32_t func : 3; /* device function number */
u32_t reg : 6; /* config space register number */
u32_t offset : 2; /* offset for access data */
#else
uint32_t offset : 2; /* offset for access data */
uint32_t reg : 6; /* config space register number */
uint32_t func : 3; /* device function number */
uint32_t device : 5; /* PCI device number */
uint32_t bus : 8; /* PCI bus number */
uint32_t reserved1 : 7;
uint32_t enable : 1; /* access enabled */
u32_t offset : 2; /* offset for access data */
u32_t reg : 6; /* config space register number */
u32_t func : 3; /* device function number */
u32_t device : 5; /* PCI device number */
u32_t bus : 8; /* PCI bus number */
u32_t reserved1 : 7;
u32_t enable : 1; /* access enabled */
#endif
} field;
uint32_t value;
u32_t value;
};
@ -141,22 +141,22 @@ union pci_addr_reg {
union pcie_addr_reg {
struct {
#ifdef _BIG_ENDIAN
uint32_t reserved1 : 4;
uint32_t bus : 8; /* PCI bus number */
uint32_t device : 5; /* PCI device number */
uint32_t func : 3; /* device function number */
uint32_t reg : 10; /* config space register number */
uint32_t reserved0 : 2;
u32_t reserved1 : 4;
u32_t bus : 8; /* PCI bus number */
u32_t device : 5; /* PCI device number */
u32_t func : 3; /* device function number */
u32_t reg : 10; /* config space register number */
u32_t reserved0 : 2;
#else
uint32_t reserved0 : 2;
uint32_t reg : 10; /* config space register number */
uint32_t func : 3; /* device function number */
uint32_t device : 5; /* PCI device number */
uint32_t bus : 8; /* PCI bus number */
uint32_t reserved1 : 4;
u32_t reserved0 : 2;
u32_t reg : 10; /* config space register number */
u32_t func : 3; /* device function number */
u32_t device : 5; /* PCI device number */
u32_t bus : 8; /* PCI bus number */
u32_t reserved1 : 4;
#endif
} field;
uint32_t value;
u32_t value;
};
/*
@ -259,104 +259,104 @@ union pci_dev {
struct {
/* offset 00: */
#ifdef _BIG_ENDIAN
uint32_t device_id
u32_t device_id
: 16; /* device identification */
uint32_t vendor_id
u32_t vendor_id
: 16; /* vendor identification */
#else
uint32_t vendor_id
u32_t vendor_id
: 16; /* vendor identification */
uint32_t device_id
u32_t device_id
: 16; /* device identification */
#endif
/* offset 04: */
#ifdef _BIG_ENDIAN
uint32_t status : 16; /* device status */
uint32_t command : 16; /* device command register */
u32_t status : 16; /* device status */
u32_t command : 16; /* device command register */
#else
uint32_t command : 16; /* device command register */
uint32_t status : 16; /* device status */
u32_t command : 16; /* device command register */
u32_t status : 16; /* device status */
#endif
/* offset 08: */
#ifdef _BIG_ENDIAN
uint32_t class : 8;
uint32_t subclass : 8;
uint32_t reg_if : 8;
uint32_t revision : 8;
u32_t class : 8;
u32_t subclass : 8;
u32_t reg_if : 8;
u32_t revision : 8;
#else
uint32_t revision : 8;
uint32_t reg_if : 8;
uint32_t subclass : 8;
uint32_t class : 8;
u32_t revision : 8;
u32_t reg_if : 8;
u32_t subclass : 8;
u32_t class : 8;
#endif
/* offset 0C: */
#ifdef _BIG_ENDIAN
uint32_t bist : 8;
uint32_t hdr_type : 8;
uint32_t latency_timer : 8;
uint32_t cache_line : 8;
u32_t bist : 8;
u32_t hdr_type : 8;
u32_t latency_timer : 8;
u32_t cache_line : 8;
#else
uint32_t cache_line : 8;
uint32_t latency_timer : 8;
uint32_t hdr_type : 8;
uint32_t bist : 8;
u32_t cache_line : 8;
u32_t latency_timer : 8;
u32_t hdr_type : 8;
u32_t bist : 8;
#endif
uint32_t bar0; /* offset 10: base address register 0 */
uint32_t bar1; /* offset 14: base address register 0 */
uint32_t bar2; /* offset 18: base address register 0 */
uint32_t bar3; /* offset 1C: base address register 0 */
uint32_t bar4; /* offset 20: base address register 0 */
uint32_t bar5; /* offset 24: base address register 0 */
uint32_t cardbus; /* offset 28: base address register 0 */
u32_t bar0; /* offset 10: base address register 0 */
u32_t bar1; /* offset 14: base address register 0 */
u32_t bar2; /* offset 18: base address register 0 */
u32_t bar3; /* offset 1C: base address register 0 */
u32_t bar4; /* offset 20: base address register 0 */
u32_t bar5; /* offset 24: base address register 0 */
u32_t cardbus; /* offset 28: base address register 0 */
/* offset 2C: */
#ifdef _BIG_ENDIAN
uint32_t subsys_id
u32_t subsys_id
: 16; /* subsystem identifier */
uint32_t subvendor_id
u32_t subvendor_id
: 16; /* subsystem vendor identifier */
#else
uint32_t subvendor_id
u32_t subvendor_id
: 16; /* subsystem vendor identifier */
uint32_t subsys_id
u32_t subsys_id
: 16; /* subsystem identifier */
#endif
/* offset 30: */
uint32_t rom_address;
u32_t rom_address;
/* offset 34: */
#ifdef _BIG_ENDIAN
uint32_t reserved1 : 24;
uint32_t capability_ptr : 8;
u32_t reserved1 : 24;
u32_t capability_ptr : 8;
#else
uint32_t capability_ptr : 8;
uint32_t reserved1 : 24;
u32_t capability_ptr : 8;
u32_t reserved1 : 24;
#endif
uint32_t reserved2; /* offset 38: */
u32_t reserved2; /* offset 38: */
/* offset 3C: */
#ifdef _BIG_ENDIAN
uint32_t max_latency : 8;
uint32_t min_grant : 8;
uint32_t interrupt_pin
u32_t max_latency : 8;
u32_t min_grant : 8;
u32_t interrupt_pin
: 8; /* interrupt pin assignment */
uint32_t interrupt_line
u32_t interrupt_line
: 8; /* interrupt line assignment */
#else
uint32_t interrupt_line
u32_t interrupt_line
: 8; /* interrupt line assignment */
uint32_t interrupt_pin
u32_t interrupt_pin
: 8; /* interrupt pin assignment */
uint32_t min_grant : 8;
uint32_t max_latency : 8;
u32_t min_grant : 8;
u32_t max_latency : 8;
#endif
} field;
@ -365,140 +365,140 @@ union pci_dev {
struct {
/* offset 00: */
#ifdef _BIG_ENDIAN
uint32_t device_id
u32_t device_id
: 16; /* device identification */
uint32_t vendor_id
u32_t vendor_id
: 16; /* vendor identification */
#else
uint32_t vendor_id
u32_t vendor_id
: 16; /* vendor identification */
uint32_t device_id
u32_t device_id
: 16; /* device identification */
#endif
/* offset 04: */
#ifdef _BIG_ENDIAN
uint32_t status : 16; /* device status */
uint32_t command
u32_t status : 16; /* device status */
u32_t command
: 16; /* device command register */
#else
uint32_t command
u32_t command
: 16; /* device command register */
uint32_t status : 16; /* device status */
u32_t status : 16; /* device status */
#endif
/* offset 08: */
#ifdef _BIG_ENDIAN
uint32_t class : 8;
uint32_t subclass : 8;
uint32_t reg_if : 8;
uint32_t revision : 8;
u32_t class : 8;
u32_t subclass : 8;
u32_t reg_if : 8;
u32_t revision : 8;
#else
uint32_t revision : 8;
uint32_t reg_if : 8;
uint32_t subclass : 8;
uint32_t class : 8;
u32_t revision : 8;
u32_t reg_if : 8;
u32_t subclass : 8;
u32_t class : 8;
#endif
/* offset 0C: */
#ifdef _BIG_ENDIAN
uint32_t bist : 8;
uint32_t hdr_type : 8;
uint32_t latency_timer : 8;
uint32_t cache_line : 8;
u32_t bist : 8;
u32_t hdr_type : 8;
u32_t latency_timer : 8;
u32_t cache_line : 8;
#else
uint32_t cache_line : 8;
uint32_t latency_timer : 8;
uint32_t hdr_type : 8;
uint32_t bist : 8;
u32_t cache_line : 8;
u32_t latency_timer : 8;
u32_t hdr_type : 8;
u32_t bist : 8;
#endif
uint32_t bar0; /* offset 10: base address register 0 */
uint32_t bar1; /* offset 14: base address register 0 */
u32_t bar0; /* offset 10: base address register 0 */
u32_t bar1; /* offset 14: base address register 0 */
/* offset 18: */
#ifdef _BIG_ENDIAN
uint32_t secondary_latency : 8;
uint32_t subord_bus : 8;
uint32_t secondary_bus : 8;
uint32_t primary_bus : 8;
u32_t secondary_latency : 8;
u32_t subord_bus : 8;
u32_t secondary_bus : 8;
u32_t primary_bus : 8;
#else
uint32_t primary_bus : 8;
uint32_t secondary_bus : 8;
uint32_t subord_bus : 8;
uint32_t secondary_latency : 8;
u32_t primary_bus : 8;
u32_t secondary_bus : 8;
u32_t subord_bus : 8;
u32_t secondary_latency : 8;
#endif
/* offset 1C: */
#ifdef _BIG_ENDIAN
uint32_t secondary_status : 16;
uint32_t io_limit : 8;
uint32_t io_base : 8;
u32_t secondary_status : 16;
u32_t io_limit : 8;
u32_t io_base : 8;
#else
uint32_t io_base : 8;
uint32_t io_limit : 8;
uint32_t secondary_status : 16;
u32_t io_base : 8;
u32_t io_limit : 8;
u32_t secondary_status : 16;
#endif
/* offset 20: */
#ifdef _BIG_ENDIAN
uint32_t mem_limit : 16;
uint32_t mem_base : 16;
u32_t mem_limit : 16;
u32_t mem_base : 16;
#else
uint32_t mem_base : 16;
uint32_t mem_limit : 16;
u32_t mem_base : 16;
u32_t mem_limit : 16;
#endif
/* offset 24: */
#ifdef _BIG_ENDIAN
uint32_t pre_mem_limit : 16;
uint32_t pre_mem_base : 16;
u32_t pre_mem_limit : 16;
u32_t pre_mem_base : 16;
#else
uint32_t pre_mem_base : 16;
uint32_t pre_mem_limit : 16;
u32_t pre_mem_base : 16;
u32_t pre_mem_limit : 16;
#endif
/* offset 28: */
uint32_t pre_mem_base_upper;
u32_t pre_mem_base_upper;
/* offset 2C: */
uint32_t pre_mem_limit_upper;
u32_t pre_mem_limit_upper;
/* offset 30: */
#ifdef _BIG_ENDIAN
uint32_t io_limit_upper : 16;
uint32_t io_base_upper : 16;
u32_t io_limit_upper : 16;
u32_t io_base_upper : 16;
#else
uint32_t io_base_upper : 16;
uint32_t io_limit_upper : 16;
u32_t io_base_upper : 16;
u32_t io_limit_upper : 16;
#endif
/* offset 34: */
#ifdef _BIG_ENDIAN
uint32_t reserved : 24;
uint32_t capability_ptr : 8;
u32_t reserved : 24;
u32_t capability_ptr : 8;
#else
uint32_t capability_ptr : 8;
uint32_t reserved : 24;
u32_t capability_ptr : 8;
u32_t reserved : 24;
#endif
/* offset 38: */
uint32_t rom_address;
u32_t rom_address;
/* offset 3C: */
#ifdef _BIG_ENDIAN
uint32_t bridge_control : 16;
uint32_t interrupt_pin
u32_t bridge_control : 16;
u32_t interrupt_pin
: 8; /* interrupt pin assignment */
uint32_t interrupt_line
u32_t interrupt_line
: 8; /* interrupt line assignment */
#else
uint32_t interrupt_line
u32_t interrupt_line
: 8; /* interrupt line assignment */
uint32_t interrupt_pin
u32_t interrupt_pin
: 8; /* interrupt pin assignment */
uint32_t bridge_control : 16;
u32_t bridge_control : 16;
#endif
} bridge_field;
@ -506,27 +506,27 @@ union pci_dev {
/* direct access to each word in the PCI header */
struct {
uint32_t word0; /* word 0: offset 00 */
uint32_t word1; /* word 1: offset 04 */
uint32_t word2; /* word 2: offset 08 */
uint32_t word3; /* word 3: offset 0C */
uint32_t word4; /* word 4: offset 10 */
uint32_t word5; /* word 5: offset 14 */
uint32_t word6; /* word 6: offset 18 */
uint32_t word7; /* word 7: offset 1C */
uint32_t word8; /* word 8: offset 20 */
uint32_t word9; /* word 9: offset 24 */
uint32_t word10; /* word 10: offset 28 */
uint32_t word11; /* word 11: offset 2C */
uint32_t word12; /* word 12: offset 30 */
uint32_t word13; /* word 13: offset 34 */
uint32_t word14; /* word 14: offset 38 */
uint32_t word15; /* word 15: offset 3C */
u32_t word0; /* word 0: offset 00 */
u32_t word1; /* word 1: offset 04 */
u32_t word2; /* word 2: offset 08 */
u32_t word3; /* word 3: offset 0C */
u32_t word4; /* word 4: offset 10 */
u32_t word5; /* word 5: offset 14 */
u32_t word6; /* word 6: offset 18 */
u32_t word7; /* word 7: offset 1C */
u32_t word8; /* word 8: offset 20 */
u32_t word9; /* word 9: offset 24 */
u32_t word10; /* word 10: offset 28 */
u32_t word11; /* word 11: offset 2C */
u32_t word12; /* word 12: offset 30 */
u32_t word13; /* word 13: offset 34 */
u32_t word14; /* word 14: offset 38 */
u32_t word15; /* word 15: offset 3C */
} word;
struct {
/* array of words for the header */
uint32_t word[PCI_HEADER_WORDS];
u32_t word[PCI_HEADER_WORDS];
} words;
};
@ -544,26 +544,26 @@ union pci_dev {
union pci_cap_hdr {
struct {
/* offset 00: */
uint32_t id : 8; /* capability ID */
uint32_t next_ptr
u32_t id : 8; /* capability ID */
u32_t next_ptr
: 8; /* pointer to next capability */
uint32_t feature
u32_t feature
: 16; /* capability specific field */
} field;
uint32_t word; /* array of words for the header */
u32_t word; /* array of words for the header */
} pci_cap_hdr_t;
union pcie_cap_hdr {
struct {
/* offset 00: */
uint32_t id : 16; /* capability ID */
uint32_t version : 4; /* version */
uint32_t next_ptr
u32_t id : 16; /* capability ID */
u32_t version : 4; /* version */
u32_t next_ptr
: 12; /* pointer to next capability */
} field;
uint32_t word; /* array of words for the header */
u32_t word; /* array of words for the header */
};
/*
@ -599,23 +599,23 @@ struct _pci_msi_hdr {
union {
struct {
/* offset 00: */
uint32_t id : 8; /* capability ID */
uint32_t next_ptr : 8; /* pointer to next capability */
uint32_t enabled : 1; /* MSI enabled */
uint32_t msg_req : 3; /* requested message count */
uint32_t msg_grant : 3; /* granted message count */
uint32_t is_64_bit : 1; /* 64-bit capable */
uint32_t reserved : 8; /* */
u32_t id : 8; /* capability ID */
u32_t next_ptr : 8; /* pointer to next capability */
u32_t enabled : 1; /* MSI enabled */
u32_t msg_req : 3; /* requested message count */
u32_t msg_grant : 3; /* granted message count */
u32_t is_64_bit : 1; /* 64-bit capable */
u32_t reserved : 8; /* */
} msi_cap;
struct {
/* offset 00: */
uint32_t id : 8; /* capability ID */
uint32_t next_ptr : 8; /* pointer to next capability */
uint32_t table_size : 11; /* MSI-x table size */
uint32_t reserved : 3; /* */
uint32_t func_mask : 1; /* 1 for vectors masked */
uint32_t enabled : 1; /* MSI-x enabled */
u32_t id : 8; /* capability ID */
u32_t next_ptr : 8; /* pointer to next capability */
u32_t table_size : 11; /* MSI-x table size */
u32_t reserved : 3; /* */
u32_t func_mask : 1; /* 1 for vectors masked */
u32_t enabled : 1; /* MSI-x enabled */
} msix_cap;
} cap;
@ -623,135 +623,135 @@ struct _pci_msi_hdr {
/* 32-bit MSI header */
struct {
/* offset 04: */
uint32_t addr; /* message address register */
u32_t addr; /* message address register */
/* offset 08 */
uint32_t data : 16; /* message data register */
uint32_t spare : 16; /* */
u32_t data : 16; /* message data register */
u32_t spare : 16; /* */
} regs32;
/* 64-bit MSI header */
struct {
/* offset 04: */
uint32_t addr_low; /* message address register
u32_t addr_low; /* message address register
* (lower)
*/
/* offset 08: */
uint32_t addr_high; /* message address register
u32_t addr_high; /* message address register
* (upper)
*/
/* offset 0C: */
uint32_t data : 16; /* message data register */
uint32_t spare : 16; /* */
u32_t data : 16; /* message data register */
u32_t spare : 16; /* */
} regs64;
} regs;
};
union pci_msi_hdr {
struct _pci_msi_hdr field; /* MSI header fields */
uint32_t word[4]; /* array of words for the header */
u32_t word[4]; /* array of words for the header */
};
/*
* number of pci controllers; initialized to 0 until the controllers have been
* created
*/
extern uint32_t pci_controller_cnt;
extern u32_t pci_controller_cnt;
struct pci_msix_table {
uint32_t msg_addr;
uint32_t msg_addr_high;
uint32_t msg_data;
uint32_t vec_ctrl;
u32_t msg_addr;
u32_t msg_addr_high;
u32_t msg_data;
u32_t vec_ctrl;
};
struct pci_msix_entry {
uint32_t vector; /* guest to write a vector */
uint16_t entry; /* driver to specify entry, guest OS writes */
u32_t vector; /* guest to write a vector */
u16_t entry; /* driver to specify entry, guest OS writes */
};
struct pci_msix_info {
uint32_t bus_no;
uint32_t dev_no;
uint32_t func_no;
uint32_t msix_vec;
u32_t bus_no;
u32_t dev_no;
u32_t func_no;
u32_t msix_vec;
};
/* manager interface API */
extern void pci_read(uint32_t controller,
extern void pci_read(u32_t controller,
union pci_addr_reg addr,
uint32_t size,
uint32_t *data);
extern void pci_write(uint32_t controller,
u32_t size,
u32_t *data);
extern void pci_write(u32_t controller,
union pci_addr_reg addr,
uint32_t size,
uint32_t data);
u32_t size,
u32_t data);
extern void pci_header_get(uint32_t controller,
extern void pci_header_get(u32_t controller,
union pci_addr_reg pci_ctrl_addr,
union pci_dev *pci_dev_header);
/* General PCI configuration access routines */
extern void pci_config_out_long(uint32_t bus, /* bus number */
uint32_t dev, /* device number */
uint32_t func, /* function number */
uint32_t offset, /* offset into the configuration
extern void pci_config_out_long(u32_t bus, /* bus number */
u32_t dev, /* device number */
u32_t func, /* function number */
u32_t offset, /* offset into the configuration
* space
*/
uint32_t data /* data written to the offset */
u32_t data /* data written to the offset */
);
extern void pci_config_out_word(uint32_t bus, /* bus number */
uint32_t dev, /* device number */
uint32_t func, /* function number */
uint32_t offset, /* offset into the configuration
extern void pci_config_out_word(u32_t bus, /* bus number */
u32_t dev, /* device number */
u32_t func, /* function number */
u32_t offset, /* offset into the configuration
* space
*/
uint16_t data /* data written to the offset */
u16_t data /* data written to the offset */
);
extern void pci_config_out_byte(uint32_t bus, /* bus number */
uint32_t dev, /* device number */
uint32_t func, /* function number */
uint32_t offset, /* offset into the configuration
extern void pci_config_out_byte(u32_t bus, /* bus number */
u32_t dev, /* device number */
u32_t func, /* function number */
u32_t offset, /* offset into the configuration
* space
*/
uint8_t data /* data written to the offset */
u8_t data /* data written to the offset */
);
extern void pci_config_in_long(uint32_t bus, /* bus number */
uint32_t dev, /* device number */
uint32_t func, /* function number */
uint32_t offset, /* offset into the configuration
extern void pci_config_in_long(u32_t bus, /* bus number */
u32_t dev, /* device number */
u32_t func, /* function number */
u32_t offset, /* offset into the configuration
* space
*/
uint32_t *data /* return value address */
u32_t *data /* return value address */
);
extern void pci_config_in_word(uint32_t bus, /* bus number */
uint32_t dev, /* device number */
uint32_t func, /* function number */
uint32_t offset, /* offset into the configuration
extern void pci_config_in_word(u32_t bus, /* bus number */
u32_t dev, /* device number */
u32_t func, /* function number */
u32_t offset, /* offset into the configuration
* space
*/
uint16_t *data /* return value address */
u16_t *data /* return value address */
);
extern void pci_config_in_byte(uint32_t bus, /* bus number */
uint32_t dev, /* device number */
uint32_t func, /* function number */
uint32_t offset, /* offset into the configuration
extern void pci_config_in_byte(u32_t bus, /* bus number */
u32_t dev, /* device number */
u32_t func, /* function number */
u32_t offset, /* offset into the configuration
* space
*/
uint8_t *data /* return value address */
u8_t *data /* return value address */
);
extern int pci_config_ext_cap_ptr_find(
uint8_t ext_cap_find_id, /* Extended capabilities ID to search for */
uint32_t bus, /* PCI bus number */
uint32_t device, /* PCI device number */
uint32_t function, /* PCI function number */
uint8_t *p_offset /* returned config space offset */
u8_t ext_cap_find_id, /* Extended capabilities ID to search for */
u32_t bus, /* PCI bus number */
u32_t device, /* PCI device number */
u32_t function, /* PCI function number */
u8_t *p_offset /* returned config space offset */
);
#endif /* _ASMLANGUAGE */

2
include/drivers/rand32.h
View file

@ -26,7 +26,7 @@
extern "C" {
#endif
extern uint32_t sys_rand32_get(void);
extern u32_t sys_rand32_get(void);
#ifdef __cplusplus
}

2
include/drivers/sysapic.h
View file

@ -23,7 +23,7 @@
/* irq_controller.h interface */
void __irq_controller_irq_config(unsigned int vector, unsigned int irq,
uint32_t flags);
u32_t flags);
int __irq_controller_isr_vector_get(void);

8
include/drivers/system_timer.h
View file

@ -36,14 +36,14 @@ extern void sys_clock_disable(void);
#endif
#ifdef CONFIG_TICKLESS_IDLE
extern void _timer_idle_enter(int32_t ticks);
extern void _timer_idle_enter(s32_t ticks);
extern void _timer_idle_exit(void);
#endif /* CONFIG_TICKLESS_IDLE */
extern void _nano_sys_clock_tick_announce(int32_t ticks);
extern void _nano_sys_clock_tick_announce(s32_t ticks);
extern int sys_clock_device_ctrl(struct device *device,
uint32_t ctrl_command, void *context);
u32_t ctrl_command, void *context);
/*
* Currently regarding timers, only loapic timer and arcv2_timer0 implements
@ -54,7 +54,7 @@ extern int sys_clock_device_ctrl(struct device *device,
#define sys_clock_device_ctrl device_pm_control_nop
#endif
extern int32_t _sys_idle_elapsed_ticks;
extern s32_t _sys_idle_elapsed_ticks;
#define _sys_clock_tick_announce() \
_nano_sys_clock_tick_announce(_sys_idle_elapsed_ticks)

38
include/drivers/usb/usb_dc.h
View file

@ -71,15 +71,15 @@ struct usb_dc_ep_cfg_data {
* IN EP = 0x80 | \<endpoint number\>
* OUT EP = 0x00 | \<endpoint number\>
*/
uint8_t ep_addr;
uint16_t ep_mps; /** Endpoint max packet size */
u8_t ep_addr;
u16_t ep_mps; /** Endpoint max packet size */
enum usb_dc_ep_type ep_type; /** Endpoint type */
};
/**
* Callback function signature for the USB Endpoint status
*/
typedef void (*usb_dc_ep_callback)(uint8_t ep,
typedef void (*usb_dc_ep_callback)(u8_t ep,
enum usb_dc_ep_cb_status_code cb_status);
/**
@ -125,7 +125,7 @@ int usb_dc_reset(void);
*
* @return 0 on success, negative errno code on fail.
*/
int usb_dc_set_address(const uint8_t addr);
int usb_dc_set_address(const u8_t addr);
/**
* @brief set USB device controller status callback
@ -160,7 +160,7 @@ int usb_dc_ep_configure(const struct usb_dc_ep_cfg_data * const cfg);
*
* @return 0 on success, negative errno code on fail.
*/
int usb_dc_ep_set_stall(const uint8_t ep);
int usb_dc_ep_set_stall(const u8_t ep);
/**
* @brief clear stall condition for the selected endpoint
@ -170,7 +170,7 @@ int usb_dc_ep_set_stall(const uint8_t ep);
*
* @return 0 on success, negative errno code on fail.
*/
int usb_dc_ep_clear_stall(const uint8_t ep);
int usb_dc_ep_clear_stall(const u8_t ep);
/**
* @brief check if selected endpoint is stalled
@ -181,7 +181,7 @@ int usb_dc_ep_clear_stall(const uint8_t ep);
*
* @return 0 on success, negative errno code on fail.
*/
int usb_dc_ep_is_stalled(const uint8_t ep, uint8_t *const stalled);
int usb_dc_ep_is_stalled(const u8_t ep, u8_t *const stalled);
/**
* @brief halt the selected endpoint
@ -191,7 +191,7 @@ int usb_dc_ep_is_stalled(const uint8_t ep, uint8_t *const stalled);
*
* @return 0 on success, negative errno code on fail.
*/
int usb_dc_ep_halt(const uint8_t ep);
int usb_dc_ep_halt(const u8_t ep);
/**
* @brief enable the selected endpoint
@ -205,7 +205,7 @@ int usb_dc_ep_halt(const uint8_t ep);
*
* @return 0 on success, negative errno code on fail.
*/
int usb_dc_ep_enable(const uint8_t ep);
int usb_dc_ep_enable(const u8_t ep);
/**
* @brief disable the selected endpoint
@ -219,7 +219,7 @@ int usb_dc_ep_enable(const uint8_t ep);
*
* @return 0 on success, negative errno code on fail.
*/
int usb_dc_ep_disable(const uint8_t ep);
int usb_dc_ep_disable(const u8_t ep);
/**
* @brief flush the selected endpoint
@ -229,7 +229,7 @@ int usb_dc_ep_disable(const uint8_t ep);
*
* @return 0 on success, negative errno code on fail.
*/
int usb_dc_ep_flush(const uint8_t ep);
int usb_dc_ep_flush(const u8_t ep);
/**
* @brief write data to the specified endpoint
@ -248,8 +248,8 @@ int usb_dc_ep_flush(const uint8_t ep);
*
* @return 0 on success, negative errno code on fail.
*/
int usb_dc_ep_write(const uint8_t ep, const uint8_t *const data,
const uint32_t data_len, uint32_t * const ret_bytes);
int usb_dc_ep_write(const u8_t ep, const u8_t *const data,
const u32_t data_len, u32_t * const ret_bytes);
/**
* @brief read data from the specified endpoint
@ -270,8 +270,8 @@ int usb_dc_ep_write(const uint8_t ep, const uint8_t *const data,
*
* @return 0 on success, negative errno code on fail.
*/
int usb_dc_ep_read(const uint8_t ep, uint8_t *const data,
const uint32_t max_data_len, uint32_t *const read_bytes);
int usb_dc_ep_read(const u8_t ep, u8_t *const data,
const u32_t max_data_len, u32_t *const read_bytes);
/**
* @brief set callback function for the specified endpoint
@ -286,7 +286,7 @@ int usb_dc_ep_read(const uint8_t ep, uint8_t *const data,
*
* @return 0 on success, negative errno code on fail.
*/
int usb_dc_ep_set_callback(const uint8_t ep, const usb_dc_ep_callback cb);
int usb_dc_ep_set_callback(const u8_t ep, const usb_dc_ep_callback cb);
/**
* @brief read data from the specified endpoint
@ -306,8 +306,8 @@ int usb_dc_ep_set_callback(const uint8_t ep, const usb_dc_ep_callback cb);
*
* @return 0 on success, negative errno code on fail.
*/
int usb_dc_ep_read_wait(uint8_t ep, uint8_t *data, uint32_t max_data_len,
uint32_t *read_bytes);
int usb_dc_ep_read_wait(u8_t ep, u8_t *data, u32_t max_data_len,
u32_t *read_bytes);
/**
@ -323,6 +323,6 @@ int usb_dc_ep_read_wait(uint8_t ep, uint8_t *data, uint32_t max_data_len,
*
* @return 0 on success, negative errno code on fail.
*/
int usb_dc_ep_read_continue(uint8_t ep);
int usb_dc_ep_read_continue(u8_t ep);
#endif /* __USB_DC_H__ */

8
include/eth.h
View file

@ -25,9 +25,9 @@ extern "C" {
* This structure holds all API function pointers.
*/
struct eth_driver_api {
int (*send)(struct device *dev, uint8_t *buffer, uint16_t len);
int (*send)(struct device *dev, u8_t *buffer, u16_t len);
void (*register_callback)(struct device *dev,
void (*cb)(uint8_t *buffer, uint16_t len));
void (*cb)(u8_t *buffer, u16_t len));
};
/**
@ -41,7 +41,7 @@ struct eth_driver_api {
*
* @return Error code
*/
static inline int eth_send(struct device *dev, uint8_t *buffer, uint16_t len)
static inline int eth_send(struct device *dev, u8_t *buffer, u16_t len)
{
const struct eth_driver_api *api = dev->driver_api;
@ -59,7 +59,7 @@ static inline int eth_send(struct device *dev, uint8_t *buffer, uint16_t len)
* @return Error code
*/
static inline void eth_register_callback(struct device *dev,
void (*cb)(uint8_t *buffer, uint16_t len))
void (*cb)(u8_t *buffer, u16_t len))
{
const struct eth_driver_api *api = dev->driver_api;

40
include/gpio.h
View file

@ -198,7 +198,7 @@ struct gpio_callback;
* @param "struct device *port" Device struct for the GPIO device.
* @param "struct gpio_callback *cb" Original struct gpio_callback
* owning this handler
* @param "uint32_t pins" Mask of pins that triggers the callback handler
* @param "u32_t pins" Mask of pins that triggers the callback handler
*
* Note: cb pointer can be used to retrieve private data through
* CONTAINER_OF() if original struct gpio_callback is stored in
@ -206,7 +206,7 @@ struct gpio_callback;
*/
typedef void (*gpio_callback_handler_t)(struct device *port,
struct gpio_callback *cb,
uint32_t pins);
u32_t pins);
/**
* @brief GPIO callback structure
@ -233,7 +233,7 @@ struct gpio_callback {
* called or not. The selected pins must be configured to trigger
* an interrupt.
*/
uint32_t pin_mask;
u32_t pin_mask;
};
/**
@ -244,21 +244,21 @@ struct gpio_callback {
* (Internal use only.)
*/
typedef int (*gpio_config_t)(struct device *port, int access_op,
uint32_t pin, int flags);
u32_t pin, int flags);
typedef int (*gpio_write_t)(struct device *port, int access_op,
uint32_t pin, uint32_t value);
u32_t pin, u32_t value);
typedef int (*gpio_read_t)(struct device *port, int access_op,
uint32_t pin, uint32_t *value);
u32_t pin, u32_t *value);
typedef int (*gpio_manage_callback_t)(struct device *port,
struct gpio_callback *callback,
bool set);
typedef int (*gpio_enable_callback_t)(struct device *port,
int access_op,
uint32_t pin);
u32_t pin);
typedef int (*gpio_disable_callback_t)(struct device *port,
int access_op,
uint32_t pin);
typedef uint32_t (*gpio_api_get_pending_int)(struct device *dev);
u32_t pin);
typedef u32_t (*gpio_api_get_pending_int)(struct device *dev);
struct gpio_driver_api {
gpio_config_t config;
@ -280,7 +280,7 @@ struct gpio_driver_api {
* @param flags Flags for pin configuration. IN/OUT, interrupt ...
* @return 0 if successful, negative errno code on failure.
*/
static inline int gpio_pin_configure(struct device *port, uint32_t pin,
static inline int gpio_pin_configure(struct device *port, u32_t pin,
int flags)
{
const struct gpio_driver_api *api = port->driver_api;
@ -295,8 +295,8 @@ static inline int gpio_pin_configure(struct device *port, uint32_t pin,
* @param value Value set on the pin.
* @return 0 if successful, negative errno code on failure.
*/
static inline int gpio_pin_write(struct device *port, uint32_t pin,
uint32_t value)
static inline int gpio_pin_write(struct device *port, u32_t pin,
u32_t value)
{
const struct gpio_driver_api *api = port->driver_api;
@ -313,8 +313,8 @@ static inline int gpio_pin_write(struct device *port, uint32_t pin,
* @param value Integer pointer to receive the data values from the pin.
* @return 0 if successful, negative errno code on failure.
*/
static inline int gpio_pin_read(struct device *port, uint32_t pin,
uint32_t *value)
static inline int gpio_pin_read(struct device *port, u32_t pin,
u32_t *value)
{
const struct gpio_driver_api *api = port->driver_api;
@ -329,7 +329,7 @@ static inline int gpio_pin_read(struct device *port, uint32_t pin,
*/
static inline void gpio_init_callback(struct gpio_callback *callback,
gpio_callback_handler_t handler,
uint32_t pin_mask)
u32_t pin_mask)
{
__ASSERT(callback, "Callback pointer should not be NULL");
__ASSERT(handler, "Callback handler pointer should not be NULL");
@ -385,7 +385,7 @@ static inline int gpio_remove_callback(struct device *port,
* the pin to trigger an interruption. So as a semantic detail, if no
* callback is registered, of course none will be called.
*/
static inline int gpio_pin_enable_callback(struct device *port, uint32_t pin)
static inline int gpio_pin_enable_callback(struct device *port, u32_t pin)
{
const struct gpio_driver_api *api = port->driver_api;
@ -398,7 +398,7 @@ static inline int gpio_pin_enable_callback(struct device *port, uint32_t pin)
* @param pin Pin number where the callback function is disabled.
* @return 0 if successful, negative errno code on failure.
*/
static inline int gpio_pin_disable_callback(struct device *port, uint32_t pin)
static inline int gpio_pin_disable_callback(struct device *port, u32_t pin)
{
const struct gpio_driver_api *api = port->driver_api;
@ -433,7 +433,7 @@ static inline int gpio_port_configure(struct device *port, int flags)
* @param value Value to set on the port.
* @return 0 if successful, negative errno code on failure.
*/
static inline int gpio_port_write(struct device *port, uint32_t value)
static inline int gpio_port_write(struct device *port, u32_t value)
{
const struct gpio_driver_api *api = port->driver_api;
@ -453,7 +453,7 @@ static inline int gpio_port_write(struct device *port, uint32_t value)
* @param value Integer pointer to receive the data value from the port.
* @return 0 if successful, negative errno code on failure.
*/
static inline int gpio_port_read(struct device *port, uint32_t *value)
static inline int gpio_port_read(struct device *port, u32_t *value)
{
const struct gpio_driver_api *api = port->driver_api;
@ -512,7 +512,7 @@ static inline int gpio_get_pending_int(struct device *dev)
struct gpio_pin_config {
char *gpio_controller;
uint32_t gpio_pin;
u32_t gpio_pin;
};
#define GPIO_DECLARE_PIN_CONFIG_IDX(_idx) \

146
include/i2c.h
View file

@ -86,23 +86,23 @@ extern "C" {
*/
struct i2c_msg {
/** Data buffer in bytes */
uint8_t *buf;
u8_t *buf;
/** Length of buffer in bytes */
uint32_t len;
u32_t len;
/** Flags for this message */
uint8_t flags;
u8_t flags;
};
union dev_config {
uint32_t raw;
u32_t raw;
struct __bits {
uint32_t use_10_bit_addr : 1;
uint32_t speed : 3;
uint32_t is_master_device : 1;
uint32_t is_slave_read : 1;
uint32_t reserved : 26;
u32_t use_10_bit_addr : 1;
u32_t speed : 3;
u32_t is_master_device : 1;
u32_t is_slave_read : 1;
u32_t reserved : 26;
} bits;
};
@ -113,11 +113,11 @@ union dev_config {
* public documentation.
*/
typedef int (*i2c_api_configure_t)(struct device *dev,
uint32_t dev_config);
u32_t dev_config);
typedef int (*i2c_api_full_io_t)(struct device *dev,
struct i2c_msg *msgs,
uint8_t num_msgs,
uint16_t addr);
u8_t num_msgs,
u16_t addr);
struct i2c_driver_api {
i2c_api_configure_t configure;
@ -137,7 +137,7 @@ struct i2c_driver_api {
* @retval 0 If successful.
* @retval -EIO General input / output error, failed to configure device.
*/
static inline int i2c_configure(struct device *dev, uint32_t dev_config)
static inline int i2c_configure(struct device *dev, u32_t dev_config)
{
const struct i2c_driver_api *api = dev->driver_api;
@ -157,8 +157,8 @@ static inline int i2c_configure(struct device *dev, uint32_t dev_config)
* @retval 0 If successful.
* @retval -EIO General input / output error.
*/
static inline int i2c_write(struct device *dev, uint8_t *buf,
uint32_t num_bytes, uint16_t addr)
static inline int i2c_write(struct device *dev, u8_t *buf,
u32_t num_bytes, u16_t addr)
{
const struct i2c_driver_api *api = dev->driver_api;
struct i2c_msg msg;
@ -183,8 +183,8 @@ static inline int i2c_write(struct device *dev, uint8_t *buf,
* @retval 0 If successful.
* @retval -EIO General input / output error.
*/
static inline int i2c_read(struct device *dev, uint8_t *buf,
uint32_t num_bytes, uint16_t addr)
static inline int i2c_read(struct device *dev, u8_t *buf,
u32_t num_bytes, u16_t addr)
{
const struct i2c_driver_api *api = dev->driver_api;
struct i2c_msg msg;
@ -215,8 +215,8 @@ static inline int i2c_read(struct device *dev, uint8_t *buf,
* @retval -EIO General input / output error.
*/
static inline int i2c_transfer(struct device *dev,
struct i2c_msg *msgs, uint8_t num_msgs,
uint16_t addr)
struct i2c_msg *msgs, u8_t num_msgs,
u16_t addr)
{
const struct i2c_driver_api *api = dev->driver_api;
@ -238,9 +238,9 @@ static inline int i2c_transfer(struct device *dev,
* @retval 0 If successful.
* @retval -EIO General input / output error.
*/
static inline int i2c_burst_read(struct device *dev, uint16_t dev_addr,
uint8_t start_addr, uint8_t *buf,
uint8_t num_bytes)
static inline int i2c_burst_read(struct device *dev, u16_t dev_addr,
u8_t start_addr, u8_t *buf,
u8_t num_bytes)
{
const struct i2c_driver_api *api = dev->driver_api;
struct i2c_msg msg[2];
@ -271,9 +271,9 @@ static inline int i2c_burst_read(struct device *dev, uint16_t dev_addr,
* @retval 0 If successful.
* @retval -EIO General input / output error.
*/
static inline int i2c_burst_write(struct device *dev, uint16_t dev_addr,
uint8_t start_addr, uint8_t *buf,
uint8_t num_bytes)
static inline int i2c_burst_write(struct device *dev, u16_t dev_addr,
u8_t start_addr, u8_t *buf,
u8_t num_bytes)
{
const struct i2c_driver_api *api = dev->driver_api;
struct i2c_msg msg[2];
@ -303,8 +303,8 @@ static inline int i2c_burst_write(struct device *dev, uint16_t dev_addr,
* @retval 0 If successful.
* @retval -EIO General input / output error.
*/
static inline int i2c_reg_read_byte(struct device *dev, uint16_t dev_addr,
uint8_t reg_addr, uint8_t *value)
static inline int i2c_reg_read_byte(struct device *dev, u16_t dev_addr,
u8_t reg_addr, u8_t *value)
{
return i2c_burst_read(dev, dev_addr, reg_addr, value, 1);
}
@ -323,10 +323,10 @@ static inline int i2c_reg_read_byte(struct device *dev, uint16_t dev_addr,
* @retval 0 If successful.
* @retval -EIO General input / output error.
*/
static inline int i2c_reg_write_byte(struct device *dev, uint16_t dev_addr,
uint8_t reg_addr, uint8_t value)
static inline int i2c_reg_write_byte(struct device *dev, u16_t dev_addr,
u8_t reg_addr, u8_t value)
{
uint8_t tx_buf[2] = {reg_addr, value};
u8_t tx_buf[2] = {reg_addr, value};
return i2c_write(dev, tx_buf, 2, dev_addr);
}
@ -346,11 +346,11 @@ static inline int i2c_reg_write_byte(struct device *dev, uint16_t dev_addr,
* @retval 0 If successful.
* @retval -EIO General input / output error.
*/
static inline int i2c_reg_update_byte(struct device *dev, uint8_t dev_addr,
uint8_t reg_addr, uint8_t mask,
uint8_t value)
static inline int i2c_reg_update_byte(struct device *dev, u8_t dev_addr,
u8_t reg_addr, u8_t mask,
u8_t value)
{
uint8_t old_value, new_value;
u8_t old_value, new_value;
int rc;
rc = i2c_reg_read_byte(dev, dev_addr, reg_addr, &old_value);
@ -381,12 +381,12 @@ static inline int i2c_reg_update_byte(struct device *dev, uint8_t dev_addr,
* @retval 0 If successful.
* @retval Negative errno code if failure.
*/
static inline int i2c_burst_read16(struct device *dev, uint16_t dev_addr,
uint16_t start_addr, uint8_t *buf,
uint8_t num_bytes)
static inline int i2c_burst_read16(struct device *dev, u16_t dev_addr,
u16_t start_addr, u8_t *buf,
u8_t num_bytes)
{
const struct i2c_driver_api *api = dev->driver_api;
uint8_t addr_buffer[2];
u8_t addr_buffer[2];
struct i2c_msg msg[2];
addr_buffer[1] = start_addr & 0xFF;
@ -417,12 +417,12 @@ static inline int i2c_burst_read16(struct device *dev, uint16_t dev_addr,
* @retval 0 If successful.
* @retval Negative errno code if failure.
*/
static inline int i2c_burst_write16(struct device *dev, uint16_t dev_addr,
uint16_t start_addr, uint8_t *buf,
uint8_t num_bytes)
static inline int i2c_burst_write16(struct device *dev, u16_t dev_addr,
u16_t start_addr, u8_t *buf,
u8_t num_bytes)
{
const struct i2c_driver_api *api = dev->driver_api;
uint8_t addr_buffer[2];
u8_t addr_buffer[2];
struct i2c_msg msg[2];
addr_buffer[1] = start_addr & 0xFF;
@ -452,8 +452,8 @@ static inline int i2c_burst_write16(struct device *dev, uint16_t dev_addr,
* @retval 0 If successful.
* @retval Negative errno code if failure.
*/
static inline int i2c_reg_read16(struct device *dev, uint16_t dev_addr,
uint16_t reg_addr, uint8_t *value)
static inline int i2c_reg_read16(struct device *dev, u16_t dev_addr,
u16_t reg_addr, u8_t *value)
{
return i2c_burst_read16(dev, dev_addr, reg_addr, value, 1);
}
@ -472,8 +472,8 @@ static inline int i2c_reg_read16(struct device *dev, uint16_t dev_addr,
* @retval 0 If successful.
* @retval Negative errno code if failure.
*/
static inline int i2c_reg_write16(struct device *dev, uint16_t dev_addr,
uint16_t reg_addr, uint8_t value)
static inline int i2c_reg_write16(struct device *dev, u16_t dev_addr,
u16_t reg_addr, u8_t value)
{
return i2c_burst_write16(dev, dev_addr, reg_addr, &value, 1);
}
@ -493,11 +493,11 @@ static inline int i2c_reg_write16(struct device *dev, uint16_t dev_addr,
* @retval 0 If successful.
* @retval Negative errno code if failure.
*/
static inline int i2c_reg_update16(struct device *dev, uint16_t dev_addr,
uint16_t reg_addr, uint8_t mask,
uint8_t value)
static inline int i2c_reg_update16(struct device *dev, u16_t dev_addr,
u16_t reg_addr, u8_t mask,
u8_t value)
{
uint8_t old_value, new_value;
u8_t old_value, new_value;
int rc;
rc = i2c_reg_read16(dev, dev_addr, reg_addr, &old_value);
@ -531,10 +531,10 @@ static inline int i2c_reg_update16(struct device *dev, uint16_t dev_addr,
* @retval 0 If successful.
* @retval Negative errno code if failure.
*/
static inline int i2c_burst_read_addr(struct device *dev, uint16_t dev_addr,
uint8_t *start_addr,
const uint8_t addr_size,
uint8_t *buf, uint8_t num_bytes)
static inline int i2c_burst_read_addr(struct device *dev, u16_t dev_addr,
u8_t *start_addr,
const u8_t addr_size,
u8_t *buf, u8_t num_bytes)
{
const struct i2c_driver_api *api = dev->driver_api;
struct i2c_msg msg[2];
@ -567,10 +567,10 @@ static inline int i2c_burst_read_addr(struct device *dev, uint16_t dev_addr,
* @retval 0 If successful.
* @retval Negative errno code if failure.
*/
static inline int i2c_burst_write_addr(struct device *dev, uint16_t dev_addr,
uint8_t *start_addr,
const uint8_t addr_size,
uint8_t *buf, uint8_t num_bytes)
static inline int i2c_burst_write_addr(struct device *dev, u16_t dev_addr,
u8_t *start_addr,
const u8_t addr_size,
u8_t *buf, u8_t num_bytes)
{
const struct i2c_driver_api *api = dev->driver_api;
struct i2c_msg msg[2];
@ -604,10 +604,10 @@ static inline int i2c_burst_write_addr(struct device *dev, uint16_t dev_addr,
* @retval Negative errno code if failure.
*/
static inline int i2c_reg_read_addr(struct device *dev,
uint16_t dev_addr,
uint8_t *reg_addr,
const uint8_t addr_size,
uint8_t *value)
u16_t dev_addr,
u8_t *reg_addr,
const u8_t addr_size,
u8_t *value)
{
return i2c_burst_read_addr(dev, dev_addr, reg_addr,
addr_size, value, 1);
@ -631,10 +631,10 @@ static inline int i2c_reg_read_addr(struct device *dev,
* @retval Negative errno code if failure.
*/
static inline int i2c_reg_write_addr(struct device *dev,
uint16_t dev_addr,
uint8_t *reg_addr,
const uint8_t addr_size,
uint8_t value)
u16_t dev_addr,
u8_t *reg_addr,
const u8_t addr_size,
u8_t value)
{
return i2c_burst_write_addr(dev, dev_addr, reg_addr,
addr_size, &value, 1);
@ -659,13 +659,13 @@ static inline int i2c_reg_write_addr(struct device *dev,
* @retval Negative errno code if failure.
*/
static inline int i2c_reg_update_addr(struct device *dev,
uint16_t dev_addr,
uint8_t *reg_addr,
uint8_t addr_size,
uint8_t mask,
uint8_t value)
u16_t dev_addr,
u8_t *reg_addr,
u8_t addr_size,
u8_t mask,
u8_t value)
{
uint8_t old_value, new_value;
u8_t old_value, new_value;
int rc;
rc = i2c_reg_read_addr(dev, dev_addr, reg_addr,
@ -685,7 +685,7 @@ static inline int i2c_reg_update_addr(struct device *dev,
struct i2c_client_config {
char *i2c_master;
uint16_t i2c_addr;
u16_t i2c_addr;
};
#define I2C_DECLARE_CLIENT_CONFIG struct i2c_client_config i2c_client

12
include/ipm.h
View file

@ -37,12 +37,12 @@ extern "C" {
*
* @param "void *context" Arbitrary context pointer provided at
* registration time.
* @param "uint32_t id" Message type identifier.
* @param "u32_t id" Message type identifier.
* @param "volatile void *data" Message data pointer. The correct
* amount of data to read out
* must be inferred using the message id/upper level protocol.
*/
typedef void (*ipm_callback_t)(void *context, uint32_t id, volatile void *data);
typedef void (*ipm_callback_t)(void *context, u32_t id, volatile void *data);
/**
* @typedef ipm_send_t
@ -50,7 +50,7 @@ typedef void (*ipm_callback_t)(void *context, uint32_t id, volatile void *data);
*
* See @a ipm_send() for argument definitions.
*/
typedef int (*ipm_send_t)(struct device *ipmdev, int wait, uint32_t id,
typedef int (*ipm_send_t)(struct device *ipmdev, int wait, u32_t id,
const void *data, int size);
/**
* @typedef ipm_max_data_size_get_t
@ -66,7 +66,7 @@ typedef int (*ipm_max_data_size_get_t)(struct device *ipmdev);
*
* See @a ipm_max_id_val_get() for argument definitions.
*/
typedef uint32_t (*ipm_max_id_val_get_t)(struct device *ipmdev);
typedef u32_t (*ipm_max_id_val_get_t)(struct device *ipmdev);
/**
* @typedef ipm_register_callback_t
@ -128,7 +128,7 @@ struct ipm_driver_api {
* or the device isn't an outbound IPM channel.
* @retval 0 On success.
*/
static inline int ipm_send(struct device *ipmdev, int wait, uint32_t id,
static inline int ipm_send(struct device *ipmdev, int wait, u32_t id,
const void *data, int size)
{
const struct ipm_driver_api *api = ipmdev->driver_api;
@ -180,7 +180,7 @@ static inline int ipm_max_data_size_get(struct device *ipmdev)
*
* @return Maximum possible value of a message ID.
*/
static inline uint32_t ipm_max_id_val_get(struct device *ipmdev)
static inline u32_t ipm_max_id_val_get(struct device *ipmdev)
{
const struct ipm_driver_api *api = ipmdev->driver_api;

146
include/kernel.h
View file

@ -243,7 +243,7 @@ typedef void (*k_thread_entry_t)(void *p1, void *p2, void *p3);
extern k_tid_t k_thread_spawn(char *stack, size_t stack_size,
k_thread_entry_t entry,
void *p1, void *p2, void *p3,
int prio, uint32_t options, int32_t delay);
int prio, u32_t options, s32_t delay);
/**
* @brief Put the current thread to sleep.
@ -255,7 +255,7 @@ extern k_tid_t k_thread_spawn(char *stack, size_t stack_size,
*
* @return N/A
*/
extern void k_sleep(int32_t duration);
extern void k_sleep(s32_t duration);
/**
* @brief Cause the current thread to busy wait.
@ -265,7 +265,7 @@ extern void k_sleep(int32_t duration);
*
* @return N/A
*/
extern void k_busy_wait(uint32_t usec_to_wait);
extern void k_busy_wait(u32_t usec_to_wait);
/**
* @brief Yield the current thread.
@ -348,10 +348,10 @@ struct _static_thread_data {
void *init_p2;
void *init_p3;
int init_prio;
uint32_t init_options;
int32_t init_delay;
u32_t init_options;
s32_t init_delay;
void (*init_abort)(void);
uint32_t init_groups;
u32_t init_groups;
};
#define _THREAD_INITIALIZER(stack, stack_size, \
@ -511,7 +511,7 @@ extern void k_thread_resume(k_tid_t thread);
*
* @return N/A
*/
extern void k_sched_time_slice_set(int32_t slice, int prio);
extern void k_sched_time_slice_set(s32_t slice, int prio);
/**
* @} end defgroup thread_apis
@ -724,25 +724,25 @@ extern void *k_thread_custom_data_get(void);
#endif
#ifdef _NON_OPTIMIZED_TICKS_PER_SEC
extern int32_t _ms_to_ticks(int32_t ms);
extern s32_t _ms_to_ticks(s32_t ms);
#else
static ALWAYS_INLINE int32_t _ms_to_ticks(int32_t ms)
static ALWAYS_INLINE s32_t _ms_to_ticks(s32_t ms)
{
return (int32_t)ceiling_fraction((uint32_t)ms, _ms_per_tick);
return (s32_t)ceiling_fraction((u32_t)ms, _ms_per_tick);
}
#endif
/* added tick needed to account for tick in progress */
#define _TICK_ALIGN 1
static inline int64_t __ticks_to_ms(int64_t ticks)
static inline s64_t __ticks_to_ms(s64_t ticks)
{
#ifdef CONFIG_SYS_CLOCK_EXISTS
#ifdef _NON_OPTIMIZED_TICKS_PER_SEC
return (MSEC_PER_SEC * (uint64_t)ticks) / sys_clock_ticks_per_sec;
return (MSEC_PER_SEC * (u64_t)ticks) / sys_clock_ticks_per_sec;
#else
return (uint64_t)ticks * _ms_per_tick;
return (u64_t)ticks * _ms_per_tick;
#endif
#else
@ -760,11 +760,11 @@ struct _timeout {
sys_dnode_t node;
struct k_thread *thread;
sys_dlist_t *wait_q;
int32_t delta_ticks_from_prev;
s32_t delta_ticks_from_prev;
_timeout_func_t func;
};
extern int32_t _timeout_remaining_get(struct _timeout *timeout);
extern s32_t _timeout_remaining_get(struct _timeout *timeout);
/**
* INTERNAL_HIDDEN @endcond
@ -792,10 +792,10 @@ struct k_timer {
void (*stop_fn)(struct k_timer *);
/* timer period */
int32_t period;
s32_t period;
/* timer status */
uint32_t status;
u32_t status;
/* user-specific data, also used to support legacy features */
void *user_data;
@ -904,7 +904,7 @@ extern void k_timer_init(struct k_timer *timer,
* @return N/A
*/
extern void k_timer_start(struct k_timer *timer,
int32_t duration, int32_t period);
s32_t duration, s32_t period);
/**
* @brief Stop a timer.
@ -936,7 +936,7 @@ extern void k_timer_stop(struct k_timer *timer);
*
* @return Timer status.
*/
extern uint32_t k_timer_status_get(struct k_timer *timer);
extern u32_t k_timer_status_get(struct k_timer *timer);
/**
* @brief Synchronize thread to timer expiration.
@ -955,7 +955,7 @@ extern uint32_t k_timer_status_get(struct k_timer *timer);
*
* @return Timer status.
*/
extern uint32_t k_timer_status_sync(struct k_timer *timer);
extern u32_t k_timer_status_sync(struct k_timer *timer);
/**
* @brief Get time remaining before a timer next expires.
@ -967,7 +967,7 @@ extern uint32_t k_timer_status_sync(struct k_timer *timer);
*
* @return Remaining time (in milliseconds).
*/
static inline int32_t k_timer_remaining_get(struct k_timer *timer)
static inline s32_t k_timer_remaining_get(struct k_timer *timer)
{
return _timeout_remaining_get(&timer->timeout);
}
@ -1021,7 +1021,7 @@ static inline void *k_timer_user_data_get(struct k_timer *timer)
*
* @return Current uptime.
*/
extern int64_t k_uptime_get(void);
extern s64_t k_uptime_get(void);
/**
* @brief Get system uptime (32-bit version).
@ -1036,7 +1036,7 @@ extern int64_t k_uptime_get(void);
*
* @return Current uptime.
*/
extern uint32_t k_uptime_get_32(void);
extern u32_t k_uptime_get_32(void);
/**
* @brief Get elapsed time.
@ -1049,7 +1049,7 @@ extern uint32_t k_uptime_get_32(void);
*
* @return Elapsed time.
*/
extern int64_t k_uptime_delta(int64_t *reftime);
extern s64_t k_uptime_delta(s64_t *reftime);
/**
* @brief Get elapsed time (32-bit version).
@ -1067,7 +1067,7 @@ extern int64_t k_uptime_delta(int64_t *reftime);
*
* @return Elapsed time.
*/
extern uint32_t k_uptime_delta_32(int64_t *reftime);
extern u32_t k_uptime_delta_32(s64_t *reftime);
/**
* @brief Read the hardware clock.
@ -1222,7 +1222,7 @@ extern void k_queue_merge_slist(struct k_queue *queue, sys_slist_t *list);
* @return Address of the data item if successful; NULL if returned
* without waiting, or waiting period timed out.
*/
extern void *k_queue_get(struct k_queue *queue, int32_t timeout);
extern void *k_queue_get(struct k_queue *queue, s32_t timeout);
/**
* @brief Query a queue to see if it has data available.
@ -1495,7 +1495,7 @@ struct k_lifo {
struct k_stack {
_wait_q_t wait_q;
uint32_t *base, *next, *top;
u32_t *base, *next, *top;
_OBJECT_TRACING_NEXT_PTR(k_stack);
};
@ -1531,7 +1531,7 @@ struct k_stack {
* @return N/A
*/
extern void k_stack_init(struct k_stack *stack,
uint32_t *buffer, int num_entries);
u32_t *buffer, int num_entries);
/**
* @brief Push an element onto a stack.
@ -1545,7 +1545,7 @@ extern void k_stack_init(struct k_stack *stack,
*
* @return N/A
*/
extern void k_stack_push(struct k_stack *stack, uint32_t data);
extern void k_stack_push(struct k_stack *stack, u32_t data);
/**
* @brief Pop an element from a stack.
@ -1564,7 +1564,7 @@ extern void k_stack_push(struct k_stack *stack, uint32_t data);
* @retval -EBUSY Returned without waiting.
* @retval -EAGAIN Waiting period timed out.
*/
extern int k_stack_pop(struct k_stack *stack, uint32_t *data, int32_t timeout);
extern int k_stack_pop(struct k_stack *stack, u32_t *data, s32_t timeout);
/**
* @brief Statically define and initialize a stack
@ -1577,7 +1577,7 @@ extern int k_stack_pop(struct k_stack *stack, uint32_t *data, int32_t timeout);
* @param stack_num_entries Maximum number of values that can be stacked.
*/
#define K_STACK_DEFINE(name, stack_num_entries) \
uint32_t __noinit \
u32_t __noinit \
_k_stack_buf_##name[stack_num_entries]; \
struct k_stack name \
__in_section(_k_stack, static, name) = \
@ -1782,7 +1782,7 @@ extern void k_delayed_work_init(struct k_delayed_work *work,
*/
extern int k_delayed_work_submit_to_queue(struct k_work_q *work_q,
struct k_delayed_work *work,
int32_t delay);
s32_t delay);
/**
* @brief Cancel a delayed work item.
@ -1860,7 +1860,7 @@ static inline void k_work_submit(struct k_work *work)
* @retval -EADDRINUSE Work item is pending on a different workqueue.
*/
static inline int k_delayed_work_submit(struct k_delayed_work *work,
int32_t delay)
s32_t delay)
{
return k_delayed_work_submit_to_queue(&k_sys_work_q, work, delay);
}
@ -1876,7 +1876,7 @@ static inline int k_delayed_work_submit(struct k_delayed_work *work,
*
* @return Remaining time (in milliseconds).
*/
static inline int32_t k_delayed_work_remaining_get(struct k_delayed_work *work)
static inline s32_t k_delayed_work_remaining_get(struct k_delayed_work *work)
{
return _timeout_remaining_get(&work->timeout);
}
@ -1892,7 +1892,7 @@ static inline int32_t k_delayed_work_remaining_get(struct k_delayed_work *work)
struct k_mutex {
_wait_q_t wait_q;
struct k_thread *owner;
uint32_t lock_count;
u32_t lock_count;
int owner_orig_prio;
_OBJECT_TRACING_NEXT_PTR(k_mutex);
@ -1962,7 +1962,7 @@ extern void k_mutex_init(struct k_mutex *mutex);
* @retval -EBUSY Returned without waiting.
* @retval -EAGAIN Waiting period timed out.
*/
extern int k_mutex_lock(struct k_mutex *mutex, int32_t timeout);
extern int k_mutex_lock(struct k_mutex *mutex, s32_t timeout);
/**
* @brief Unlock a mutex.
@ -2051,7 +2051,7 @@ extern void k_sem_init(struct k_sem *sem, unsigned int initial_count,
* @retval -EBUSY Returned without waiting.
* @retval -EAGAIN Waiting period timed out.
*/
extern int k_sem_take(struct k_sem *sem, int32_t timeout);
extern int k_sem_take(struct k_sem *sem, s32_t timeout);
/**
* @brief Give a semaphore.
@ -2227,7 +2227,7 @@ extern void k_alert_init(struct k_alert *alert, k_alert_handler_t handler,
* @retval -EBUSY Returned without waiting.
* @retval -EAGAIN Waiting period timed out.
*/
extern int k_alert_recv(struct k_alert *alert, int32_t timeout);
extern int k_alert_recv(struct k_alert *alert, s32_t timeout);
/**
* @brief Signal an alert.
@ -2256,12 +2256,12 @@ extern void k_alert_send(struct k_alert *alert);
struct k_msgq {
_wait_q_t wait_q;
size_t msg_size;
uint32_t max_msgs;
u32_t max_msgs;
char *buffer_start;
char *buffer_end;
char *read_ptr;
char *write_ptr;
uint32_t used_msgs;
u32_t used_msgs;
_OBJECT_TRACING_NEXT_PTR(k_msgq);
};
@ -2335,7 +2335,7 @@ struct k_msgq {
* @return N/A
*/
extern void k_msgq_init(struct k_msgq *q, char *buffer,
size_t msg_size, uint32_t max_msgs);
size_t msg_size, u32_t max_msgs);
/**
* @brief Send a message to a message queue.
@ -2353,7 +2353,7 @@ extern void k_msgq_init(struct k_msgq *q, char *buffer,
* @retval -ENOMSG Returned without waiting or queue purged.
* @retval -EAGAIN Waiting period timed out.
*/
extern int k_msgq_put(struct k_msgq *q, void *data, int32_t timeout);
extern int k_msgq_put(struct k_msgq *q, void *data, s32_t timeout);
/**
* @brief Receive a message from a message queue.
@ -2372,7 +2372,7 @@ extern int k_msgq_put(struct k_msgq *q, void *data, int32_t timeout);
* @retval -ENOMSG Returned without waiting.
* @retval -EAGAIN Waiting period timed out.
*/
extern int k_msgq_get(struct k_msgq *q, void *data, int32_t timeout);
extern int k_msgq_get(struct k_msgq *q, void *data, s32_t timeout);
/**
* @brief Purge a message queue.
@ -2397,7 +2397,7 @@ extern void k_msgq_purge(struct k_msgq *q);
*
* @return Number of unused ring buffer entries.
*/
static inline uint32_t k_msgq_num_free_get(struct k_msgq *q)
static inline u32_t k_msgq_num_free_get(struct k_msgq *q)
{
return q->max_msgs - q->used_msgs;
}
@ -2411,7 +2411,7 @@ static inline uint32_t k_msgq_num_free_get(struct k_msgq *q)
*
* @return Number of messages.
*/
static inline uint32_t k_msgq_num_used_get(struct k_msgq *q)
static inline u32_t k_msgq_num_used_get(struct k_msgq *q)
{
return q->used_msgs;
}
@ -2445,11 +2445,11 @@ struct k_mem_block {
struct k_mbox_msg {
/** internal use only - needed for legacy API support */
uint32_t _mailbox;
u32_t _mailbox;
/** size of message (in bytes) */
size_t size;
/** application-defined information value */
uint32_t info;
u32_t info;
/** sender's message data buffer */
void *tx_data;
/** internal use only - needed for legacy API support */
@ -2535,7 +2535,7 @@ extern void k_mbox_init(struct k_mbox *mbox);
* @retval -EAGAIN Waiting period timed out.
*/
extern int k_mbox_put(struct k_mbox *mbox, struct k_mbox_msg *tx_msg,
int32_t timeout);
s32_t timeout);
/**
* @brief Send a mailbox message in an asynchronous manner.
@ -2574,7 +2574,7 @@ extern void k_mbox_async_put(struct k_mbox *mbox, struct k_mbox_msg *tx_msg,
* @retval -EAGAIN Waiting period timed out.
*/
extern int k_mbox_get(struct k_mbox *mbox, struct k_mbox_msg *rx_msg,
void *buffer, int32_t timeout);
void *buffer, s32_t timeout);
/**
* @brief Retrieve mailbox message data into a buffer.
@ -2625,7 +2625,7 @@ extern void k_mbox_data_get(struct k_mbox_msg *rx_msg, void *buffer);
*/
extern int k_mbox_data_block_get(struct k_mbox_msg *rx_msg,
struct k_mem_pool *pool,
struct k_mem_block *block, int32_t timeout);
struct k_mem_block *block, s32_t timeout);
/**
* @} end defgroup mailbox_apis
@ -2728,7 +2728,7 @@ extern void k_pipe_init(struct k_pipe *pipe, unsigned char *buffer,
*/
extern int k_pipe_put(struct k_pipe *pipe, void *data,
size_t bytes_to_write, size_t *bytes_written,
size_t min_xfer, int32_t timeout);
size_t min_xfer, s32_t timeout);
/**
* @brief Read data from a pipe.
@ -2751,7 +2751,7 @@ extern int k_pipe_put(struct k_pipe *pipe, void *data,
*/
extern int k_pipe_get(struct k_pipe *pipe, void *data,
size_t bytes_to_read, size_t *bytes_read,
size_t min_xfer, int32_t timeout);
size_t min_xfer, s32_t timeout);
/**
* @brief Write memory block to a pipe.
@ -2780,11 +2780,11 @@ extern void k_pipe_block_put(struct k_pipe *pipe, struct k_mem_block *block,
struct k_mem_slab {
_wait_q_t wait_q;
uint32_t num_blocks;
u32_t num_blocks;
size_t block_size;
char *buffer;
char *free_list;
uint32_t num_used;
u32_t num_used;
_OBJECT_TRACING_NEXT_PTR(k_mem_slab);
};
@ -2857,7 +2857,7 @@ struct k_mem_slab {
* @return N/A
*/
extern void k_mem_slab_init(struct k_mem_slab *slab, void *buffer,
size_t block_size, uint32_t num_blocks);
size_t block_size, u32_t num_blocks);
/**
* @brief Allocate memory from a memory slab.
@ -2876,7 +2876,7 @@ extern void k_mem_slab_init(struct k_mem_slab *slab, void *buffer,
* @retval -EAGAIN Waiting period timed out.
*/
extern int k_mem_slab_alloc(struct k_mem_slab *slab, void **mem,
int32_t timeout);
s32_t timeout);
/**
* @brief Free memory allocated from a memory slab.
@ -2901,7 +2901,7 @@ extern void k_mem_slab_free(struct k_mem_slab *slab, void **mem);
*
* @return Number of allocated memory blocks.
*/
static inline uint32_t k_mem_slab_num_used_get(struct k_mem_slab *slab)
static inline u32_t k_mem_slab_num_used_get(struct k_mem_slab *slab)
{
return slab->num_used;
}
@ -2916,7 +2916,7 @@ static inline uint32_t k_mem_slab_num_used_get(struct k_mem_slab *slab)
*
* @return Number of unallocated memory blocks.
*/
static inline uint32_t k_mem_slab_num_free_get(struct k_mem_slab *slab)
static inline u32_t k_mem_slab_num_free_get(struct k_mem_slab *slab)
{
return slab->num_blocks - slab->num_used;
}
@ -2937,7 +2937,7 @@ static inline uint32_t k_mem_slab_num_free_get(struct k_mem_slab *slab)
*/
struct k_mem_pool_quad_block {
char *mem_blocks; /* pointer to the first of four memory blocks */
uint32_t mem_status; /* four bits. If bit is set, memory block is
u32_t mem_status; /* four bits. If bit is set, memory block is
allocated */
};
/*
@ -2954,7 +2954,7 @@ struct k_mem_pool_quad_block {
*/
struct k_mem_pool_block_set {
size_t block_size; /* memory block size */
uint32_t nr_of_entries; /* nr of quad block structures in the array */
u32_t nr_of_entries; /* nr of quad block structures in the array */
struct k_mem_pool_quad_block *quad_block;
int count;
};
@ -2963,8 +2963,8 @@ struct k_mem_pool_block_set {
struct k_mem_pool {
size_t max_block_size;
size_t min_block_size;
uint32_t nr_of_maxblocks;
uint32_t nr_of_block_sets;
u32_t nr_of_maxblocks;
u32_t nr_of_block_sets;
struct k_mem_pool_block_set *block_set;
char *bufblock;
_wait_q_t wait_q;
@ -3098,7 +3098,7 @@ __asm__(".macro _build_mem_pool name, min_size, max_size, n_max\n\t"
__asm__("_mem_pool_block_set_count_" STRINGIFY(name) ":\n\t"); \
__asm__(".int __memory_pool_block_set_count\n\t"); \
__asm__(".popsection\n\t"); \
extern uint32_t _mem_pool_block_set_count_##name; \
extern u32_t _mem_pool_block_set_count_##name; \
extern struct k_mem_pool_block_set _mem_pool_block_sets_##name[]
#define _MEMORY_POOL_BUFFER_DEFINE(name, max_size, n_max, align) \
@ -3179,7 +3179,7 @@ static void __attribute__ ((used)) __k_mem_pool_quad_block_size_define(void)
* @retval -EAGAIN Waiting period timed out.
*/
extern int k_mem_pool_alloc(struct k_mem_pool *pool, struct k_mem_block *block,
size_t size, int32_t timeout);
size_t size, s32_t timeout);
/**
* @brief Free memory allocated from a memory pool.
@ -3374,19 +3374,19 @@ struct k_poll_event {
struct _poller *poller;
/* optional user-specified tag, opaque, untouched by the API */
uint32_t tag:8;
u32_t tag:8;
/* bitfield of event types (bitwise-ORed K_POLL_TYPE_xxx values) */
uint32_t type:_POLL_NUM_TYPES;
u32_t type:_POLL_NUM_TYPES;
/* bitfield of event states (bitwise-ORed K_POLL_STATE_xxx values) */
uint32_t state:_POLL_NUM_STATES;
u32_t state:_POLL_NUM_STATES;
/* mode of operation, from enum k_poll_modes */
uint32_t mode:1;
u32_t mode:1;
/* unused bits in 32-bit word */
uint32_t unused:_POLL_EVENT_NUM_UNUSED_BITS;
u32_t unused:_POLL_EVENT_NUM_UNUSED_BITS;
/* per-type data */
union {
@ -3436,7 +3436,7 @@ struct k_poll_event {
* @return N/A
*/
extern void k_poll_event_init(struct k_poll_event *event, uint32_t type,
extern void k_poll_event_init(struct k_poll_event *event, u32_t type,
int mode, void *obj);
/**
@ -3481,7 +3481,7 @@ extern void k_poll_event_init(struct k_poll_event *event, uint32_t type,
*/
extern int k_poll(struct k_poll_event *events, int num_events,
int32_t timeout);
s32_t timeout);
/**
* @brief Initialize a poll signal object.
@ -3518,7 +3518,7 @@ extern int k_poll_signal(struct k_poll_signal *signal, int result);
/* private internal function */
extern int _handle_obj_poll_event(struct k_poll_event **obj_poll_event,
uint32_t state);
u32_t state);
/**
* @} end defgroup poll_apis
@ -3550,7 +3550,7 @@ extern void k_cpu_idle(void);
*/
extern void k_cpu_atomic_idle(unsigned int key);
extern void _sys_power_save_idle_exit(int32_t ticks);
extern void _sys_power_save_idle_exit(s32_t ticks);
#include <arch/cpu.h>

2
include/kernel_version.h
View file

@ -32,7 +32,7 @@ extern "C" {
/* kernel version routines */
extern uint32_t sys_kernel_version_get(void);
extern u32_t sys_kernel_version_get(void);
#ifdef __cplusplus
}

4
include/linker/intlist.ld
View file

@ -12,8 +12,8 @@
* struct {
* void *spurious_irq_handler;
* void *sw_irq_handler;
* uint32_t num_isrs;
* uint32_t num_vectors;
* u32_t num_isrs;
* u32_t num_vectors;
* struct _isr_list isrs[]; <- of size num_isrs
* }
*

26
include/logging/event_logger.h
View file

@ -47,7 +47,7 @@ struct event_logger {
* @return N/A
*/
void sys_event_logger_init(struct event_logger *logger,
uint32_t *logger_buffer, uint32_t buffer_size);
u32_t *logger_buffer, u32_t buffer_size);
/**
@ -63,8 +63,8 @@ void sys_event_logger_init(struct event_logger *logger,
*
* @return N/A
*/
void sys_event_logger_put(struct event_logger *logger, uint16_t event_id,
uint32_t *event_data, uint8_t data_size);
void sys_event_logger_put(struct event_logger *logger, u16_t event_id,
u32_t *event_data, u8_t data_size);
/**
@ -88,9 +88,9 @@ void sys_event_logger_put(struct event_logger *logger, uint16_t event_id,
* @retval Number of 32-bit words copied.
* @retval 0 If no message was already available.
*/
int sys_event_logger_get(struct event_logger *logger, uint16_t *event_id,
uint8_t *dropped_event_count, uint32_t *buffer,
uint8_t *buffer_size);
int sys_event_logger_get(struct event_logger *logger, u16_t *event_id,
u8_t *dropped_event_count, u32_t *buffer,
u8_t *buffer_size);
/**
* @brief Retrieve an event message from the logger, wait if empty.
@ -113,9 +113,9 @@ int sys_event_logger_get(struct event_logger *logger, uint16_t *event_id,
* @retval EMSGSIZE If the buffer size is smaller than the message size.
* @retval Number of DWORDs copied, otherwise.
*/
int sys_event_logger_get_wait(struct event_logger *logger, uint16_t *event_id,
uint8_t *dropped_event_count, uint32_t *buffer,
uint8_t *buffer_size);
int sys_event_logger_get_wait(struct event_logger *logger, u16_t *event_id,
u8_t *dropped_event_count, u32_t *buffer,
u8_t *buffer_size);
#ifdef CONFIG_SYS_CLOCK_EXISTS
/**
@ -144,10 +144,10 @@ int sys_event_logger_get_wait(struct event_logger *logger, uint16_t *event_id,
* available.
*/
int sys_event_logger_get_wait_timeout(struct event_logger *logger,
uint16_t *event_id,
uint8_t *dropped_event_count,
uint32_t *buffer, uint8_t *buffer_size,
uint32_t timeout);
u16_t *event_id,
u8_t *dropped_event_count,
u32_t *buffer, u8_t *buffer_size,
u32_t timeout);
/**
* @}
*/

26
include/logging/kernel_event_logger.h
View file

@ -58,7 +58,7 @@ static inline void _sys_k_event_logger_interrupt(void) {};
*
* @return Timestamp value (application-defined).
*/
typedef uint32_t (*sys_k_timer_func_t)(void);
typedef u32_t (*sys_k_timer_func_t)(void);
/**
* @cond INTERNAL_HIDDEN
@ -173,9 +173,9 @@ static inline int sys_k_must_log_event(int event_type)
*
* @return N/A
*/
static inline void sys_k_event_logger_put(uint16_t event_id,
uint32_t *event_data,
uint8_t data_size)
static inline void sys_k_event_logger_put(u16_t event_id,
u32_t *event_data,
u8_t data_size)
{
#ifdef CONFIG_KERNEL_EVENT_LOGGER
sys_event_logger_put(&sys_k_event_logger, event_id,
@ -198,9 +198,9 @@ static inline void sys_k_event_logger_put(uint16_t event_id,
* @return N/A
*/
#ifdef CONFIG_KERNEL_EVENT_LOGGER
extern void sys_k_event_logger_put_timed(uint16_t event_id);
extern void sys_k_event_logger_put_timed(u16_t event_id);
#else
static inline void sys_k_event_logger_put_timed(uint16_t event_id)
static inline void sys_k_event_logger_put_timed(u16_t event_id)
{
ARG_UNUSED(event_id);
};
@ -225,8 +225,8 @@ static inline void sys_k_event_logger_put_timed(uint16_t event_id)
* the size of the event to be retrieved.
*/
#ifdef CONFIG_KERNEL_EVENT_LOGGER
static inline int sys_k_event_logger_get(uint16_t *event_id, uint8_t *dropped,
uint32_t *event_data, uint8_t *data_size)
static inline int sys_k_event_logger_get(u16_t *event_id, u8_t *dropped,
u32_t *event_data, u8_t *data_size)
{
return sys_event_logger_get(&sys_k_event_logger, event_id, dropped,
event_data, data_size);
@ -251,8 +251,8 @@ static inline int sys_k_event_logger_get(uint16_t *event_id, uint8_t *dropped,
* the size of the event to be retrieved.
*/
#ifdef CONFIG_KERNEL_EVENT_LOGGER
static inline int sys_k_event_logger_get_wait(uint16_t *event_id,
uint8_t *dropped, uint32_t *event_data, uint8_t *data_size)
static inline int sys_k_event_logger_get_wait(u16_t *event_id,
u8_t *dropped, u32_t *event_data, u8_t *data_size)
{
return sys_event_logger_get_wait(&sys_k_event_logger, event_id, dropped,
event_data, data_size);
@ -281,9 +281,9 @@ static inline int sys_k_event_logger_get_wait(uint16_t *event_id,
* the size of the event to be retrieved.
*/
#if defined(CONFIG_KERNEL_EVENT_LOGGER)
static inline int sys_k_event_logger_get_wait_timeout(uint16_t *event_id,
uint8_t *dropped, uint32_t *event_data,
uint8_t *data_size, uint32_t timeout)
static inline int sys_k_event_logger_get_wait_timeout(u16_t *event_id,
u8_t *dropped, u32_t *event_data,
u8_t *data_size, u32_t timeout)
{
return sys_event_logger_get_wait_timeout(&sys_k_event_logger, event_id,
dropped, event_data,

42
include/misc/byteorder.h
View file

@ -16,8 +16,8 @@
#include <misc/__assert.h>
/* Internal helpers only used by the sys_* APIs further below */
#define __bswap_16(x) ((uint16_t) ((((x) >> 8) & 0xff) | (((x) & 0xff) << 8)))
#define __bswap_32(x) ((uint32_t) ((((x) >> 24) & 0xff) | \
#define __bswap_16(x) ((u16_t) ((((x) >> 8) & 0xff) | (((x) & 0xff) << 8)))
#define __bswap_32(x) ((u32_t) ((((x) >> 24) & 0xff) | \
(((x) >> 8) & 0xff00) | \
(((x) & 0xff00) << 8) | \
(((x) & 0xff) << 24)))
@ -117,7 +117,7 @@
* @param val 16-bit integer in host endianness.
* @param dst Destination memory address to store the result.
*/
static inline void sys_put_be16(uint16_t val, uint8_t dst[2])
static inline void sys_put_be16(u16_t val, u8_t dst[2])
{
dst[0] = val >> 8;
dst[1] = val;
@ -132,7 +132,7 @@ static inline void sys_put_be16(uint16_t val, uint8_t dst[2])
* @param val 32-bit integer in host endianness.
* @param dst Destination memory address to store the result.
*/
static inline void sys_put_be32(uint32_t val, uint8_t dst[4])
static inline void sys_put_be32(u32_t val, u8_t dst[4])
{
sys_put_be16(val >> 16, dst);
sys_put_be16(val, &dst[2]);
@ -147,7 +147,7 @@ static inline void sys_put_be32(uint32_t val, uint8_t dst[4])
* @param val 16-bit integer in host endianness.
* @param dst Destination memory address to store the result.
*/
static inline void sys_put_le16(uint16_t val, uint8_t dst[2])
static inline void sys_put_le16(u16_t val, u8_t dst[2])
{
dst[0] = val;
dst[1] = val >> 8;
@ -162,7 +162,7 @@ static inline void sys_put_le16(uint16_t val, uint8_t dst[2])
* @param val 32-bit integer in host endianness.
* @param dst Destination memory address to store the result.
*/
static inline void sys_put_le32(uint32_t val, uint8_t dst[4])
static inline void sys_put_le32(u32_t val, u8_t dst[4])
{
sys_put_le16(val, dst);
sys_put_le16(val >> 16, &dst[2]);
@ -177,7 +177,7 @@ static inline void sys_put_le32(uint32_t val, uint8_t dst[4])
* @param val 64-bit integer in host endianness.
* @param dst Destination memory address to store the result.
*/
static inline void sys_put_le64(uint64_t val, uint8_t dst[8])
static inline void sys_put_le64(u64_t val, u8_t dst[8])
{
sys_put_le32(val, dst);
sys_put_le32(val >> 32, &dst[4]);
@ -193,9 +193,9 @@ static inline void sys_put_le64(uint64_t val, uint8_t dst[8])
*
* @return 16-bit integer in host endianness.
*/
static inline uint16_t sys_get_be16(const uint8_t src[2])
static inline u16_t sys_get_be16(const u8_t src[2])
{
return ((uint16_t)src[0] << 8) | src[1];
return ((u16_t)src[0] << 8) | src[1];
}
/**
@ -208,9 +208,9 @@ static inline uint16_t sys_get_be16(const uint8_t src[2])
*
* @return 32-bit integer in host endianness.
*/
static inline uint32_t sys_get_be32(const uint8_t src[4])
static inline u32_t sys_get_be32(const u8_t src[4])
{
return ((uint32_t)sys_get_be16(&src[0]) << 16) | sys_get_be16(&src[2]);
return ((u32_t)sys_get_be16(&src[0]) << 16) | sys_get_be16(&src[2]);
}
/**
@ -223,9 +223,9 @@ static inline uint32_t sys_get_be32(const uint8_t src[4])
*
* @return 16-bit integer in host endianness.
*/
static inline uint16_t sys_get_le16(const uint8_t src[2])
static inline u16_t sys_get_le16(const u8_t src[2])
{
return ((uint16_t)src[1] << 8) | src[0];
return ((u16_t)src[1] << 8) | src[0];
}
/**
@ -238,9 +238,9 @@ static inline uint16_t sys_get_le16(const uint8_t src[2])
*
* @return 32-bit integer in host endianness.
*/
static inline uint32_t sys_get_le32(const uint8_t src[4])
static inline u32_t sys_get_le32(const u8_t src[4])
{
return ((uint32_t)sys_get_le16(&src[2]) << 16) | sys_get_le16(&src[0]);
return ((u32_t)sys_get_le16(&src[2]) << 16) | sys_get_le16(&src[0]);
}
/**
@ -253,9 +253,9 @@ static inline uint32_t sys_get_le32(const uint8_t src[4])
*
* @return 64-bit integer in host endianness.
*/
static inline uint64_t sys_get_le64(const uint8_t src[8])
static inline u64_t sys_get_le64(const u8_t src[8])
{
return ((uint64_t)sys_get_le32(&src[4]) << 32) | sys_get_le32(&src[0]);
return ((u64_t)sys_get_le32(&src[4]) << 32) | sys_get_le32(&src[0]);
}
/**
@ -280,7 +280,7 @@ static inline void sys_memcpy_swap(void *dst, const void *src, size_t length)
src += length - 1;
for (; length > 0; length--) {
*((uint8_t *)dst++) = *((uint8_t *)src--);
*((u8_t *)dst++) = *((u8_t *)src--);
}
}
@ -299,10 +299,10 @@ static inline void sys_mem_swap(void *buf, size_t length)
size_t i;
for (i = 0; i < (length/2); i++) {
uint8_t tmp = ((uint8_t *)buf)[i];
u8_t tmp = ((u8_t *)buf)[i];
((uint8_t *)buf)[i] = ((uint8_t *)buf)[length - 1 - i];
((uint8_t *)buf)[length - 1 - i] = tmp;
((u8_t *)buf)[i] = ((u8_t *)buf)[length - 1 - i];
((u8_t *)buf)[length - 1 - i] = tmp;
}
}

32
include/misc/ring_buffer.h
View file

@ -19,20 +19,20 @@
extern "C" {
#endif
#define SIZE32_OF(x) (sizeof((x))/sizeof(uint32_t))
#define SIZE32_OF(x) (sizeof((x))/sizeof(u32_t))
/**
* @brief A structure to represent a ring buffer
*/
struct ring_buf {
uint32_t head; /**< Index in buf for the head element */
uint32_t tail; /**< Index in buf for the tail element */
uint32_t dropped_put_count; /**< Running tally of the number of failed
u32_t head; /**< Index in buf for the head element */
u32_t tail; /**< Index in buf for the tail element */
u32_t dropped_put_count; /**< Running tally of the number of failed
* put attempts
*/
uint32_t size; /**< Size of buf in 32-bit chunks */
uint32_t *buf; /**< Memory region for stored entries */
uint32_t mask; /**< Modulo mask if size is a power of 2 */
u32_t size; /**< Size of buf in 32-bit chunks */
u32_t *buf; /**< Memory region for stored entries */
u32_t mask; /**< Modulo mask if size is a power of 2 */
#ifdef CONFIG_OBJECT_TRACING
struct ring_buf *__next;
#endif
@ -61,7 +61,7 @@ struct ring_buf {
* @param pow Ring buffer size exponent.
*/
#define SYS_RING_BUF_DECLARE_POW2(name, pow) \
static uint32_t _ring_buffer_data_##name[1 << (pow)]; \
static u32_t _ring_buffer_data_##name[1 << (pow)]; \
struct ring_buf name = { \
.size = (1 << (pow)), \
.mask = (1 << (pow)) - 1, \
@ -83,7 +83,7 @@ struct ring_buf {
* @param size32 Size of ring buffer (in 32-bit words).
*/
#define SYS_RING_BUF_DECLARE_SIZE(name, size32) \
static uint32_t _ring_buffer_data_##name[size32]; \
static u32_t _ring_buffer_data_##name[size32]; \
struct ring_buf name = { \
.size = size32, \
.buf = _ring_buffer_data_##name \
@ -102,10 +102,10 @@ struct ring_buf {
*
* @param buf Address of ring buffer.
* @param size Ring buffer size (in 32-bit words).
* @param data Ring buffer data area (typically uint32_t data[size]).
* @param data Ring buffer data area (typically u32_t data[size]).
*/
static inline void sys_ring_buf_init(struct ring_buf *buf, uint32_t size,
uint32_t *data)
static inline void sys_ring_buf_init(struct ring_buf *buf, u32_t size,
u32_t *data)
{
buf->head = 0;
buf->tail = 0;
@ -175,8 +175,8 @@ static inline int sys_ring_buf_space_get(struct ring_buf *buf)
* @retval 0 Data item was written.
* @retval -EMSGSIZE Ring buffer has insufficient free space.
*/
int sys_ring_buf_put(struct ring_buf *buf, uint16_t type, uint8_t value,
uint32_t *data, uint8_t size32);
int sys_ring_buf_put(struct ring_buf *buf, u16_t type, u8_t value,
u32_t *data, u8_t size32);
/**
* @brief Read a data item from a ring buffer.
@ -202,8 +202,8 @@ int sys_ring_buf_put(struct ring_buf *buf, uint16_t type, uint8_t value,
* @retval -EMSGSIZE Data area @a data is too small; @a size32 now contains
* the number of 32-bit words needed.
*/
int sys_ring_buf_get(struct ring_buf *buf, uint16_t *type, uint8_t *value,
uint32_t *data, uint8_t *size32);
int sys_ring_buf_get(struct ring_buf *buf, u16_t *type, u8_t *value,
u32_t *data, u8_t *size32);
/**
* @}

8
include/misc/util.h
View file

@ -25,9 +25,9 @@ extern "C" {
/* Helper to pass a int as a pointer or vice-versa.
* Those are available for 32 bits architectures:
*/
#define POINTER_TO_UINT(x) ((uint32_t) (x))
#define POINTER_TO_UINT(x) ((u32_t) (x))
#define UINT_TO_POINTER(x) ((void *) (x))
#define POINTER_TO_INT(x) ((int32_t) (x))
#define POINTER_TO_INT(x) ((s32_t) (x))
#define INT_TO_POINTER(x) ((void *) (x))
/* Evaluates to 0 if cond is true-ish; compile error otherwise */
@ -85,9 +85,9 @@ static inline int is_power_of_two(unsigned int x)
return (x != 0) && !(x & (x - 1));
}
static inline int64_t arithmetic_shift_right(int64_t value, uint8_t shift)
static inline s64_t arithmetic_shift_right(s64_t value, u8_t shift)
{
int64_t sign_ext;
s64_t sign_ext;
if (shift == 0) {
return value;

24
include/pinmux.h
View file

@ -42,25 +42,25 @@ extern "C" {
* @brief Callback API upon setting a PIN's function
* See pinmux_pin_set() for argument description
*/
typedef int (*pmux_set)(struct device *dev, uint32_t pin, uint32_t func);
typedef int (*pmux_set)(struct device *dev, u32_t pin, u32_t func);
/**
* @typedef pmux_get
* @brief Callback API upon getting a PIN's function
* See pinmux_pin_get() for argument description
*/
typedef int (*pmux_get)(struct device *dev, uint32_t pin, uint32_t *func);
typedef int (*pmux_get)(struct device *dev, u32_t pin, u32_t *func);
/**
* @typedef pmux_pullup
* @brief Callback API upon setting a PIN's pullup
* See pinmix_pin_pullup() for argument description
*/
typedef int (*pmux_pullup)(struct device *dev, uint32_t pin, uint8_t func);
typedef int (*pmux_pullup)(struct device *dev, u32_t pin, u8_t func);
/**
* @typedef pmux_input
* @brief Callback API upon setting a PIN's input function
* See pinmux_input() for argument description
*/
typedef int (*pmux_input)(struct device *dev, uint32_t pin, uint8_t func);
typedef int (*pmux_input)(struct device *dev, u32_t pin, u8_t func);
struct pinmux_driver_api {
pmux_set set;
@ -71,8 +71,8 @@ struct pinmux_driver_api {
static inline int pinmux_pin_set(struct device *dev,
uint32_t pin,
uint32_t func)
u32_t pin,
u32_t func)
{
const struct pinmux_driver_api *api = dev->driver_api;
@ -80,8 +80,8 @@ static inline int pinmux_pin_set(struct device *dev,
}
static inline int pinmux_pin_get(struct device *dev,
uint32_t pin,
uint32_t *func)
u32_t pin,
u32_t *func)
{
const struct pinmux_driver_api *api = dev->driver_api;
@ -89,8 +89,8 @@ static inline int pinmux_pin_get(struct device *dev,
}
static inline int pinmux_pin_pullup(struct device *dev,
uint32_t pin,
uint8_t func)
u32_t pin,
u8_t func)
{
const struct pinmux_driver_api *api = dev->driver_api;
@ -98,8 +98,8 @@ static inline int pinmux_pin_pullup(struct device *dev,
}
static inline int pinmux_pin_input_enable(struct device *dev,
uint32_t pin,
uint8_t func)
u32_t pin,
u8_t func)
{
const struct pinmux_driver_api *api = dev->driver_api;

2
include/power.h
View file

@ -109,7 +109,7 @@ void _sys_soc_resume(void);
* @retval SYS_PM_LOW_POWER_STATE If CPU low power state was entered.
* @retval SYS_PM_DEEP_SLEEP If SOC low power state was entered.
*/
extern int _sys_soc_suspend(int32_t ticks);
extern int _sys_soc_suspend(s32_t ticks);
/**
* @}

64
include/pwm.h
View file

@ -37,7 +37,7 @@ extern "C" {
* See @a pwm_pin_configure() for argument description
*/
typedef int (*pwm_config_t)(struct device *dev, int access_op,
uint32_t pwm, int flags);
u32_t pwm, int flags);
/**
* @typedef pwm_set_values_t
@ -45,7 +45,7 @@ typedef int (*pwm_config_t)(struct device *dev, int access_op,
* See @a pwm_pin_set_values() for argument description
*/
typedef int (*pwm_set_values_t)(struct device *dev, int access_op,
uint32_t pwm, uint32_t on, uint32_t off);
u32_t pwm, u32_t on, u32_t off);
/**
* @typedef pwm_set_duty_cycle_t
@ -53,7 +53,7 @@ typedef int (*pwm_set_values_t)(struct device *dev, int access_op,
* See @a pwm_pin_set_duty_cycle() for argument description
*/
typedef int (*pwm_set_duty_cycle_t)(struct device *dev, int access_op,
uint32_t pwm, uint8_t duty);
u32_t pwm, u8_t duty);
/**
* @typedef pwm_set_phase_t
@ -61,7 +61,7 @@ typedef int (*pwm_set_duty_cycle_t)(struct device *dev, int access_op,
* See @a pwm_pin_set_phase() for argument description
*/
typedef int (*pwm_set_phase_t)(struct device *dev, int access_op,
uint32_t pwm, uint8_t phase);
u32_t pwm, u8_t phase);
/**
* @typedef pwm_set_period_t
@ -69,23 +69,23 @@ typedef int (*pwm_set_phase_t)(struct device *dev, int access_op,
* See @a pwm_pin_set_period() for argument description
*/
typedef int (*pwm_set_period_t)(struct device *dev, int access_op,
uint32_t pwm, uint32_t period);
u32_t pwm, u32_t period);
/**
* @typedef pwm_pin_set_t
* @brief Callback API upon setting the pin
* See @a pwm_pin_set_cycles() for argument description
*/
typedef int (*pwm_pin_set_t)(struct device *dev, uint32_t pwm,
uint32_t period_cycles, uint32_t pulse_cycles);
typedef int (*pwm_pin_set_t)(struct device *dev, u32_t pwm,
u32_t period_cycles, u32_t pulse_cycles);
/**
* @typedef pwm_get_cycles_per_sec_t
* @brief Callback API upon getting cycles per second
* See @a pwm_get_cycles_per_sec() for argument description
*/
typedef int (*pwm_get_cycles_per_sec_t)(struct device *dev, uint32_t pwm,
uint64_t *cycles);
typedef int (*pwm_get_cycles_per_sec_t)(struct device *dev, u32_t pwm,
u64_t *cycles);
/** @brief PWM driver API definition. */
struct pwm_driver_api {
@ -109,8 +109,8 @@ struct pwm_driver_api {
* @retval 0 If successful.
* @retval Negative errno code if failure.
*/
static inline int pwm_pin_set_cycles(struct device *dev, uint32_t pwm,
uint32_t period, uint32_t pulse)
static inline int pwm_pin_set_cycles(struct device *dev, u32_t pwm,
u32_t period, u32_t pulse)
{
struct pwm_driver_api *api;
@ -129,11 +129,11 @@ static inline int pwm_pin_set_cycles(struct device *dev, uint32_t pwm,
* @retval 0 If successful.
* @retval Negative errno code if failure.
*/
static inline int pwm_pin_set_usec(struct device *dev, uint32_t pwm,
uint32_t period, uint32_t pulse)
static inline int pwm_pin_set_usec(struct device *dev, u32_t pwm,
u32_t period, u32_t pulse)
{
struct pwm_driver_api *api;
uint64_t period_cycles, pulse_cycles, cycles_per_sec;
u64_t period_cycles, pulse_cycles, cycles_per_sec;
api = (struct pwm_driver_api *)dev->driver_api;
@ -142,17 +142,17 @@ static inline int pwm_pin_set_usec(struct device *dev, uint32_t pwm,
}
period_cycles = (period * cycles_per_sec) / USEC_PER_SEC;
if (period_cycles >= ((uint64_t)1 << 32)) {
if (period_cycles >= ((u64_t)1 << 32)) {
return -ENOTSUP;
}
pulse_cycles = (pulse * cycles_per_sec) / USEC_PER_SEC;
if (pulse_cycles >= ((uint64_t)1 << 32)) {
if (pulse_cycles >= ((u64_t)1 << 32)) {
return -ENOTSUP;
}
return api->pin_set(dev, pwm, (uint32_t)period_cycles,
(uint32_t)pulse_cycles);
return api->pin_set(dev, pwm, (u32_t)period_cycles,
(u32_t)pulse_cycles);
}
/**
@ -166,8 +166,8 @@ static inline int pwm_pin_set_usec(struct device *dev, uint32_t pwm,
* @retval 0 If successful.
* @retval Negative errno code if failure.
*/
static inline int pwm_get_cycles_per_sec(struct device *dev, uint32_t pwm,
uint64_t *cycles)
static inline int pwm_get_cycles_per_sec(struct device *dev, u32_t pwm,
u64_t *cycles)
{
struct pwm_driver_api *api;
@ -188,7 +188,7 @@ static inline int pwm_get_cycles_per_sec(struct device *dev, uint32_t pwm,
* @retval Negative errno code if failure.
*/
static inline int __deprecated pwm_pin_configure(struct device *dev,
uint8_t pwm, int flags)
u8_t pwm, int flags)
{
const struct pwm_driver_api *api = dev->driver_api;
@ -212,8 +212,8 @@ static inline int __deprecated pwm_pin_configure(struct device *dev,
* @retval Negative errno code if failure.
*/
static inline int __deprecated pwm_pin_set_values(struct device *dev,
uint32_t pwm, uint32_t on,
uint32_t off)
u32_t pwm, u32_t on,
u32_t off)
{
const struct pwm_driver_api *api = dev->driver_api;
@ -237,8 +237,8 @@ static inline int __deprecated pwm_pin_set_values(struct device *dev,
* @retval Negative errno code if failure.
*/
static inline int __deprecated pwm_pin_set_period(struct device *dev,
uint32_t pwm,
uint32_t period)
u32_t pwm,
u32_t period)
{
const struct pwm_driver_api *api = dev->driver_api;
@ -262,8 +262,8 @@ static inline int __deprecated pwm_pin_set_period(struct device *dev,
* @retval Negative errno code if failure.
*/
static inline int __deprecated pwm_pin_set_duty_cycle(struct device *dev,
uint32_t pwm,
uint8_t duty)
u32_t pwm,
u8_t duty)
{
const struct pwm_driver_api *api = dev->driver_api;
@ -286,7 +286,7 @@ static inline int __deprecated pwm_pin_set_duty_cycle(struct device *dev,
* @retval Negative errno code if failure.
*/
static inline int __deprecated pwm_pin_set_phase(struct device *dev,
uint32_t pwm, uint8_t phase)
u32_t pwm, u8_t phase)
{
const struct pwm_driver_api *api = dev->driver_api;
@ -332,7 +332,7 @@ static inline int __deprecated pwm_all_configure(struct device *dev, int flags)
* @retval Negative errno code if failure.
*/
static inline int __deprecated pwm_all_set_values(struct device *dev,
uint32_t on, uint32_t off)
u32_t on, u32_t off)
{
const struct pwm_driver_api *api = dev->driver_api;
@ -356,7 +356,7 @@ static inline int __deprecated pwm_all_set_values(struct device *dev,
* @retval Negative errno code if failure.
*/
static inline int __deprecated pwm_all_period(struct device *dev,
uint32_t period)
u32_t period)
{
const struct pwm_driver_api *api = dev->driver_api;
@ -380,7 +380,7 @@ static inline int __deprecated pwm_all_period(struct device *dev,
* @retval Negative errno code if failure.
*/
static inline int __deprecated pwm_all_set_duty_cycle(struct device *dev,
uint8_t duty)
u8_t duty)
{
const struct pwm_driver_api *api = dev->driver_api;
@ -402,7 +402,7 @@ static inline int __deprecated pwm_all_set_duty_cycle(struct device *dev,
* @retval Negative errno code if failure.
*/
static inline int __deprecated pwm_all_set_phase(struct device *dev,
uint8_t phase)
u8_t phase)
{
const struct pwm_driver_api *api = dev->driver_api;

8
include/random.h
View file

@ -33,8 +33,8 @@ extern "C" {
* See random_get_entropy() for argument description
*/
typedef int (*random_get_entropy_t)(struct device *dev,
uint8_t *buffer,
uint16_t length);
u8_t *buffer,
u16_t length);
struct random_driver_api {
random_get_entropy_t get_entropy;
@ -52,8 +52,8 @@ struct random_driver_api {
* @retval -ERRNO errno code on error.
*/
static inline int random_get_entropy(struct device *dev,
uint8_t *buffer,
uint16_t length)
u8_t *buffer,
u16_t length)
{
const struct random_driver_api *api = dev->driver_api;

16
include/rtc.h
View file

@ -50,11 +50,11 @@ enum clk_rtc_div {
struct rtc_config {
uint32_t init_val;
u32_t init_val;
/*!< enable/disable alarm */
uint8_t alarm_enable;
u8_t alarm_enable;
/*!< initial configuration value for the 32bit RTC alarm value */
uint32_t alarm_val;
u32_t alarm_val;
/*!< Pointer to function to call when alarm value
* matches current RTC value */
void (*cb_fn)(struct device *dev);
@ -65,9 +65,9 @@ typedef void (*rtc_api_disable)(struct device *dev);
typedef int (*rtc_api_set_config)(struct device *dev,
struct rtc_config *config);
typedef int (*rtc_api_set_alarm)(struct device *dev,
const uint32_t alarm_val);
typedef uint32_t (*rtc_api_read)(struct device *dev);
typedef uint32_t (*rtc_api_get_pending_int)(struct device *dev);
const u32_t alarm_val);
typedef u32_t (*rtc_api_read)(struct device *dev);
typedef u32_t (*rtc_api_get_pending_int)(struct device *dev);
struct rtc_driver_api {
rtc_api_enable enable;
@ -78,7 +78,7 @@ struct rtc_driver_api {
rtc_api_get_pending_int get_pending_int;
};
static inline uint32_t rtc_read(struct device *dev)
static inline u32_t rtc_read(struct device *dev)
{
const struct rtc_driver_api *api = dev->driver_api;
@ -109,7 +109,7 @@ static inline int rtc_set_config(struct device *dev,
}
static inline int rtc_set_alarm(struct device *dev,
const uint32_t alarm_val)
const u32_t alarm_val)
{
const struct rtc_driver_api *api = dev->driver_api;

24
include/sensor.h
View file

@ -35,9 +35,9 @@ extern "C" {
*/
struct sensor_value {
/** Integer part of the value. */
int32_t val1;
s32_t val1;
/** Fractional part of the value. */
int32_t val2;
s32_t val2;
};
/**
@ -403,9 +403,9 @@ static inline int sensor_channel_get(struct device *dev,
*
* @return The converted value, in Gs.
*/
static inline int32_t sensor_ms2_to_g(const struct sensor_value *ms2)
static inline s32_t sensor_ms2_to_g(const struct sensor_value *ms2)
{
int64_t micro_ms2 = ms2->val1 * 1000000LL + ms2->val2;
s64_t micro_ms2 = ms2->val1 * 1000000LL + ms2->val2;
if (micro_ms2 > 0) {
return (micro_ms2 + SENSOR_G / 2) / SENSOR_G;
@ -420,10 +420,10 @@ static inline int32_t sensor_ms2_to_g(const struct sensor_value *ms2)
* @param g The G value to be converted.
* @param ms2 A pointer to a sensor_value struct, where the result is stored.
*/
static inline void sensor_g_to_ms2(int32_t g, struct sensor_value *ms2)
static inline void sensor_g_to_ms2(s32_t g, struct sensor_value *ms2)
{
ms2->val1 = ((int64_t)g * SENSOR_G) / 1000000LL;
ms2->val2 = ((int64_t)g * SENSOR_G) % 1000000LL;
ms2->val1 = ((s64_t)g * SENSOR_G) / 1000000LL;
ms2->val2 = ((s64_t)g * SENSOR_G) % 1000000LL;
}
/**
@ -433,9 +433,9 @@ static inline void sensor_g_to_ms2(int32_t g, struct sensor_value *ms2)
*
* @return The converted value, in degrees.
*/
static inline int32_t sensor_rad_to_degrees(const struct sensor_value *rad)
static inline s32_t sensor_rad_to_degrees(const struct sensor_value *rad)
{
int64_t micro_rad_s = rad->val1 * 1000000LL + rad->val2;
s64_t micro_rad_s = rad->val1 * 1000000LL + rad->val2;
if (micro_rad_s > 0) {
return (micro_rad_s * 180LL + SENSOR_PI / 2) / SENSOR_PI;
@ -450,10 +450,10 @@ static inline int32_t sensor_rad_to_degrees(const struct sensor_value *rad)
* @param d The value (in degrees) to be converted.
* @param rad A pointer to a sensor_value struct, where the result is stored.
*/
static inline void sensor_degrees_to_rad(int32_t d, struct sensor_value *rad)
static inline void sensor_degrees_to_rad(s32_t d, struct sensor_value *rad)
{
rad->val1 = ((int64_t)d * SENSOR_PI / 180LL) / 1000000LL;
rad->val2 = ((int64_t)d * SENSOR_PI / 180LL) % 1000000LL;
rad->val1 = ((s64_t)d * SENSOR_PI / 180LL) / 1000000LL;
rad->val2 = ((s64_t)d * SENSOR_PI / 180LL) % 1000000LL;
}
/**

6
include/shared_irq.h
View file

@ -35,15 +35,15 @@ extern int shared_irq_initialize(struct device *port);
typedef void (*shared_irq_config_irq_t)(void);
struct shared_irq_config {
uint32_t irq_num;
u32_t irq_num;
shared_irq_config_irq_t config;
uint32_t client_count;
u32_t client_count;
};
struct shared_irq_client {
struct device *isr_dev;
isr_t isr_func;
uint32_t enabled;
u32_t enabled;
};
struct shared_irq_runtime {

20
include/spi.h
View file

@ -62,8 +62,8 @@ extern "C" {
* spi controller.
*/
struct spi_config {
uint32_t config;
uint32_t max_sys_freq;
u32_t config;
u32_t max_sys_freq;
};
/**
@ -78,15 +78,15 @@ typedef int (*spi_api_configure)(struct device *dev,
* @brief Callback API upon selecting a slave
* See spi_slave_select() for argument description
*/
typedef int (*spi_api_slave_select)(struct device *dev, uint32_t slave);
typedef int (*spi_api_slave_select)(struct device *dev, u32_t slave);
/**
* @typedef spi_api_io
* @brief Callback API for I/O
* See spi_read() and spi_write() for argument descriptions
*/
typedef int (*spi_api_io)(struct device *dev,
const void *tx_buf, uint32_t tx_buf_len,
void *rx_buf, uint32_t rx_buf_len);
const void *tx_buf, u32_t tx_buf_len,
void *rx_buf, u32_t rx_buf_len);
struct spi_driver_api {
spi_api_configure configure;
@ -125,7 +125,7 @@ static inline int spi_configure(struct device *dev,
* @retval 0 If successful.
* @retval Negative errno code if failure.
*/
static inline int spi_slave_select(struct device *dev, uint32_t slave)
static inline int spi_slave_select(struct device *dev, u32_t slave)
{
const struct spi_driver_api *api = dev->driver_api;
@ -145,7 +145,7 @@ static inline int spi_slave_select(struct device *dev, uint32_t slave)
* @retval 0 If successful.
* @retval Negative errno code if failure.
*/
static inline int spi_read(struct device *dev, void *buf, uint32_t len)
static inline int spi_read(struct device *dev, void *buf, u32_t len)
{
const struct spi_driver_api *api = dev->driver_api;
@ -161,7 +161,7 @@ static inline int spi_read(struct device *dev, void *buf, uint32_t len)
* @retval 0 If successful.
* @retval Negative errno code if failure.
*/
static inline int spi_write(struct device *dev, const void *buf, uint32_t len)
static inline int spi_write(struct device *dev, const void *buf, u32_t len)
{
const struct spi_driver_api *api = dev->driver_api;
@ -184,8 +184,8 @@ static inline int spi_write(struct device *dev, const void *buf, uint32_t len)
* @retval Negative errno code if failure.
*/
static inline int spi_transceive(struct device *dev,
const void *tx_buf, uint32_t tx_buf_len,
void *rx_buf, uint32_t rx_buf_len)
const void *tx_buf, u32_t tx_buf_len,
void *rx_buf, u32_t rx_buf_len)
{
const struct spi_driver_api *api = dev->driver_api;

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