The Calibration value of the VRef on stm32U5 is acquired on 14Bit by ADC1
and should be adjusted on 12bit becasue the resolution is 12bit
in this stm32_vref driver.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Interrupt is enabled before reset is released to make sure that the
first IRQ edge is captured, and rx thread can process it.
Remove delay in spi_open as it was redundant due to the "sem_initialised"
semaphore.
Signed-off-by: Ali Hozhabri <ali.hozhabri@st.com>
Replace incorrect and limited runtime parity/data bits conditional
configuration with build-time logic using BUILD_ASSERT. This allows for
more flexible UART configurations, while preventing invalid DTS
configurations at build-time.
Signed-off-by: Kenneth J. Miller <ken@miller.ec>
Move overlapping UART parameter configuration to new
uart_stm32_parameters_set function. This function is called by
uart_stm32_configure upon application/subsystem configuration, and
uart_stm32_registers_configure upon (re-)initialization of driver
instances.
Signed-off-by: Kenneth J. Miller <ken@miller.ec>
Move clock enable and register configuration to their own functions in
preparation for later uart_stm32_reinit function that will use these in
addition to uart_stm32_init.
Signed-off-by: Kenneth J. Miller <ken@miller.ec>
Add static uart_config struct to init macro with corresponding pointer
as uart_stm32_config struct member. This struct will store boot and
runtime UART configuration for reinitialization upon exiting low-power
modes, where register contents might be lost.
Remove hw_flow_control, parity, and baud_rate from uart_stm32_config and
uart_stm32_data structs, respectively, as the need for these is now
obviated by the presence of the uart_config struct, which contains
equivalent members.
Add default baudrate, parity, stop, and data bits constants, used to
initialize the uart_config struct, in case the corresponding UART DT
properties are not set.
Signed-off-by: Kenneth J. Miller <ken@miller.ec>
Move reset configuration from uart_stm32_data to
const uart_stm32_config struct, as this is set once at boot and isn't
modified during runtime.
Signed-off-by: Kenneth J. Miller <ken@miller.ec>
Move select include directives from source to header file, as these pull
data types required by the struct definitions contained within it.
This promotes a more modular file structure.
Signed-off-by: Kenneth J. Miller <ken@miller.ec>
i.MX RT SoC have some pins related to the watchdog.
For example, iomuxc_gpio_ad_b0_15_wdog1_rst_b_deb allows WDOG1_RST_B_DEB
signal to be used as reset source for i.MX RT10xx boards.
Signed-off-by: Benjamin Lemouzy <blemouzy@centralp.fr>
The var "uart_xlnx_ps_driver_api" is defined twice in the source,
so remove one definition of it.
Signed-off-by: Florian La Roche <Florian.LaRoche@gmail.com>
Remove commands which are already defined as subcommands for command
ivshmem. Moreover those commands recursively include themselves as
subcommands.
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
To properly setup L1 exit timing this patch will use buffer interrupt
for HOST DMA and wait for Host HDA to actually start
First interrupt will clear all others.
Signed-off-by: Adrian Bonislawski <adrian.bonislawski@intel.com>
Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
Davinci gpio controller support to add various soc gpio
support (J721E, AM654).
TRM for J721e https://www.ti.com/lit/zip/spruil1
File: spruil1c.pdf
GPIO: section 12.1.2
BeagleBone AI_64 https://beagleboard.org/ai-64
Signed-off-by: Prashanth S <slpp95prashanth@yahoo.com>
GIC-600 and later interrupt controllers have an additional
GICR_PWRR register that controls the power up sequencing
of the redistributors. Added logic to gicv3_rdist_enable to
configure GICR_PWRR if required.
Signed-off-by: Chad Karaginides <quic_chadk@quicinc.com>
Since __sha256_ram_block section must in the first 4KB,
h2ram_pool section is no longer included first inside the
RAMABLE_REGION.
Append h2ram_pool section at the end of used memory, so gap
due to alignment is still available for newly added variables.
Signed-off-by: Dino Li <Dino.Li@ite.com.tw>
The npcx ps2 controller calls Kernel APIs without including the kernel.h
header file. This commit adds the header file to fix the issue.
Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
The npcx ps2 driver does not use the DT_HAS_<compat>_ENABLED Kconfig
symbol to enable the driver. This commits update the Kconig file to
use it and also drop the dependency on ESPI_PERIPHERAL_8042_KBC.
Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
Allow use of multiple mb85rc frams at contiguous i2c addresses as a single
big fram module.
Tested on mb85rc1mt used as two 32K modules, where the first one was at
mb85rc1mt's first i2c address and the second one at mb85rc1mt's second i2c
address.
Signed-off-by: Jakub Michalski <jmichalski@internships.antmicro.com>
Signed-off-by: Mateusz Sierszulski <msierszulski@antmicro.com>
On my end, the ISM330DHCX was stopping working after a few seconds.
After investigation, it seems that the function used to set the device
in pulse mode only works for special modes like tap and embedded functions
and not for data-ready as intended.
The data-ready was then in the default latched mode which does not work
sustainably with the rest of the driver logic. In this mode, the driver
can miss an interrupt and be forever waiting on a new data-ready pulse
which will never happen as the interrupt line is already active.
This calls the correct function to enable pulsed data-ready mode as
described in the datasheet section 9.7 COUNTER_BDR_REG1 (0Bh).
Signed-off-by: Francois Gervais <francoisgervais@gmail.com>
The added cellular modem driver is a naive driver, which
shall serve as a template for implementing tailored
drivers for modems like the UBLOX-R4. It uses only
generic at commands, described in 3gpp, and protocols,
like CMUX and PPP.
A binding for the BG95 has been added, which replaces
the quectel,bg9x. This is neccesary since the BG95 does
not have a usable reset pin, the reset and powerkey are
internally connected to each other.
Signed-off-by: Bjarki Arge Andreasen <baa@trackunit.com>
LSI clock configuration for STM32WBA is located in backup domain.
The backup domain needs to be enabled before the LSI can be enabled.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
Based on the 'Technical Reference Manual' for CC13x2/CC26x2 SimpleLink
MCU family, the device contains factory pre-programmed 64-bit IEEE MAC
address for 802.15.4 radio inside two FCFG 32-bit registers:
1. MAC_15_4_0: first 32-bit of the 64-bit IEEE MAC address
2. MAC_15_4_1: last 32-bit of the 64-bit IEEE MAC address
The way current version of the driver setups the address results in
incorrect bytes order (the address is reversed):
uart:~$ ieee802154 get_ext_addr
Extended address: AF:03:B7:25:00:4B:12:00
This fixes the problem in both drivers (also in the Sub-GHz version)
which results in use of proper EUI-64 address:
uart:~$ ieee802154 get_ext_addr
Extended address: 00:12:4B:00:25:B7:03:AF
IEEE MAC address was confirmed with UniFlash, nRF Sniffer for 802.15.4
and IEEE OUI database (00:12:4B is one of registered OUI for Texas
Instruments).
To prevent confusion in future, short notice about bytes order for
'mac' field in driver's data structures was also included.
Signed-off-by: Piotr Dymacz <pepe2k@gmail.com>
Fix few mismatched CONTAINER_OF, one missing k_work_delayable_from_work
conversion and few cases where the target should be pointing at the
first element explicitly.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Check the TXC flag instead of EOT for the case of endless
transactions (TSIZE = 0), which in this case is always as
the stm32 SPI driver doesn't set TSIZE.
Signed-off-by: Daniel Gaston Ochoa <dgastonochoa@gmail.com>
In case asserts are deactivated, no check is done on buffers length.
Remove asserts and return an error when lengths are not correct.
Check error in case length is set by API user.
Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
Fix compilation error on variable used for size of array in
OSPI and QSPI drivers.
Fixes#61804
Signed-off-by: Dominik Ermel <dominik.ermel@nordicsemi.no>
After conducting tests with a a virtual Bluetooth controller
over TCP it was noticed that some HCI packets may arrive on the
same buffer if sent over a short period of time.
This update ensures the hci packets are parsed correctly in the case
multiple packets are in the same recieving buffer according to
the Bluetooth Spec v5.4 Part E.
Signed-off-by: Victor Chavez <chavez-bermudez@fh-aachen.de>
Change few data units that are currently reported three order of
magnitude off from what the sensors API specifies.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
The various BQ27xxx datasheet seems to indicate a typical power-up or
shutdown to communication time of 250ms typical.
Adjust the driver to include:
- a check to ensure that the MCU has been powered for at least 300ms
before any communicaton
- the same delay when exiting shutdown state
Link: https://www.ti.com/lit/gpn/BQ27427
Suggested-by: Nick Ward <nix.ward@gmail.com>
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
