Commit graph

498 commits

Author SHA1 Message Date
Gerard Marull-Paretas
0660719346 drivers: nrf: select PINCTRL
Drivers for nRF SoCs using pinctrl did not select PINCTRL. This means
boards are forced to enable PINCTRL.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2023-09-20 08:57:09 +02:00
Mahesh Mahadevan
ded77bccb3 drivers: pwm: Use the SDK macro to check if wait field is available
Wait enable is available only for certain SoC's

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
2023-09-19 13:36:13 -05:00
Declan Snyder
e48714949e drivers: pwm_mcux_sctimer: Use clock control API
Use zephyr clock control api instead of hal functions
directly in the sctimer driver

Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
2023-09-12 09:23:46 +02:00
Hein Wessels
1732651062 drivers: pwm: stm32: support capturing on four channels
Previously the pwm capture only support capturing on channel 1
and 2, because the slave mode controller was used, which uses
the signal TIxFP which is not available for channel 3 and 4.

This commit adds optional support for four channel capturing by
changing the method of capturing PWM signals to not use the
slave mode controller to reset the counter register. Instead the
counter is reset in the ISR. This will result in a slight loss
of accuracy but is still within an acceptable range.

Co-authored-by: Jeroen van Dooren <jeroen.van.dooren@nobleo.nl>
Signed-off-by: Hein Wessels <heinwessels93@gmail.com>
2023-09-07 09:42:25 +02:00
Dat Nguyen Duy
92f3fb79fe drivers: pwm: introduce PWM driver for NXP S32 EMIOS
This introduces PWM driver with supporting PWM output
APIs based on NXP S32 EMIOS peripheral. This supports
three mode: OPWFMB, OPWMCB and OPWMB.

OPWFMB uses internal counter, the new period and duty
cycle takes effect immediately.

OPWMCB and OPWMB use external counter as timebase, changing
PWM period at runtime will impact to all channels share the
same timebase. Also the new period and duty cycle take effect
in next period boundary of the timebase

Signed-off-by: Dat Nguyen Duy <dat.nguyenduy@nxp.com>
2023-09-06 11:44:00 +02:00
cyliang tw
449211a307 drivers: pwm: support for Nuvoton numaker series
Add Nuvoton numaker series pwm controller, including
capture feature.

Signed-off-by: cyliang tw <cyliang@nuvoton.com>
2023-08-31 10:19:31 +02:00
Tim Lin
ed37374dac ITE: drivers/pwm: Add the flag of PWM output open-drain mode
This flag is used when the PWM output is set to open-drain mode.

Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
2023-08-25 10:31:42 +02:00
Andrzej Głąbek
88ab153ac4 drivers: pwm_nrf5_sw: Rename to pwm_nrf_sw
Since the driver can now be also used on nRF91 Series, its name need to
be updated to not cause confusion.

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2023-08-16 16:33:03 +02:00
Andrzej Głąbek
8c1c666bab drivers: pwm_nrf5_sw: Extend to work also with DPPI
Instead of directly configuring PPI channels, use the GPPI helper
provided by nrfx. This allows using the driver on nRF53 an nRF91
Series where DPPI is available instead of PPI.

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2023-08-16 16:33:03 +02:00
Andrzej Głąbek
9e860062b6 drivers: pwm_nrf5_sw: Use GPIOTE SET and CLR tasks when available
When possible, use separate GPIOTE tasks for setting the PWM output
high and low instead of using one task to toggle it. This is crucial
for DPPI where the same task cannot be used in more than one channel.

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2023-08-16 16:33:03 +02:00
Andrzej Głąbek
c43cef01fd drivers: pwm_nrf5_sw: Make proper use of 32-bit timers
When a 32-bit timer is configured as the generator, use its full
bit width.

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2023-08-16 16:33:03 +02:00
Andrzej Głąbek
b82f2d9ec2 drivers: pwm_nrf5_sw: Clear GPIOTE config only when switching to GPIO
Otherwise a glitch can appear on the PWM output when the GPIOTE channel
is reconfigured (when GPIOTE releases the pin, GPIO takes control and
drives it to the last written state which may be different than that
used recently by GPIOTE).

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2023-08-16 16:33:03 +02:00
Andrzej Głąbek
b04fd975b6 drivers: pwm_nrf5_sw: Use nrfx HALs instead of direct register accesses
This makes the code easier to maintain.

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2023-08-16 16:33:03 +02:00
Florian Grandel
b954ce4903 drivers: cc13xx_cc26xx: pwm: introduce pwm driver
This change introduces a new PWM driver for all CC13/26xx SoC.

See the documentation in ti,cc13xx-cc26xx-timer-pwm.yaml for detailed
usage instructions.

Signed-off-by: Florian Grandel <fgrandel@code-for-humans.de>
2023-08-14 13:36:12 +00:00
David Ullmann
bcc7499684 drivers: rt6xx ctimer pwm driver
using ctimer to implement pwm api
Signed-off-by: David Ullmann <davidu@meta.com>
2023-08-03 12:39:06 -04:00
Andriy Gelman
d8f955e375 drivers: pwm: Add driver for xmc4xxx using ccu8 module
Adds driver for pwm on xmc4xxx using Capture Compare Unit 8 (CCU8)
module. There are two CCU8 nodes with each one having four slices.
Each slice has two output channels.

Unlike CCU4, this module can generate complementary high-side/low-side
signals for each output channel. A variable dead time can be added
during the off to on transitions to make sure that the
high-side/low-side signals are not on at the same time.

Signed-off-by: Andriy Gelman <andriy.gelman@gmail.com>
2023-07-26 15:09:41 +02:00
Andriy Gelman
23b6e4f507 drivers: pwm: Add driver for xmc4xxx using ccu4 module
Adds driver for pwm on xmc4xxx using Capture Compare Unit 4 (CCU4)
module. There are four CCU4 with each one having four channels
Thus it's possible to have up to 16 pwm output signals. The output of
each channel can only be connected to a specific port/pin. The possible
connection and gpio configurations are defined using pinctrl.

The CCU4 module also has a capture mode. Capture support will be added
in the future.

Signed-off-by: Andriy Gelman <andriy.gelman@gmail.com>
2023-07-26 15:09:41 +02:00
Andrzej Głąbek
8bc0fdaf56 drivers: pwm_nrfx: Clean up driver instantiation
- use CONFIG_HAS_HW_NRF_* symbols consistently in nRF multi-instance
  drivers when creating particular driver instances
- remove unnecessary hidden Kconfig options that indicated the type of
  peripheral to be used by a given instance (e.g. SPI, SPIM, or SPIS)
  and enabled proper nrfx driver instance; instead, use one option per
  peripheral type and include the corresponding shim driver flavor into
  compilation basing on that option (not the one that enables the nrfx
  driver as it was incorrectly done so far in some cases)

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2023-07-25 13:41:51 +02:00
Manimaran A
b4cd531e2c drivers: bbled: pwm: mchp: BBLED low power mode updated
Updated the driver to support low power mode.
Introduced "enable-low-power" flag in device tree to
control(on/off) low power mode.

If flag added in DTS, during sleep BBLED will switch off the LEDs.
Otherwise BBLED will continue the configured blinking pattern on LEDs.

Signed-off-by: Manimaran A <manimaran.a@microchip.com>
2023-07-25 09:09:44 +02:00
Benedikt Schmidt
44810b190c drivers: pwm: implement MAX31790
Implement a driver for the PWM controller MAX31790. This driver
also implements the RPM mode of the controller, which can
be accessed via setting pwm_flags_t accordingly to macros
defined in the driver specific header.

Signed-off-by: Benedikt Schmidt <benedikt.schmidt@embedded-solutions.at>
2023-07-25 09:08:30 +02:00
Manimaran A
85a70c9847 drivers: pwm: mchp: Low power mode enabled
Updated the driver with low power feature

Signed-off-by: Manimaran A <manimaran.a@microchip.com>
2023-07-20 10:42:19 +00:00
Sean Nyekjaer
25d496949f drivers: pwm: pwm_stm32: reset timer using RCC before initialization
If a timer is left running on an stm32mp1, (most likely) on the next run
the timer is stuck.
A simple timer reset before initialization fixes the issue.

Signed-off-by: Sean Nyekjaer <sean@geanix.com>
2023-07-20 10:36:10 +00:00
Sean Nyekjaer
63fa033d11 drivers: pwm: pwm_stm32: add macro for using DT_INST_PARENT()
Make device init more readable by adding a macro

Suggested-by: Francois Ramu <francois.ramu@st.com>
Signed-off-by: Sean Nyekjaer <sean@geanix.com>
2023-07-20 10:36:10 +00:00
Adam Wojasinski
6f201f03f6 drivers: pwm: pwm_nrfx: Revert workaround for stopping PWM instance
This reverts commit 36f4226b2f.

Signed-off-by: Adam Wojasinski <adam.wojasinski@nordicsemi.no>
2023-07-13 13:21:41 +02:00
Anisetti Avinash Krishna
d982ea54b6 drivers: pwm: Add support for pch intel blink driver
This patch adds support for PWM blink which is found in intel's
PCH hardwares.

Signed-off-by: Anisetti Avinash Krishna <anisetti.avinash.krishna@intel.com>
2023-07-12 14:50:16 +03:00
Gustavo Silva
4eedd45c85 drivers: pwm: pwm_mcux: fix for coverity 321142
Fix `PWM_SetupPwm` function being called with `numOfChnls`
argument equal to 2, when in fact only one channel is being set up.

Also add 'U' suffix to `pwmFreq_Hz` unsigned integer argument in
the function call.

Signed-off-by: Gustavo Silva <gustavograzs@gmail.com>
2023-07-10 09:30:05 +02:00
Sean Nyekjaer
9eebaf8b60 drivers: pwm: stm32: read clock divider register for stm32mp1 boards
Since clocks aren't declared in the devicetree for the stm32mp1
co-processor. Read the resulting clock divider here instead.

Signed-off-by: Sean Nyekjaer <sean@geanix.com>
2023-07-06 09:44:01 +00:00
Daniel Leung
26ecaba4af drivers: syscalls: use zephyr_syscall_header
This adds a few line use zephyr_syscall_header() to include
headers containing syscall function prototypes.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2023-06-17 07:57:45 -04:00
Daniel DeGrasse
aefecf1a40 drivers: pwm: pwm_mcux: improve resolution by writing match register
Write PWM match registers directly instead of using the frequency and
duty cycle fields of the MCUX HAL driver. This allows the driver to take
full advantage of the resolution supported by the FlexPWM when setting
duty cycle and carrier frequency.

Fixes #59080

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2023-06-13 06:56:53 -04:00
Adam Wojasinski
36f4226b2f drivers: pwm: pwm_nrfx: Apply workaround for stopping PWM instance
Current implementation of `nrfx_pwm_stopped_check()` doesn't work
as expected when user doesn't provide event handler.
Workaround for that is to use low level function for checking whether
STOPPED event arrived.

The workaround should be removed when `nrfx_pwm_stopped_check()`
will contain needed functionality.

Signed-off-by: Adam Wojasinski <adam.wojasinski@nordicsemi.no>
2023-05-18 12:01:30 +02:00
Savent Gate
e2c39313ac drivers: pwm: pwm_stm32: Add 6-PWM support
User can use 6-PWM motor driver in dts like this below:
```dts
pwms =
 // ch1,ch2,ch3,ch1n,ch2n,ch3n
 <&pwm 1 PWM_USEC(50) PWM_POLARITY_NORMAL>, // ch1
 <&pwm 2 PWM_USEC(50) PWM_POLARITY_NORMAL>, // ch2
 <&pwm 3 PWM_USEC(50) PWM_POLARITY_NORMAL>, // ch3
 <&pwm 1 PWM_USEC(50) (PWM_POLARITY_NORMAL|STM32_PWM_COMPLEMENTARY)>,
 <&pwm 2 PWM_USEC(50) (PWM_POLARITY_NORMAL|STM32_PWM_COMPLEMENTARY)>,
 <&pwm 3 PWM_USEC(50) (PWM_POLARITY_NORMAL|STM32_PWM_COMPLEMENTARY)>;
```

Signed-off-by: Savent Gate <savent_gate@outlook.com>
2023-05-15 09:15:01 +00:00
Pieter De Gendt
bab23bbe6c drivers: pwm: pwm_mcux: Round up PWM frequency to prevent overflow
The HAL function PWM_SetupPwm does the inverse division to get the
number of pulses from the frequency.
In the case of a prescaler of 1 and a period of UINT16_MAX cycles
this would result in an uint16_t overflow.

Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
2023-05-09 16:23:35 +09:00
Adam Wojasinski
bb0284cdb5 drivers: pwm: Align SHIM to renamed fields in driver instance struct
New nrfx release aligns PWM fields in driver instance structure
to common nrfx naming convention.

Signed-off-by: Adam Wojasinski <adam.wojasinski@nordicsemi.no>
2023-05-05 11:47:53 +02:00
Marek Metelski
d55b0a410d drivers: pwm: stm32: Connect IRQ for input capture by 'cc' name
Some STM32 timers have more than one interrupt available.
When such timer is used it's likely that the first found interrupt
will not be the proper, 'cc' interrupt for input capture.

Existing implementation always connected the first irq, which worked
for timers with single, 'global' interrupt but broke input capture
for advanced timers with more interrupts.

Improve the IRQ connection logic by connecting the 'cc' interrupt
if it exists. Only if not found use the fallback mechanism of taking the
first index

Signed-off-by: Marek Metelski <marek@metelski.dev>
2023-04-28 20:38:02 +02:00
Gerard Marull-Paretas
c66f594c41 drivers: all: rv32m1: remove conditional support for pinctrl
The rvm32m1 platform always uses pinctrl, there's no need to keep
extra macrology around pinctrl. Also updated driver's Kconfig to `select
PINCTRL`.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2023-04-24 13:34:22 +02:00
Gerard Marull-Paretas
b2d9212ea0 drivers: all: mchp_xec: remove conditional support for pinctrl
The Microchip XEC platform always uses pinctrl, there's no need to keep
extra macrology around pinctrl. Also updated driver's Kconfig options to
`select PINCTRL`.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2023-04-24 13:34:22 +02:00
Gerard Marull-Paretas
989d103d53 drivers: all: mcux: remove conditional support for pinctrl
The MCUX platform always uses pinctrl, there's no need to keep extra
macrology around pinctrl. Also updated driver's Kconfig options to
`select PINCTRL` (note that some already did).

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2023-04-24 13:34:22 +02:00
Yves Vandervennet
788ba12137 nxp: hal: code update to reflect changes in SDK 2.13
HAL API changes in ethernet and pwm
SoC RT595 power management code change
west.yml update

Signed-off-by: Yves Vandervennet <yves.vandervennet@nxp.com>
2023-04-20 08:11:19 -05:00
Gerard Marull-Paretas
1eb683a514 device: remove redundant init functions
Remove all init functions that do nothing, and provide a `NULL` to
*DEVICE*DEFINE* macros.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2023-04-19 10:00:25 +02:00
Gerard Marull-Paretas
667eeb11fb shell: fix MISRA 5.7 violations on struct shell
MISRA Rule 5.7 requires uniqueness of tag identifiers. Shell is
frequently problematic because many code uses `const struct shell
*shell`. This causes CI noise every time one of these shell files is
edited, so let's update all of them with `const struct shell *sh`
instead.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2023-04-14 12:21:08 +02:00
Gerard Marull-Paretas
0ebe14beb4 sys: util: migrate all files to DIV_ROUND_UP
ceiling_fraction is deprecated, use DIV_ROUND_UP.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2023-04-11 12:00:37 +02:00
Pieter De Gendt
6b532ff43e treewide: Update clock control API usage
Replace all (clock_control_subsys_t *) casts with (clock_control_subsys_t)

Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
2023-04-05 10:55:46 +02:00
Lucas Tamborrino
ed0d242bb7 dts: esp32s3: add LEDC device
Add LEDC device for esp32s3
Update PWM LED binding
Remove invalid comment from driver source file

Signed-off-by: Lucas Tamborrino <lucas.tamborrino@espressif.com>
2023-03-31 09:19:56 +02:00
Henrik Brix Andersen
c41dd36de2 drivers: kconfig: unify menuconfig title strings
Unify the drivers/*/Kconfig menuconfig title strings to the format
"<class> [(acronym)] [bus] drivers".

Including both the full name of the driver class and an acronym makes
menuconfig more user friendly as some of the acronyms are less well-known
than others. It also improves Kconfig search, both via menuconfig and via
the generated Kconfig documentation.

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2023-03-28 15:06:06 +02:00
Gerson Fernando Budke
d2e9b4682c drivers: pwm: sam: Update to use clock control
This update Atmel SAM pwm driver to use clock control driver.

Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2023-03-21 14:12:25 -07:00
Benjamin Björnsson
a52bd0d2e9 drivers: pwm: pwm_stm32: Add PWM support on STM32C0-seris
Add support for PWM on the STM32C0-series.

Signed-off-by: Benjamin Björnsson <benjamin.bjornsson@gmail.com>
2023-03-21 09:38:25 +01:00
Emilio Benavente
5081f6aa28 drivers: pwm: pwm_mcux_sctimer: duty cycle fix
This is a fix for a driver bug that assumes a
user will want a new pwm channel for a new
pwm signal if they decide to change the
period length of the pwm. In some cases,
this creates a noticable change of
duty cycle accuracy.

Signed-off-by: Emilio Benavente <emilio.benavente@nxp.com>
2023-03-11 19:44:27 +01:00
Jeff Daly
3acdc971fb drivers: pwm: mchp_xec: fix PWM control register updates
The pwm_mchp_xec driver doesn't clear the divisor or clock select fields
of the config register value before writing it back.  If the register
was previously written, the new values were being logically OR'd with
the prior values.

Signed-off-by: Jeff Daly <jeffd@silicom-usa.com>
2023-03-02 10:55:33 +01:00
Jeff Daly
bd1a8141e5 drivers: pwms: pwm_xec: add polarity support to XEC PWM driver.
Polarity support added to XEC PWM driver.  This allows (for example) PWM
controlled LEDs that are active low to actually be turned off when set
to off.

Signed-off-by: Jeff Daly <jeffd@silicom-usa.com>
2023-03-01 08:55:49 +01:00
Gerard Marull-Paretas
27b73a116f soc: arm: nordic_nrf: replace NRF_DT_CHECK_PIN_ASSIGNMENTS
Since PINCTRL and pinctrl-0 is now required, there's no point in doing
extra validation at driver level. Modify the macro to just check that
sleep state is present when needed, since it was the only remaining
assertion that was not covered. Renamed the macro to make it more clear
what it does: NRF_DT_CHECK_NODE_HAS_PINCTRL_SLEEP

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2023-02-28 08:42:05 -08:00