1.Declare the member type to match the kscan_it8xxx2_regs, so
we needn't to transform the local structure in the function.
2.Stop using DRV_CONFIG, DRV_DATA, DRV_REG macros.
3.Delete unused register defines.
Signed-off-by: Ruibin Chang <Ruibin.Chang@ite.com.tw>
Change CheckPatch() compliance test to call checkpatch.pl directly
rather than through git diff. This has the advantage of including the
commit message in what is being checked, which is useful to catch stuff
like spurious Gerrit commit ids.
The --mailback does not seem to work correctly in this mode, but since
the output is filtered by checking the command exit code anyway, that
option is redundant, so drop that as well.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
With GCC 11 now supporting low overhead branching in ARMv8.1, ASM "LE"
(loop-end) instructions would trigger an INVSTATE hard-fault after
FPSCR was set to 0. This was due to the FPSCR getting a new field in
ARMv8.1. LTPSIZE is now set to it's reset value of Tail predication not
applied.
Signed-off-by: Ryan McClelland <ryanmcclelland@fb.com>
This adds initial support for presets that includes API functions
to register/unregister presets and Read Preset Request control point
handler.
Signed-off-by: Mariusz Skamra <mariusz.skamra@codecoup.pl>
The Cache is an optional configuration of both the ARM Cortex-M7 and
Cortex-M55. Previously, it was just checking that it was just an M7
rather than knowing that the CPU actually was built with the cache.
Signed-off-by: Ryan McClelland <ryanmcclelland@fb.com>
This PR enables the Ansynchronous UART API for using the MCUX drivers.
It is tested on the RT1062EVKB.
Signed-off-by: Nickolas Lapp <nickolaslapp@gmail.com>
This PR fixes up the Scatter-Gather EDMA mode for the MCUX EDMA Driver,
as well as enabling the dma reload feature for the same EDMA Driver.
Signed-off-by: Nickolas Lapp <nickolaslapp@gmail.com>
Since the i2c header file is included directly by application code,
an application developer including this file and only applying
-Wextra to the application source files will see this warning.
Signed-off-by: Pete Dietl <petedietl@gmail.com>
Multiple instances of the device would have inadvertently shared the
LLI pool potentially causing nasty bugs.
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
Zephyr kernel will always execute WFI in k_cpu_idle(), so access to TCM
will be gated. Keep the AHB clock enabled in sleep unless CONFIG_PM is
selected, to avoid this error.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Add tests for Intel dai ssp driver. These tests configure
the ssp driver and transfer data over loopback with dma.
Signed-off-by: Jaska Uimonen <jaska.uimonen@linux.intel.com>
The DAI (digital audio interface) API is a high level audio driver
abstraction. It provides support for the standard I2S (SSP), DMIC, HDA
and SDW backends. The API has a config function with bespoke data
argument for device/vendor specific config. There are also optional
timestamping functions to get device specific audio clock time.
Signed-off-by: Jaska Uimonen <jaska.uimonen@linux.intel.com>
Platform specific functions necessary to enable this feature were
implemented (z_xtensa_ptr_executable() and
z_xtensa_stack_ptr_is_sane() for Intel ADSP platforms.
Current implementation just ensures stack pointer and program counter
are within relevant areas defined in the linker scripts, without going
too fine grained.
Also, `.iram1` section, used by the backtrace code, also added to
Intel ADSP linker script.
Finally, update west manifest to use up-to-date SOF, which contains a
patch to fix build issues related to the linker changes.
Signed-off-by: Ederson de Souza <ederson.desouza@intel.com>
Only initialize the FlexCAN IP core once since initialzing it has the
side effect of resetting the IP core and thus clearing previous settings
such as RX filters.
Fixes: #44680
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Adds a lock around the output to prevent corruption, and sets the buffer
size of the output to size of the output buffer. This fixes the
corrupted log output as process() may be called from multiple contexts
from different CPUs. A background log processing thread may race against
the panic ISR log context also calling process() on an SMP system.
Additionally sets the buffer size to 80 such that the cavs trace_out.c
functionality and lock are useful for more than one character at a time
greatly reducing the chances of garbled output in a printk and log race
but does not entirely prevent it. CONFIG_LOG_PRINTK=y should be used
to avoid all races.
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
Adds details about the os reset request hook that applications can use
to allow or decline the request or tidy up.
Signed-off-by: Jamie McCrae <jamie.mccrae@lairdconnect.com>
This allows an application to inspect a mcumgr os reset command and
either allow it or deny it with a result code.
Signed-off-by: Jamie McCrae <jamie.mccrae@lairdconnect.com>
Allow shield to be used with any board that has an
arduino nano connector.
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@huawei.com>
This maps the Arduino Rev3 header's pins expected by the shield overlay
to the real Arduino Nano header pins of the Arduino Nano 33 BLE board and
aliases the I2C and SPI interfaces accordingly.
Fixes: #43927
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@huawei.com>
This extends the DTS for Arduino Nano 33 BLE with the nexus node for
pin mapping according to the binding for arduino-nano-header-r3.
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@huawei.com>
Update client tx timestamp right after message is added to list
of outgoing messages. Delay between when message is generated and
sent is negligible. This will prevents bugs that appear when using
queue mode, where internal engine logic depends on timestamp being
updated when message is generated.
Signed-off-by: Marin Jurjević <marin.jurjevic@hotmail.com>
Enables the flash controller node for the stm32u585 disco kit
with an arbitrary definition of the board partitions
to fill the 1MB bank1 of the flash memory,
for the secure and non-secure targets.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
This commit adds a flash_controller node for the stm32u5 soc family
blocks of 8K and erase time given by the Datasheet (with margin).
Signed-off-by: Francois Ramu <francois.ramu@st.com>
redefine all the stm32 flash register bit Name from
FLASH_NSCR_xxx to FLASH_STM32_FLASH_NSCR_xxx
in all the zephyr drivers.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
