Added support for fxos8700 sensor over SPI bus on
RDDRONE board and proper selection through dts.
Tested with fxos8700 sensor on RDDRONE.
Signed-off-by: Benjamin Perseghetti <bperseghetti@rudislabs.com>
Co-authored-by: Sumit Batra <sumit.batra@nxp.com>
Adds I2C sensors for BMM150 and BME280.
Tested with BME280 and BMM150 sensors on RDDRONE.
Signed-off-by: Benjamin Perseghetti <bperseghetti@rudislabs.com>
Co-authored-by: Landon Haugh <landon.haugh1@gmail.com>
Co-authored-by: Sumit Batra <sumit.batra@nxp.com>
Ensures I2C data line is open drain.
Tested on RDDRONE.
Signed-off-by: Benjamin Perseghetti <bperseghetti@rudislabs.com>
Co-authored-by: Landon Haugh <landon.haugh1@gmail.com>
Co-authored-by: Sumit Batra <sumit.batra@nxp.com>
Fixes the channel 2 PWM pinmux adds servos and PWM LEDs.
Required to operate servo motors and status lighting.
Tested on RDDRONE board.
Signed-off-by: Benjamin Perseghetti <bperseghetti@rudislabs.com>
Co-authored-by: Sumit Batra <sumit.batra@nxp.com>
Co-authored-by: Landon Haugh <landon.haugh1@gmail.com>
Add XIP support with MWDT toolchain. To have it proper tested
add separate nsim platforms for XIP (flash + sram) and
non-XIP (sram) memory organization in addition to existing
nsim_hs platfor with CCMs (ICCM + DCCM) memory organization.
This PR also enables MPU for all nsim hs3x based platforms
(like we previously enabled it for qemu_arc_hs) to have proper
memory regions permissions.
Signed-off-by: Nikolay Agishev <agishev@synopsys.com>
Use the new PCIe core infrastructure for looking up the BDF at runtime
based on the VID/DID values.
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
Use the new PCIe core infrastructure for looking up the BDF at runtime
based on the VID/DID values.
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
Add a driver for the Arm Ethos-U NPU, including a Devicetree entry for
the mps3_an547 platform.
Signed-off-by: Kristofer Jonsson <kristofer.jonsson@arm.com>
Signed-off-by: Fredrik Knutsson <fredrik.knutsson@arm.com>
Update lpc54114 support to use LMA address offset instead of linking
secondary core image into primary core memory. This will allow support
with sysbuild to be enabled. Additionally, use partitions to select where
the secondary core image will be located in flash
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Add remote Zephyr directory for openamp sample, so that the sample
will correctly set emulator flags when compiled with sysbuild
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Use LMA adjustment building dual core image with LPC55s69. The load
address adjustment allows the second core image to be flashed onto the chip
by the debugger, into the secure region of the LPC flash.
Additionally, remove the build dependency that was enforced by the SOC.
This requirement to build the secondary core image first can be enforced
by the project itself, instead of the core.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
By default the port 3333 is assigned for the debug of the
Cortex-A CPUx. the port 3334 is assigned for the Cortex-M debug.
This configuration does not allow to debug the Cortex-M.
More than that the stm32mp157 Cortex-A is not supported in zephyr.
This patch introduces openocd configuration, which
allow to use the Zephyr openocd for the Cortex-M.
The configuration consists in disabling the stm32mp15x.cpu<X> port
to set the stm32mp15x.cm4 port to 3333.
Signed-off-by: Arnaud Pouliquen <arnaud.pouliquen@foss.st.com>
Update the Debugging chapter. The stm32mp157 Cortex-M4 is acting as
a coprocessor and should not run in a standalone mode.
Indeed, the firmware has to be loaded and started by the main processor.
This is mandatory for the inter-processor communication.
For this reason user should use "west attach" instead of "west debug".
Signed-off-by: Arnaud Pouliquen <arnaud.pouliquen@foss.st.com>
Specify the units of the current LSB in microamperes, so that we can
measure low maximum currents. Right now it was specified in
milliamperes, but ignored and always hardcoded to 1mA in the driver.
This makes the driver pretty much useless when the maximum current to be
measured is in a range of e.g. 20-50mA.
This patch also removes some unnecessary ifdeffery: since we write the
calibration register, we can always provice measurements with the right
units. It is also wrong to provide sensor readings that do not match
with the units specified by the channel. After this change voltage is
always reported in V, current in A and power in W.
Note that power measurement had the current LSB hardcoded in the
calculation (assuming 1mA/LSB), this has been fixed as well.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Following dtschema practices, add phyisical units to the shunt resistor
value: milliohms.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The "pmic" driver was in reality a driver for NXP PCA9420 PMIC. There's
no "universal PMIC". While the driver may work for other NXP PMICs, it
is clearly not generic for other vendors PMIC.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Attempts to clarify the memory map on the MPS2 AN521, showing how
the 4MB code region and 4MB SRAM region are partitioned across the
various board targets.
Signed-off-by: Kevin Townsend <kevin.townsend@linaro.org>
The board already provides a pinctrl setup for UART1, the documentation
assumes it does not. This patch updates the documentation to explain how
to apply an overlay so that UART1 is routed to another set of pins.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
RT1060 board with hyperflash configuration was missing the appropriate
flash configuration block required by the bootloader. Since this board
uses the same flash chip as the RT1050, the flash configuration block for
that board can be reused.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Update NXP boards that use flashless SOCs to include flash data
configuration blocks, as well as device configuration blocks where
required. These configuration blocks are used by the bootloader.
Although the files themselves are stored in NXP's HAL, CMake directives
are used to include them directly, and notify the user of their
existence when a new board is created, to aid in the bringup process.
This commit updates the revision of the NXP HAL to one that does not
include flash data configuration blocks, to prevent linker errors.
Note that due to merge order in the NXP HAL, the updated SHA will also
include NXP's S32 System Timer Module drivers.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
This enables usb and usb_device tag for tests. It explicitly disable
samples/subsys/usb/dfu for non-secure version of this board due to
building errors, which can be explored in future.
Signed-off-by: Gerson Fernando Budke <gerson.budke@ossystems.com.br>
Adds a note on how to disable TrustZone on the board, to be able to
reflash non TrustZone samples. Without this step, flashing will fail
for non TF-M or TrustZone sample applications.
Signed-off-by: Kevin Townsend <kevin.townsend@linaro.org>
The `mps2_an521_remote` and `mps2_an521_ns` targets have the same
memory layout for code and ram, meaning that you can't use TF-M
(`mps2_an521_ns`) and the second core (`mps2_an521_remote`) at the
same time.
This commit updates the memory map of the `_ns` build targets as
follows:
- Reduces the code memory region from 1 MB to 512 KB, maintaining the
existing base memory address of `0x0010 0000`
- Maintains the existing 512 KB ram memory at `0x2810 0000`
It updates the `_remote` target as follows:
- Reserves 468 KB code memory at address `0x0038 B000`
- Reserves 512 KB ram memory at address `0x2818 0000`
This ensures that the code region for the `_remote` target doesn't
overlap with the code region used by the single flash image layout
defined upstream in TF-M, which the `_ns` target is based upon.
Signed-off-by: Kevin Townsend <kevin.townsend@linaro.org>
Add STM32 Nucleo-144 board board with STM32L4A6ZG MCU
This board has one of the highest memory densities
(1 MB flash, 320 KB SRAM) of the available Nucleo L4
boards, so it will probably be used frequently for prototyping
Signed-off-by: Tomislav Milkovic <tomislav.milkovic95@gmail.com>
Adds the needed overlays and board dtsi modifications to run the
spi loopback test on the sam e70 xplained, tdk robokit1, and sam v71 xult.
Tests both DMA and non-DMA configurations.
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
SPI0 is connected to the TDK 42688-p sensor which produces data
at a very fast rate. Enable using DMA with this SPI bus
by default for this board.
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
Currently, the nrf-802154-spinel IPC service requires that the IPC
service node has a specific name (ipc0). This makes it impossible to
overwrite the IPC service node to be used by the Spinel serialization
without completely redefining the ipc0 node. Create a `chosen` property
called nordic,802154-spinel-ipc that can be reassigned with any IPC
service node.
Signed-off-by: Rafał Kuźnia <rafal.kuznia@nordicsemi.no>
In the note about the relationship between the POSIX arch
and the POSIX OS abstraction, add a link.
Signed-off-by: Elvar Tresnak <Elvar.Tresnak@gmail.com>
Add initial support for the NXP S32Z27 SIUL2 External
Interrupt Controller. Each SIUL2 node has a child node
will act as an interrupt-controller that processes external
interrupt signals.
This driver is required to manage GPIO interrupts.
Signed-off-by: Dat Nguyen Duy <dat.nguyenduy@nxp.com>
Add ADC driver sample overlays + update features in doc + metadata for TI
CC13x2/CC26x2 based boards (cc1352r_sensortag, cc1352r1_launchxl,
cc26x2r1_launchxl).
Signed-off-by: Stancu Florin <niflostancu@gmail.com>
Enables logging testing for qemu_xtensa along with the fixes needed to
correctly run the tests.
Several tests in log_api rely on being able to calculate the size of
the message in the mpsc_pbuf to know when an overflow occurs. The
size being calculated assumed a ROUND_UP size alignment to sizeof(long
long). On xtensa this is actually 16 bytes as defined by
CBPRINTF_PACKAGE_ALIGNMENT.
Changes the size calculation for SIMPLE_MSG_LEN to account for this.
The second issue was a misaligned package that would cause reading
from the incorrect memory when going to format the package with cbpprintf.
Fixes the padding used to align the package in cbprintf.h and adds a build
assert ensuring correct alignment when building against xtensa in both
cbprintf.h and log_msg.h.
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
This commit adds an optional property to the nRF21540 Front-End Module
devicetree description that specifies supply voltage in mV. This
property can be used by the nRF21540 driver to compensate the value of
achieved gain for different supply voltage.
Signed-off-by: Artur Hadasz <artur.hadasz@nordicsemi.no>
Signed-off-by: Jędrzej Ciupis <jedrzej.ciupis@nordicsemi.no>
On the x86 QEMU boards the EEPROM emulator uses the simulated flash as
backend.
Change the default initialization priority for the EEPROM drivers to ensure
the flash simulator is ready before initializing the EEPROM emulator.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Add support for the Feather M0 LoRa board, including support of its
Semtech Lora radio. Tested the radio using a pair of boards.
Signed-off-by: Miguel Dardenne <miguel.dardenne@gmail.com>
The #49984 accidentally removed zephyr,flash node. Without that, board
not boot NS image. Add missing node to fix the issue.
Signed-off-by: Gerson Fernando Budke <gerson.budke@ossystems.com.br>
Add to the feature table for LPC55S36 board to indicate
that the CSS can be used for entropy generation
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
Available flash to the test system is limited by the code partition
defined in the device tree file.
Signed-off-by: Miguel Dardenne <miguel.dardenne@gmail.com>
