Commit graph

115105 commits

Author SHA1 Message Date
Jamie McCrae
ebfc7db380 west.yml: MCUboot synchronization from upstream
Update Zephyr fork of MCUboot to revision:
  990b1fcb367e27056b282f183e819964fdbfe907

  - f76fba70 boot: bootutil: swap_scratch: Fix issue with bricking
    device
  - 7253f01c boot: bootutil: Refactor erase functionality to fix
    watchdog feeding
  - a98bff9f boot: zephyr: kconfig: Fix issues and re-order
  - 1b2d261d boot: zephyr: flash_map: Fix unused argument
  - 413eb384 boot: zephyr: flash_map: Fix missing include
  - 15b36f91 boot: zephyr: kconfig: enable dependencies of Mbed TLS
    Kconfig option
  - f6e8e88a boot: bootutil: Move erase function location
  - 5ef87c79 boot: zephyr: kconfig: Fix BOOT_SWAP_USING_MOVE
    description
  - bc18d7da boot: boot_serial: Fix issue with CBOR and setting
    image state

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2025-05-13 22:22:43 -04:00
Tomi Fontanilles
35f7eda545 modules: mbedtls: make key exchange Kconfigs depend on, not select
Turn the MBEDTLS_RSA_FULL selects into depends on.
This is how the other MBEDTLS_KEY_EXCHANGE_* Kconfig options are defined.

This is done to avoid circular dependencies.

At the same time update uses of the affected MBEDTLS_KEY_EXCHANGE_*
Kconfig options to enable/disable the dependencies which used to be
automatically handled.

Signed-off-by: Tomi Fontanilles <tomi.fontanilles@nordicsemi.no>
2025-05-13 22:22:43 -04:00
Bansidhar Mangalwedhekar
bf2efc762f nrf7002ek: dts: Add pull down to SPI MISO GPIO pin
Add a pull down to SPI MISO GPIO pin on nRF5340DK to ensure the i/o pin
on the nrf7002 device is not floating when SPI is inactive.

Signed-off-by: Bansidhar Mangalwedhekar <bansidhar.mangalwedhekar@nordicsemi.no>
2025-05-13 22:22:23 -04:00
Bansidhar Mangalwedhekar
6416646674 nrf7002dk: dts: Add pull up/down to QSPI GPIO pins
Add appropriate pull up/down to QSPI GPIO pins to ensure no qspi i/o pins
on the nrf7002 DK are floating when QSPI is not in use.

Signed-off-by: Bansidhar Mangalwedhekar <bansidhar.mangalwedhekar@nordicsemi.no>
2025-05-13 22:22:23 -04:00
Alain Volmat
34622c05ab doc: releases: add note regarding dcmi binding update
Add note regarding the move of the video/dcmi driver
to the usage of endpoint based video-interfaces
bindings.

Signed-off-by: Alain Volmat <alain.volmat@foss.st.com>
2025-05-13 22:22:09 -04:00
Alain Volmat
12b8fb21cd tests: drivers: build_all: video: add testcase of stm32 dcmi
Add a testcase for building the stm32 dcmi driver on all
currently supported platforms / shields.

Signed-off-by: Alain Volmat <alain.volmat@foss.st.com>
2025-05-13 22:22:09 -04:00
Alain Volmat
c1e7bdaa75 video: stm32-dcmi: implement frame interval handling
Implement the video API frame interval handling in order
to control the framerate of capture.

This allow to remove the capture-rate DT property as well.

Signed-off-by: Alain Volmat <alain.volmat@foss.st.com>
2025-05-13 22:22:09 -04:00
Alain Volmat
df93e20414 video: stm32-dcmi: correct get/set fmt handling
This commit mainly correct the get/set format handling and how
DCMI format is stored within the driver.  struct video_format
within the data structure is used to store the format.
Reworked way to handle get format to avoid calling the sensor
set_fmt whenever performing the get_fmt.
Slightly adjusted code to as much as possible reuse return
values provided by functions.

Signed-off-by: Alain Volmat <alain.volmat@foss.st.com>
2025-05-13 22:22:09 -04:00
Alain Volmat
a72cfba503 dts: bindings: video: dcmi: remove the dma in board dts example
With the addition of the dma property within the soc dtsi, it is
no more necessary to add it within the board dts.

Signed-off-by: Alain Volmat <alain.volmat@foss.st.com>
2025-05-13 22:22:09 -04:00
Alain Volmat
99e12cbf4a dts: st: h7: move dma property of dcmi in stm32h7.dtsi
Usage of dma is mandatory for the dcmi and this property is
tightly coupled with the soc itself since the configuration of
the dma depends on the source/destination, and the request line
is also fixed for an ip.
Instead of having to always have the dma property part of the
board or shield dts/overlay, add the dma property into the
dcmi node of the stm32h7.dtsi.

Signed-off-by: Alain Volmat <alain.volmat@foss.st.com>
2025-05-13 22:22:09 -04:00
Alain Volmat
0c18dc3154 boards: arduino_nicla_vision: use endpoint based properties
Update overlay following usage of video-interfaces based
endpoint properties by the dcmi driver.

Signed-off-by: Alain Volmat <alain.volmat@foss.st.com>
2025-05-13 22:22:09 -04:00
Alain Volmat
bee30203a4 shields: st_b_cams_omv_mb1683: use endpoint based properties
Update overlay following usage of video-interfaces based
endpoint properties by the dcmi driver.

Signed-off-by: Alain Volmat <alain.volmat@foss.st.com>
2025-05-13 22:22:09 -04:00
Alain Volmat
49aa55eda0 shields: weact_ov2640_cam_module: use endpoint based properties
Update overlay following usage of video-interfaces based
endpoint properties by the dcmi driver.

Signed-off-by: Alain Volmat <alain.volmat@foss.st.com>
2025-05-13 22:22:09 -04:00
Alain Volmat
c0dae0c9ac video: stm32: dcmi: perform config based on endpoint properties
Perform sensor interface properties parsing based on values
retrieved via the endpoint rather than the root of the node.
Use DT_PROP_OR to ensure proper configuration of optional
settings.

Signed-off-by: Alain Volmat <alain.volmat@foss.st.com>
2025-05-13 22:22:09 -04:00
Alain Volmat
d11bb65b14 dts: bindings: stm32-dcmi: use endpoint based properties
Update the bindings of the stm32-dcmi driver rely on
properties described within the endpoints and already
detailed within the video-interfaces.yaml.

With that, several properties located at the node root
are now moved into the port / endpoint:

  sensor -> endpoint: remote-endpoint-label
  vsync-active -> endpoint: vsync-active
  hsync-active -> endpoint: hsync-active
  pixelclk-active -> endpoint: pclk-sample
  bus-width -> endpoint: bus-width

Signed-off-by: Alain Volmat <alain.volmat@foss.st.com>
2025-05-13 22:22:09 -04:00
Abderrahmane JARMOUNI
abdb1ef3bc modules: lvgl: input: fix indev binding to display
When no 'display' property is present in LVGL input dev node in DT,
we should default to LVGL Default Display to preserve the old behavior
and not break LV Input on setups with only one display.

Signed-off-by: Abderrahmane JARMOUNI <git@jarmouni.me>
2025-05-13 22:21:50 -04:00
Sai Santhosh Malae
5572e49bc9 drivers: dma: siwx91x: DMA reload bug fix
Current DMA driver reload function only works for 8-bit
data. This is due to incorrect interpretation of size
argument. Added changes to support other xfer sizes.

Signed-off-by: Sai Santhosh Malae <Santhosh.Malae@silabs.com>
2025-05-13 22:21:30 -04:00
Alex Hogen
eee464dae7 boards: efm32gg_sltb009a: uart: Fix USART0 loc 1
Silabs Thunderboard EFM32GG12 (OPN: SLTB009A) connects USART0
location 1 to the VCOM pins of the on-board debugger.

US0_TX loc 1 is pin PE7
US0_RX loc 1 is pin PE6

Signed-off-by: Alex Hogen <alex@edt.com>
2025-05-13 22:21:08 -04:00
Alexandre Bailon
db496c7a76 drivers: ieee802154: cc13xx_cc26xx: Don't filter beacon for OpenThread
OpenThread network discovery was not working.
The radio driver is filtering the beacon packets whereas
this is required for OpenThread.
Allow receiving beacon packets.

Signed-off-by: Alexandre Bailon <abailon@baylibre.com>
2025-05-13 22:20:55 -04:00
Yau-ming Leung
b8f94cade5 drivers: icm42688: move misleading debug message
When SENSOR_TRIG_FIFO_WATERMARK or SENSOR_TRIG_FIFO_FULL is not configured,
an unsupported trigger debug message will be printed. Moved such that
a no trigger configured debug message will be printed only if both triggers
are not configured.

Signed-off-by: Yau-ming Leung <ymleung314@gmail.com>
2025-05-13 22:20:42 -04:00
Gregor Copoix
3da78086ae driver: wifi: esp32: fix send data for AP_STA mode
Fixes the check for connected interface if CONFIG_ESP32_WIFI_AP_STA_MODE=y
(different data objects for STA (esp32_data) and AP (esp32_ap_sta_data)).
As the correct data object is linked to device object, we can check for
ESP32_STA_CONNECTED or ESP32_AP_CONNECTED in dev->data.
This fixes AP mode in samples/net/wifi/apsta_mode if STA WIFI_SSID/WIFI_PSK
are invalid and no STA connection can be established before
(samples/net/wifi/apsta_mode/src/main.c#L28-L29) for all ESP32 derivates.

Fixes false check from 183b74c558

Signed-off-by: Gregor Copoix <gregor.copoix@ithinx.io>
2025-05-13 22:20:29 -04:00
Chris Friedt
8409e425b3 drivers: gpio: pca series: dereference pointer in assignment
Properly dereference the value pointer in assignment.

```
In function 'gpio_pca_series_port_read_standard':
warning: assignment to 'gpio_port_value_t *' {aka 'unsigned int *'} \
  from 'uint32_t' {aka 'unsigned int'} makes pointer from integer   \
  without a cast [-Wint-conversion]
 1071 |                 value = sys_le32_to_cpu(input_data);
      |                       ^
```

Signed-off-by: Chris Friedt <cfriedt@tenstorrent.com>
2025-05-13 22:20:10 -04:00
Ayush Singh
3124c7ad24 drivers: gpio: davinci: Fix for RAM MMIO
Move the direction reset to config init function. This ensures that regs
is read after the DEVICE_MMIO_NAMED_MAP is called, which is where the
init for RAM MMIO takes place

Tested on PocketBeagle 2 A53s.

Signed-off-by: Ayush Singh <ayush@beagleboard.org>
2025-05-13 22:19:51 -04:00
David van Rijn
b1b586cac6 net: fix constness in http_request
Since we are taking a double pointer to an array owned by the user, we
should also make all but the top-level of indirection const, since we
are not planning on modifying it.

Signed-off-by: David van Rijn <david@refractor.dev>
2025-05-13 22:19:28 -04:00
Martin Hoff
a05506a256 soc: silabs: add missing kconfig resource for siwx91x
Fixes the missing Kconfig resource for the siwx91x SoC. This ensures
that soc_early_init_hook function is correctly called for the siwg917
SoC during initialization.

Signed-off-by: Martin Hoff <martin.hoff@silabs.com>
2025-05-13 22:19:16 -04:00
Duy Nguyen
e45fb09499 MAINTAINERS: Add maintainer information for RX arch
Add Duy Nguyen (duynguyenxa) as maintainer for RX architecture

Signed-off-by: Duy Nguyen <duy.nguyen.xa@renesas.com>
2025-05-13 22:18:54 -04:00
Robin Kastberg
fbdf4b9c64 MAINTAINERS: Add collaborators to IAR toolchain area
Add @bjorniuppsala and @LoveKarlsson as collaborators for the
IAR toolchain area.

Signed-off-by: Robin Kastberg <robin.kastberg@iar.com>
2025-05-13 18:38:28 +01:00
Guennadi Liakhovetski
0a919055e6 xtensa: gdbstub: fix stack calculation
Fix a logic error when calculating stack frame sizes.

Signed-off-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
2025-05-13 18:38:12 +01:00
Guennadi Liakhovetski
5769c4d565 xtensa: gdbstub: fix compilation
Building gdbstub for xtensa is failing currently with multiple
failures like

arch/xtensa/core/gdbstub.c:432:24: error: invalid operands to \
binary - (have 'int *' and 'const struct arch_esf *')
  432 |         if ((int *)bsa - stack > 4) {

Fix them by using appropriate pointer types.

Signed-off-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
2025-05-13 18:38:12 +01:00
Titouan Christophe
92a32a903d boards: st: stm32h7s78_dk: add support for on-board XSPI PSRAM
Configure pinctrl for the xspi1 bus, and add definition for the PSRAM chip
on the board.

Signed-off-by: Titouan Christophe <titouan.christophe@mind.be>
2025-05-13 18:38:05 +01:00
Titouan Christophe
8ed65114f2 dts: arm: st: h7rs: add xspi controllers
Add devicetree nodes for the two xspi controllers on the stm32h7rs series

Signed-off-by: Titouan Christophe <titouan.christophe@mind.be>
2025-05-13 18:38:05 +01:00
Titouan Christophe
d23b1bd4e0 memc: stm32_xspi_psram: allow usage on controllers without prefetch options
On some STM32 lines, like the h7rs, there aren't XSPI prefetch options.
To support them in the PSRAM driver, conditionally exclude them from
compilation when the options are not available

Signed-off-by: Titouan Christophe <titouan.christophe@mind.be>
2025-05-13 18:38:05 +01:00
Fabio Baltieri
bd3aff20eb drivers: dp: add STM32 support
Add support for direct control of STM32 gpios to the DP driver.

Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
2025-05-13 18:37:55 +01:00
Fabio Baltieri
25bd4abfc4 drivers: dp: move the nrf code to its own file
Move the nrf specific functions to a separate file so that every soc has
a dedicated header.

Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
2025-05-13 18:37:55 +01:00
Sai Santhosh Malae
0bce31b99a drivers: counter: siwx91x: gecko-stimer description
Add detailed description for silabs,gecko-stimer.yaml
binding.

Signed-off-by: Sai Santhosh Malae <Santhosh.Malae@silabs.com>
2025-05-13 17:46:46 +02:00
Sai Santhosh Malae
a1913f9d9f drivers: counter: siwx91x: Enable siwx91x Counter driver
Enable sleeptimer counter driver for siwx91x device

Signed-off-by: Sai Santhosh Malae <Santhosh.Malae@silabs.com>
2025-05-13 17:46:46 +02:00
Mathieu Choplain
77378a8c75 arch: arm: pm_s2ram: fix compatibility with ARMv6-M again
The original 'arch_pm_s2ram_resume' implementation saved lr on the stack
using 'push {lr}' and restored it using 'pop {lr}'. However, the Thumb-1
'pop' does not support lr as a target register, so this code would not
compile for ARMv6-M or ARMv8-M Baseline. r0 was added to these push/pop
later in 2590c48d40.

In 474d4c3249, arch_pm_s2ram* functions were
modified to no longer use the stack, which incidentally "fixed" this issue.
b4fb5d38eb reverted this commit and brought
back 'pop {r0, lr}' as-is, without taking compatibility into account.

Modify the sequence to use "pop {r0, pc}" which is supported on all
ARM M-profile implementations (v6/v7/v8 Baseline/v8 Mainline), and
add comments to (hopefully) prevent this issue from re-appearing.

Signed-off-by: Mathieu Choplain <mathieu.choplain@st.com>
2025-05-13 17:46:40 +02:00
Robert Hancock
0e248419b7 arch: arm: cortex_a_r: Fix memory corruption when disabling dcache
On the Xilinx MPSoC (Cortex-R5) platform, erratic operation was often
seen when an operation which disabled the dcache, such as sys_reboot,
was performed. Usually this manifested as an undefined instruction trap
due to the CPU jumping to an invalid memory address.

It appears the problem was due to dirty cache lines being present at the
time the cache is disabled. Once the cache is disabled, the CPU will
ignore the cache contents and read the possibly out-of-date data in main
memory. Likewise, since the cache was being cleaned after it was already
disabled, if the CPU had already written through changes to some memory
locations, cleaning the cache at that point would potentially overwrite
those changes with older data.

The fact that the arch_dcache_flush_and_invd_all function was being
called to do the cleaning and invalidation also contributed to this
problem, because it is a non-inline function which means the compiler
will generate memory writes to the stack when the function is called and
returns. Corruption of the stack can result in the CPU ending up jumping
to garbage addresses when trying to return from functions.

To avoid this problem, the cache is now cleaned and invalidated prior to
the dcache being disabled. This is done by directly calling the
L1C_CleanInvalidateDCacheAll function, which, as it is declared as force
inline, should help ensure there are no memory accesses, which would
populate new cache lines, between the cache cleaning and disabling the
cache.

Ideally, for maximum safety, the cache cleaning and cache disabling
should be done in assembler code, to guarantee that there are no memory
accesses generated by the compiler during these operations. However, the
present change does appear to solve this issue.

Signed-off-by: Robert Hancock <robert.hancock@calian.com>
2025-05-13 17:46:28 +02:00
Samuel Quiniou
d0aa263c1d boards: stm32h573i_dk: add display support
Add display support for the st7789v LCD controller.
Automatically enable the LCD backlight at boot
to use the display sample as is,
because the LCD backlight is normally off.

Signed-off-by: Samuel Quiniou <samuel.quiniou@rtone.fr>
2025-05-13 17:46:11 +02:00
Mirai SHINJO
e4650bc349 scripts: ci: check_compliance: fix identity check for multiple DCOs
The current implementation of the identity check fails if multiple DCO
signoff lines are present and the first instance of the signoff line
does not belong to the author of the commit. This patch proposes a solution
that allows patches with multiple DCO signoff lines to pass the identity
check, regardless of the order of the signoff lines.

Signed-off-by: Mirai SHINJO <oss@mshinjo.com>
2025-05-13 17:46:01 +02:00
Sreeram Tatapudi
f61efef6b0 drivers: bluetooth: Add BLE low power mode for cyw920829m2evk_02
Add BLE low power mode for cyw920829m2evk_02

Signed-off-by: Sreeram Tatapudi <sreeram.praveen@infineon.com>
2025-05-13 17:45:47 +02:00
Sreeram Tatapudi
2ef8ff4e04 drivers: clock_control: infineon_cat1: Support for LF clocks
Add support to configure LF clocks: clk_pilo, clk_wco, clk_ilo, clk_lf

Signed-off-by: Sreeram Tatapudi <sreeram.praveen@infineon.com>
2025-05-13 17:45:47 +02:00
Michał Stasiak
a397a7e939 tests: boards: nrf: comp: Move AIN index to Kconfig
Moved index of analog input used in test from source
code to Kconfig option to simplify adding new targets.

Signed-off-by: Michał Stasiak <michal.stasiak@nordicsemi.no>
2025-05-13 17:45:18 +02:00
Michał Stasiak
03a9df38e9 drivers: comparator: comparator_nrf: Add analog pins for nRF54L20
Added set of analog pins for nRF54L20 COMP and LPCOMP.
Moved the array of analong pins for both comparator
variants to avoid code duplication.

Signed-off-by: Michał Stasiak <michal.stasiak@nordicsemi.no>
2025-05-13 17:45:18 +02:00
Michał Stasiak
8b998060f2 drivers: adc: adc_nrf_saadc: Add analog pins for nRF54L20
Added set of analog pins for nRF54L20 SAADC.

Signed-off-by: Michał Stasiak <michal.stasiak@nordicsemi.no>
2025-05-13 17:45:18 +02:00
Carles Cufi
6659d2d711 scripts: runners: nrfutil: Check return code after Popen
The code invoking nrfutil was not checking the return code of the
subprocess, which meant that if the underlying tool was exiting with a
failure error code it remained undetected.

Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
2025-05-13 17:45:09 +02:00
Arkadiusz Balys
bfc5094dcd openthread: Fix kconfigs according to the Kconfig Style Guidelines
Removed redundant new lines, and added new lines if needed.

Signed-off-by: Arkadiusz Balys <arkadiusz.balys@nordicsemi.no>
2025-05-13 17:44:59 +02:00
Robert Hancock
54eeb7bee8 arch: arm: arm_mpu_v7m: Fix unsupported Cortex-R access permission mode
This file previously defined an MPU access permission mode of 0x7 which
corresponded to privileged read-only, unprivileged read-only, similar to
mode 0x6. However, it appears that at least Cortex-R5 does not support
this mode, defining 0x7 as UNP (Unpredictable) or a value which should
not be used.

This value was in turn referenced by the REGION_FLASH_ATTR macro, which
caused the offending value to be used when a memory region was declared
as DT_MEM_ARM(ATTR_MPU_FLASH) in the device tree, causing such regions
to not work properly on Cortex-R5.

Since 0x6 is supported by both Cortex-M and Cortex-R and does the same
thing, there is no reason to use 0x7. Remove the RO_Msk definition which
referenced it, and change REGION_FLASH_ATTR to use P_RO_U_RO_Msk instead.

Signed-off-by: Robert Hancock <robert.hancock@calian.com>
2025-05-13 17:44:40 +02:00
David Schneider
d85ed3212c cmake: fix syscall dependencies
Replace _parse_syscalls_target_ custom target with explicit
dependency management for syscall depending file generation.

Signed-off-by: David Schneider <schneidav81@gmail.com>
2025-05-13 16:23:54 +02:00
Robert Lubos
be46c94e3e net: l2: openthread: Fix error logs on adding already present address
Error checking of otIp6AddUnicastAddress() and
otIp6SubscribeMulticastAddress() was added recently, however it wasn't
taken into account that those APIs return an error on attempt to
register an IPv6 address that is already present on the OT interface.
Therefore, add more specific error checks, to return silently in case
address was already present.

As those two APIs are not very consistent, and otIp6AddUnicastAddress()
returns OT_ERROR_INVALID_ARGS in such cases, add an extra check if the
address is already present before attempting to register the address.

Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
2025-05-13 16:23:37 +02:00