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arch: arm: pm_s2ram: fix compatibility with ARMv6-M again

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The original 'arch_pm_s2ram_resume' implementation saved lr on the stack
using 'push {lr}' and restored it using 'pop {lr}'. However, the Thumb-1
'pop' does not support lr as a target register, so this code would not
compile for ARMv6-M or ARMv8-M Baseline. r0 was added to these push/pop
later in 2590c48d40.

In 474d4c3249, arch_pm_s2ram* functions were
modified to no longer use the stack, which incidentally "fixed" this issue.
b4fb5d38eb reverted this commit and brought
back 'pop {r0, lr}' as-is, without taking compatibility into account.

Modify the sequence to use "pop {r0, pc}" which is supported on all
ARM M-profile implementations (v6/v7/v8 Baseline/v8 Mainline), and
add comments to (hopefully) prevent this issue from re-appearing.

Signed-off-by: Mathieu Choplain <mathieu.choplain@st.com>
This commit is contained in:
Mathieu Choplain 2025-04-07 17:06:40 +02:00 • committed by Benjamin Cabé
commit 77378a8c75
1 changed files with 7 additions and 3 deletions
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10
arch/arm/core/cortex_m/pm_s2ram.S
View file

@ -219,13 +219,17 @@ SECTION_FUNC(TEXT, arch_pm_s2ram_resume)
push {r0, lr}
bl pm_s2ram_mark_check_and_clear
cmp r0, #0x1
pop {r0, lr}
beq .L_resume
bx lr
pop {r0, pc}
.L_resume:
/*
* Restore the CPU context
* Switch to the stack used to execute "arch_pm_s2ram_suspend"
* and restore CPU context backed up by that function, then
* return to the call site of "arch_pm_s2ram_suspend".
*
* Note: the "push {r0, lr}" performed earlier doesn't
* need to be balanced out since we are switching stacks.
*/
ldr r0, =_cpu_context