arch: arm: pm_s2ram: fix compatibility with ARMv6-M again
The original 'arch_pm_s2ram_resume' implementation saved lr on the stack using 'push {lr}' and restored it using 'pop {lr}'. However, the Thumb-1 'pop' does not support lr as a target register, so this code would not compile for ARMv6-M or ARMv8-M Baseline. r0 was added to these push/pop later in2590c48d40
. In474d4c3249
, arch_pm_s2ram* functions were modified to no longer use the stack, which incidentally "fixed" this issue.b4fb5d38eb
reverted this commit and brought back 'pop {r0, lr}' as-is, without taking compatibility into account. Modify the sequence to use "pop {r0, pc}" which is supported on all ARM M-profile implementations (v6/v7/v8 Baseline/v8 Mainline), and add comments to (hopefully) prevent this issue from re-appearing. Signed-off-by: Mathieu Choplain <mathieu.choplain@st.com>
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1 changed files with 7 additions and 3 deletions
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@ -219,13 +219,17 @@ SECTION_FUNC(TEXT, arch_pm_s2ram_resume)
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push {r0, lr}
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bl pm_s2ram_mark_check_and_clear
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cmp r0, #0x1
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pop {r0, lr}
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beq .L_resume
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bx lr
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pop {r0, pc}
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.L_resume:
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/*
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* Restore the CPU context
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* Switch to the stack used to execute "arch_pm_s2ram_suspend"
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* and restore CPU context backed up by that function, then
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* return to the call site of "arch_pm_s2ram_suspend".
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*
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* Note: the "push {r0, lr}" performed earlier doesn't
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* need to be balanced out since we are switching stacks.
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*/
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ldr r0, =_cpu_context
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