The async_user_callback could be triggered from
both the DMA transfer complete interrupt and
a k_work queue timeout. Since the timeout runs
outside of an ISR context, it could be interrupted
by the DMA ISR. This might leads to a race condition
where both paths access and modify shared
DMA buffer state (offset and length) simultaneously,
causing data corruption or out-of-sequence processing.
Introduces proper synchronization to prevent concurrent
access to shared DMA buffer variables,
ensuring consistent and reliable data handling.
Signed-off-by: Fabrice DJIATSA <fabrice.djiatsa-ext@st.com>
Several drivers checked for the presense and availability of data cache
through Kconfig symbol. This is supported according to the current
documentation, but the symbol DCACHE masks two types of cache devices: arch
and external caches. The latter is present on some Cortex-M33 chips, like
the STM32U5xx. The external dcache is bypassed when accessing internal
SRAM and only used for external memories.
In commit a2dd232410 ("drivers: adc: stm32: dma support") the rationale
for gating dcache for adc_stm32 behind STM32H7X is only hinted at, but
reason seems to be that it was the only SOC the change was tested on. The
SOC configures DCACHE=y so it is most likely safe to swap the SOC gate for
DCACHE.
The DCACHE ifdefs are now hidden inside the shared stm32_buf_in_nocache()
implementation.
Signed-off-by: Henrik Lindblom <henrik.lindblom@vaisala.com>
Simplify the logic for the `uart_stm32_cfg2ll_databits` function
regarding `LL_USART_DATAWIDTH_9B` being defined or not.
Signed-off-by: Yishai Jaffe <yishai1999@gmail.com>
This change adds additional workaround for following errata:
"USART does not generate DMA requests after setting/clearing DMAT bit"
Instead of keepint DMAT bit set, it sends first byte by polling
in firmware. This prevents additional power consumption in STOP mode,
caused by keeping DMAT bit set.
Signed-off-by: Adam Berlinger <adam.berlinger@st.com>
The buffer_length != 0 is used to check if there is transfer ongoing
inside the uart_stm32_async_tx function. uart_stm32_dma_tx_cb clears
it to 0 when TX DMA is finished, but before the USART send all
the data from shift register.
buffer_length is also cleared in callback async_evt_tx_done,
which is called when USART finished sending all the bytes.
If the uart_stm32_async_tx would be called after
uart_stm32_async_tx, but before async_evt_tx_done there
could be race condition on buffer_length.
Signed-off-by: Adam BERLINGER <adam.berlinger@st.com>
Allow STM32 UART driver to operate with DMA support even when
CONFIG_MEM_ATTR is disabled which happen when CONFIG_ARM_MPU is
intentionally disabled despite the CPU supports MPU.
By the way, remove some #ifdef directive on header files inclusion
that add noise in the header file inclusion section without any
benefit.
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
When using the asynchronous TX API, skip the `data->pm_policy_state_on`
checks for PM policy updates. This fixes two issues:
* State conflicts with the `poll_out` implementation when both APIs are
used on the same port, resulting in the SoC sleeping while
transmissions are running.
* Scheduling a TX from the `TX_DONE` callback resulting in the PM
policy not being applied, resulting in TX errors.
Every call to `uart_tx` should have a corresponding `TX_DONE` event
generated, which makes the raw (reference counted) calls to
`pm_policy_state_lock_put/get` the correct API to use here.
Signed-off-by: Jordan Yates <jordan@embeint.com>
Block the SoC from re-entering sleep modes while the RX line is active,
if the RX activity previously woke the device from the sleep states.
This stops the device from continuously transitioning between the two
modes and improves responsiveness.
Signed-off-by: Jordan Yates <jordan@embeint.com>
Fix dropped `UART_TX_DONE` events when poll out and async APIs are used
on the same port. Clearing `tx_poll_stream_on` is required to prevent
`uart_stm32_isr` from prematurely clearing the TC status bit.
Signed-off-by: Jordan Yates <jordan@embeint.com>
Defined default values for baudrate, parity, stop bits, and data bits.
This removes complexity and obfuscation from the code.
Signed-off-by: Yishai Jaffe <yishai1999@gmail.com>
the following implementations are added:
- set cyclic variable to handle circular/normal mode :
enable dest/source_reload_en variable to set CIRC bit to 1 for RX or TX.
- DMA_STATUS_COMPLETE(0), DMA_STATUS_BLOCK(1) macros to handle half
and full irq
- add ASYNC_UART_STATUS_TIMEOUT(3) macro to work with default mode
- add status input in uart_stm32_dma_rx_flush function to handle
async events depending on the mode we are in.
Signed-off-by: Fabrice DJIATSA <fabrice.djiatsa-ext@st.com>
co-authored-by: Cyril Fougeray <cyril.fougeray@worldcoin.org>
Passing data by value is more efficient in this context. As such,
revise `poll_out_fn` and `uart_stm32_poll_out_visitor` to accept
the `out` argument by value instead of by address.
Signed-off-by: Pisit Sawangvonganan <pisit@ndrsolution.com>
The EXTI driver API defined in exti_stm32.h is reserved for exclusive usage
by the STM32 GPIO driver, which doesn't use this macro. Since there is no
usecase for it anyways, it can be removed for future-proofing.
The STM32 UART driver is an unintended user of this definition, however.
Replace it with a private #define which is more appropriate anyways.
Signed-off-by: Mathieu Choplain <mathieu.choplain@st.com>
Remove address-of operator ('&') when assigning `init_fn`
function pointer in `DEVICE_DT_INST_DEFINE` macro.
This change aims to maintain consistency among the drivers in
`drivers/serial`, ensuring that all function pointer assignments
follow the same pattern.
Signed-off-by: Pisit Sawangvonganan <pisit@ndrsolution.com>
Updated function parameters from `const struct uart_stm32_config *config`
to `USART_TypeDef *usart`. This change reduces the level of pointer
indirection, which minimizes repeated dereferencing and helps reduce
the overall code size.
Signed-off-by: Pisit Sawangvonganan <pisit@ndrsolution.com>
This change reduces the level of pointer indirection, which minimizes
repeated dereferencing and helps reduce the overall code size.
Signed-off-by: Pisit Sawangvonganan <pisit@ndrsolution.com>
Adapt the driver to verify if DMA buffers are located in noncacheable
memory when DCache is activated, in order to avoid cache coherency issues.
This is required until manual cache coherency management is implemented.
Signed-off-by: Abderrahmane Jarmouni <abderrahmane.jarmouni-ext@st.com>
uart_stm32_async_rx_buf_rsp() does not return the necessary errors when
rx_next_buffer is already set & when async uart rx is disabled.
This patch was submitted by @mkaranki
Signed-off-by: Abderrahmane Jarmouni <abderrahmane.jarmouni-ext@st.com>
Systematically enable the UART clock again when exiting a low power mode
before reading the UART register.
Even though the previous code worked on STM32WBA, for most series, it is
necessary to enable the clock to access the registers, otherwise they read
as 0.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
It might happens that DT(_INST)_PROP_OR is used with boolean properties.
For instance:
.single_wire = DT_INST_PROP_OR(index, single_wire, false), \
.tx_rx_swap = DT_INST_PROP_OR(index, tx_rx_swap, false), \
This is not required as boolean properties are generated with false
value when not present, so the _OR macro extension is superflous
and the above code can be replaced by:
.single_wire = DT_INST_PROP(index, single_wire), \
.tx_rx_swap = DT_INST_PROP(index, tx_rx_swap), \
Signed-off-by: Roman Studenikin <srv@meta.com>
When resuming from low power mode, if UART is disabled, this means that
we come from a mode that reset the registers, so we redo a full init of
the driver.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
Employ a code spell checking tool to scan and correct spelling errors
in all files within the drivers/serial directory.
Signed-off-by: Pisit Sawangvonganan <pisit@ndrsolution.com>
In a previous change, STM32U5 GPDMA specific behavior was set into a
specific configuration applying only to few devices impacted by a specific
silicon erratum.
As part of this change, dma suspension before dma stop was set to apply
to the specific erratum workaround.
It appears, this was wrong and dma suspension before dma stop should
be done on all devices compatible with stm32u5 dma. This fix re-instantiate
the correct behavior.
Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
Wakeup-source configuration is about configuring registers.
It belongs to uart_stm32_registers_configure().
Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
The Transfer Complete flag (TC) is used to check if a transfer is
complete. This mechanism is used before suspending the UART module to
make sure that all data are sent before the suspend procedure.
The UART ISR clears this flag after completion of a async transfer which
causes a hang during UART device suspend setup.
There is just no need to clear this flag in ISR, it is cleared every
time we start a new async transfer.
Signed-off-by: Dawid Niedzwiecki <dawidn@google.com>
On some devices such as STM32U5, there is no UART WKUP dedicated registers
as the hardware block has an integrated autonomous wakeup capability.
Hence it's capable to wake up the device from stop modes (down to Stop 1).
This behavior relies on RCC UESM bit which is enabled by default at reset
and not modified today in drivers.
Since driver will not compile otherwise, remain in this simple
configuration. This might be changed later on, if a need is seen to disable
UESM bit.
Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
Workaround for DMAT errata was applied on all SoCs declaring STM32U5
DMA compatible.
This errata has been fixed in later SoCs revisions and should not be
applied anymore as this can cause compatibility issues with power mgmt
(can not enter STOP1 in some cases).
Declare a specific Kconfig symbol to restrict the workaround only to the
set of SoCs impacted by the issue and requiring workaround.
Note that I preferred using Kconfig over device tree since it doesn't feel
right to declare a compatible on a silicon bug base.
Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
Serial wakeup feature was only working whe DBG in Stop mode setting
was enabled.
Add required changes to make it functional also when this configuration
isn't set.
Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
When enabling async RX the first time after boot, there is an
additional byte received with the first RX_DATA_RDY event,
which seems to be caused by the RX data not being flushed before
enabling the UART RX DMA.
Adding a request to flush the RX data register before enabling
the RX DMA, solves the issue.
Signed-off-by: Bjarki Arge Andreasen <bjarki@arge-andreasen.me>
When LPUART1 is not defined, the driver did not compile even if
any other LPUART was defined. This patch fixes that.
Signed-off-by: Nando Galliard <nando.galliard@protonmail.com>
This reverts commit 1c2d326579.
which was limited to CONFIG_UART_ASYNC_API=y case and causing regression
otherwise.
Fixes#63885
Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
Since #53979, runtime PM can be applied on serial device used by console.
While it should be transparent on serial driver side as the application
(console in this case) is driving the PM runtime requests, on STM32
it requires some modification on serial driver as UART interrupts are
generated to handle internal power management house cleaning.
When these interrupts are generated, PM runtime should also be driven
to ensure clock availability when treating the uart ISR.
On STM32, some additional changes are required
Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
Replace incorrect and limited runtime parity/data bits conditional
configuration with build-time logic using BUILD_ASSERT. This allows for
more flexible UART configurations, while preventing invalid DTS
configurations at build-time.
Signed-off-by: Kenneth J. Miller <ken@miller.ec>
Move overlapping UART parameter configuration to new
uart_stm32_parameters_set function. This function is called by
uart_stm32_configure upon application/subsystem configuration, and
uart_stm32_registers_configure upon (re-)initialization of driver
instances.
Signed-off-by: Kenneth J. Miller <ken@miller.ec>
Move clock enable and register configuration to their own functions in
preparation for later uart_stm32_reinit function that will use these in
addition to uart_stm32_init.
Signed-off-by: Kenneth J. Miller <ken@miller.ec>
Add static uart_config struct to init macro with corresponding pointer
as uart_stm32_config struct member. This struct will store boot and
runtime UART configuration for reinitialization upon exiting low-power
modes, where register contents might be lost.
Remove hw_flow_control, parity, and baud_rate from uart_stm32_config and
uart_stm32_data structs, respectively, as the need for these is now
obviated by the presence of the uart_config struct, which contains
equivalent members.
Add default baudrate, parity, stop, and data bits constants, used to
initialize the uart_config struct, in case the corresponding UART DT
properties are not set.
Signed-off-by: Kenneth J. Miller <ken@miller.ec>
Move reset configuration from uart_stm32_data to
const uart_stm32_config struct, as this is set once at boot and isn't
modified during runtime.
Signed-off-by: Kenneth J. Miller <ken@miller.ec>
Move select include directives from source to header file, as these pull
data types required by the struct definitions contained within it.
This promotes a more modular file structure.
Signed-off-by: Kenneth J. Miller <ken@miller.ec>
Restructuring code for poll_in/poll_out/fifo_fill/fifo_read because for
wide data support, all code is identical except the calls to
LL_USART_{ReceiveData8/TransmitData8}.
This allows both implementations, 8 and 9 bit data-width to call a
visitor function, passing the either the 8 bit or 9 bit data-width
function pointer.
Signed-off-by: Jeroen van Dooren <jeroen.van.dooren@nobleo.nl>
Preventing code duplication of macros checking for HW support on
stop bits and data-bits during runtime configuration.
Validated runtime configuration on an STM32H743.
Signed-off-by: Jeroen van Dooren <jeroen.van.dooren@nobleo.nl>
Both the IRQ API and Asynchronous API support callback.
However, since they are both interrupt driven, having
callbacks on both API would interfere with each other
in almost all cases. So this adds a kconfig to signal
that the callbacks should be exclusive to each other.
In other words, if one is set, the other should not
be active. Drivers implementing both APIs have been
updated to remove the callbacks from the other API.
Though, this still leaves the option to disable
the kconfig and allows both APIs to have callbacks
if one desires.
Fixes#48606
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
The stm32 UART can output a "driver enable" signal on the RTS pin that
allows controlling e.g. external RS-485 drivers.
This can already be configured through the devicetree using the `de-*`
properties, but not through uart_configure(). This commit enables the use
of .flow_ctrl=UART_CFG_FLOW_CTRL_RS485.
This is supported on all devices other than l1, f1, f2, and f4 as found by
this search:
$ grep -rLw USART_CR3_DEM ../modules/hal/stm32/stm32cube/*/soc/*.h |\
grep -vE 'system_|partition_|stm32[^0-9]+[0-9]?xx\.h' |\
cut -d/ -f6 |\
sort -u
Signed-off-by: Armin Brauns <armin.brauns@embedded-solutions.at>
Change the assertion when evaluating the baudrate to trig if
result is greater or equal to 16.
This will also match the comment : checking BRR.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
