apollo3 driver added PM to UART for only apollo3
but defined PM function for both causing an error
in twister
Signed-off-by: Richard Wheatley <richard.wheatley@ambiq.com>
Add power management support for Apollo3/Apollo3P UART, and
automatically enables device runtime power management
Signed-off-by: Zhengwei Wang <zwang@ambiq.com>
Apollo3 SoCs have different UART register design compared with
that of Apollo4 SoCs, we need to change the offset and mask for
the power status check
Signed-off-by: Hao Luo <hluo@ambiq.com>
Introduce the `COMPAT_SPECIFIC_...` macros to determine the function name
from the compatible name.
These macros allow the isolation of device-dependent code in a generic way.
For example, if the compatible name is `ambiq,uart`,
The `COMPAT_SPECIFIC_DEFINE` macro is replaced by `AMBIQ_UART_DEFINE`.
Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
Ambiq UART requires specific busy wait during initialization for
propagating powering control registers, original k_busy_wait()
used here generated a dead loop because k_busy_wait() relays on
timer, who's driver is initialized after UART(UART init in
PRE_KERNEL_1, timer init in PRE_KERNEL_2), replace k_busy_wait()
with checking power status register is more suitable here.
Signed-off-by: Bryan Zhu <bzhu@ambiq.com>
UART controller present in Ambiq SoCs is mostly compatible with PL011, but
requires some quirks that are implemented in this commit:
- the peripheral needs to be powered on first, via the PWRCTRL core,
- peripheral clock needs to be enabled and configured via the CLKEN/CLKSEL.
registers.
The quirks mechanism was inspired by support for STM32F4 SoC in the
usb_dc_dw driver (fce0b85eca).
Co-authored-by: Mateusz Sierszulski <msierszulski@antmicro.com>
Signed-off-by: Maciej Sobkowski <msobkowski@antmicro.com>
Signed-off-by: Mateusz Sierszulski <msierszulski@antmicro.com>
