Do not have priority per IP, use one config instead.
Change-Id: Ieb2923d4749a294e2a1c677d47d56a14cee3f36d
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
With most boards there's no simple way to get access to the HCI
traffic. Simultaneously these boards only have one external UART for
the console. This patch introduces a protocol which combines both
normal logs and HCI logs over a single binary protocol sent over the
console UART.
The protocol is modeled based on the btsnoop/monitor protocols used by
BlueZ, and the first tool that's able to decode this is btmon from
BlueZ ("btmon --tty <tty>").
For platforms with two or more external UARTs it is still possible to
use CONFIG_UART_CONSOLE as long as the UART devices used are
different, however on platforms with a single external UART
UART_CONSOLE should be disabled if BLUETOOTH_DEBUG_MONITOR is enabled
(in this case printk/printf get encoded to the monitor protocol).
Origin: Original
Change-Id: I9d3997c7a06fe48e7decb212b2ac9bd8b8f9b74c
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
This UART config is needed to handle properly btp tester serial data
flow.
Change-Id: Id013a232e105247414d44148f5ccfe708b19c4a8
Signed-off-by: Grzegorz Kolodziejczyk <grzegorz.kolodziejczyk@tieto.com>
Change NBLE_UART_ON_DEV_NAME to BLUETOOTH_UART_ON_DEV_NAME for H:4
Change-Id: I4391b32c75c738478c964d4c79f6eb80d737b043
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Enable Power Management handling also for quark_se_devboard with
nimble HCI stack.
Change-Id: I6e5bb85c4f2370f52904be9dff14ce8e7fb1eb44
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Enable Power Management and enable logic for quark_se_devboard,
without the patch BLE Radio module might be enabled with JTAG tools
or right after boot.
Note that some boards do not have the GPIO pins connected to BLE
module but this should be still OK wrt to board functionality.
Change-Id: I9019e406afa36fe2dea52c07075c947e8c50a961
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Add configuration for OLIMEXINO_STM32 board.
By default, the UART console is forwarded to USART1 available on
UEXT connector. All GPIO ports available on the connecot headers
are enabled.
Change-Id: I60b3ff20ea60b5294a3a6c31f4dba0802794f9d8
Origin: Based on nucleo_f103rb board
Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
Add Kinetis SoC family and rename fsl_frdm_k64f to mk64f12.
This will allow adding new SoCs of the same family and the reuse of code
among SoCs of the family and series.
Change-Id: Iea1a663aef7ce0487f147bdd36f668bebe80deb5
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Use SOC_SERIES_* for naming SoCs with similar features and architectures
with the goal of code reuse. The Series in the config variable should avoid
name collisions and clearly denote the relationships within an SoC family.
Change-Id: I7a98542f96b5d5dc3acc23782c4d45f98cceb599
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Use CONFIG_SOC_FAMILY for the top level SoC family. A family
will have different SoCs or different SoC series with multiple
SoCs.
Adding the Family string to the config variable to avoid confusion
between actual SoCs and families and to prevent name collisions.
Change-Id: Ic99a2c1df7850dee3a45641027af82464dd6fadb
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Some controllers will emit an initial "NOP" Command Complete event
during initialization and expect the host to only send commands once
this event has been received. This patch adds a new Kconfig option to
be used in the case of such controllers and defaults this to true on
Arduino 101 with the H:4 driver where this behavior is currently
observed.
Change-Id: I440f14a7c07ac27545febf9f85ebcc343e2a4558
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
Currently, the /CS pin is deasserted by _spi_config_cs() and
the pinmux driver sets it as an input afterwards. Later, setting
the /CS pin to an output via pinmux_dev asserts it.
Setting the SPI port 1 pins in the pinmux driver saves a few lines
of code. Moving the SPI init after pinmux init keeps the /CS pin as
configured by the SPI driver.
Change-Id: I4c587ba0a6983cd89dfb5ecedb2914335e86313b
Signed-off-by: Vlad Lungu <vlad.lungu@windriver.com>
GPIO is not needed for quark_se_devboard for now when dealing with
NBLE.
Change-Id: I0dedf2bee0af153e1d6e224d90f4662f5601b2b7
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
GPIO would be selected by BLUETOOTH_NRF51_PM
Change-Id: I5d920723a46c1455d34c90c9dc43b21b91569ce1
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Currently there's no support for the H:5 driver on Arduino 101, so the
defaults set in defconfig should only be limited to the H:4 UART
driver.
Change-Id: I805d81c33701d179ffe26f4aed3fe2fb70d60d7b
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
If an external PCIe card inserted into Galileo board, the
devices I/O addresses may differ from the preconfigured ones.
For this reason PCI enumeration needs to be enabled.
Change-Id: I54b5ef9149f9eda0a390909a433b0e13a3dd7ecd
Signed-off-by: Dmitriy Korovkin <dmitriy.korovkin@windriver.com>
When choosing Bluetooth UART driver on arduino_101 select also
BLUETOOTH_NRF51_PM which enables the Nordic chip.
Change-Id: I22dcb60a676bb0e4cdfe995590803dbfbf87f23a
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
To avoid explicitly having to state this in every application's config
file simply set the defaults to the sanest values.
Change-Id: I2c2bbd2424a12ec9a36bbd6d0c9cd9a1d259e5e5
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
This is a complete new cc2520 driver for zephyr. Intention is to fit
better within Zephyr device driver model.
- It's (almost*) ready to be instanciated as many times as necessary
- It's fully interrupt based on SFD and FIFOP (no pin polling)
- It's nicer to other sub-systems (it sleeps, no busy-wait loop)
- It still loosely complies to old legacy radio device driver model
*: GPIO API needs to be fixed in order to accept multiple callbacks, as
well as enabling callbacks to retrieve private data.
Notes:
- Hardware filtering does not work yet as the net stack, above, needs to
provide the relevant information for it (src/dst ieee802154 extended
addresses, short addresses...)
- A embryo of generic functions (txpower, channel, addresses...)
have been implemented but don't belong yet to any radio device driver
model. Such new driver model will come afterwards (soon?)
- SPI API would need to be improved to avoid as much as possible memcpy
as well as spi_slave_select() call.
Change-Id: I1fd6dfff28fba3984f6006d394ea12f1e763ac18
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
UART0 is connected to Nordic BLE chip, copy the configuration from
arduino_101 where there is the same chip.
Change-Id: Ic9fe30f4562d261920c0cfd359ea34be4e7e2476
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Enable GPIO and select UART0 for Nordic BLE chip.
Change-Id: Ic1bf82a8b97fcc231eb857ee0bd05381a24a2d25
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Set the target to ARC to speed up flashing. the difference:
before
downloaded 27320 bytes in 50.685825s (0.526 KiB/s)
after
downloaded 27320 bytes in 3.396626s (7.855 KiB/s)
Change-Id: I53ca26f97eefd40e869662b137f5a659082aa478
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
SPI flash depends on SPI. Enable the SPI flash driver only when
SPI is enabled.
Change-Id: I902588b806a4a5773fddb58a7567a8e0d4ba9fe0
Signed-off-by: Baohong Liu <baohong.liu@intel.com>
Remove those kconfig options that are SoC specific, and
should not be configurable via kconfig.
Change-Id: Ib8158f00a6c6616360ddbcf63981f1a85911c1b9
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
On Galileo Gen2 board SPI uses GPIO pin for CS.
Thus spi_intel driver must be initialized after gpio_dw,
so it's init level must be more that gpio_dw's one.
Change-Id: If2e5fb1106afe01e5567cf3fe72063bdc94ad3d2
Signed-off-by: Dmitriy Korovkin <dmitriy.korovkin@windriver.com>
Remove those kconfig options that are SoC specific, and should not be
configurable via kconfig.
Change-Id: Ia62888838877da4627419bd36c261d5254761acd
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
These interrupt settings are SOC specific. So, move them to the
SOC level of Kconfig.
As IRQ priority is fixed in D2000, changed the value to 0 to
make it consistent with what other shim drivers are using.
Change-Id: Id20bed46c478a7555ae976e3a3063ba2cb099788
Signed-off-by: Baohong Liu <baohong.liu@intel.com>
This will improve the speed when flashing an image to the board:
before:
downloaded 4936 bytes in 7.982860s (0.604 KiB/s)
after:
downloaded 4936 bytes in 4.486743s (1.074 KiB/s)
Change-Id: I0209d53ba15dbf8e3f16e2d3675a35b58342776a
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
The IRQ triggering condition should be specified by SoC as it is
a decision for hardware design. This should not be configurable
in kconfig.
The default is to be triggered on rising edge, just as the same
old kconfig did.
Change-Id: If59d88a30711eb8e03d9cc4f409055cefe1995c5
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Moves those kconfig options which should be declared in
SoC or board header files instead. These are the one
that are tied to SoC or board and there is no need
for them to be configurable in kconfig.
Change-Id: I243d634f1a4a11dc8dc3530d95f93371015492b7
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This file was misplaced here. Atom board is now available only
for minnowboard.
Change-Id: If5a0d723600f957e2b024848b8cb8aac2e7a7ff9
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Most of the SoC and board Kconfig use the same values for
driver initialization priorities. So refactor them, and
discard duplicate ones.
The shared IRQ init priority was changed so that the kernel
default init and device init priorities can be standardized
across all SoC/boards. Same goes for DesignWare SPI driver.
This also changes the UART_CONSOLE_PRIORITY and
IPM_CONSOLE_PRIORITY to UART_CONSOLE_INIT_PRIORITY and
IPM_CONSOLE_INIT_PRIORITY, to standardize across all drivers.
Note that this does not take away the ability to override
those values. This just provides reasonable defaults such
that there is virtually no need to override.
Change-Id: Ibbd95d802c637df06f9a2fd48763ee1e6f4ff627
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
The pinmux base address and number of pins are now defined in SoC or board
header files instead of specifying them in kconfig. This is because
the pinmux ties directly to the SoC (or board expanders) so the base
address and number of pins do not need to be configurable in kconfig.
Change-Id: Ib6090d7d022b491f3fe8f522858281504c6302bb
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This adds conditions to the default values for device init priorities,
and make them follow the dependencies on the config options. This cleans
up the resulting .config a bit, making it easier to read.
Change-Id: Ib05806ac6108d465ffe245142ecca7a51be6df22
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
There are two major issues with the kconfig:
() Some of the config options have incorrect dependencies inside help
under menuconfig. For example, CONFIG_GPIO depends on BOARD_GALILEO.
() Since the SoC and board specific kconfig files are parsed first,
the help screen would say, for example, CONFIG_SPI is defined at
arch/arm/soc/fsl_frdm_k64f/Kconfig. This is incorrect because
the actual config is defined in drivers/spi/Kconfig.
These cause great confusion to users of menuconfig/xconfig.
To fix these, the SoC and board defaults are now to be parsed last.
Note that the position swapping of defaults in this patch is due to
the fact the the default parsed last will be used.
And, spi_test is broken due to the fact that it requires
CONFIG_SPI_INTEL_PORT_1, but never enables it anywhere. This is
bypassed for now.
Origin: refactored and edited from existing files
Change-Id: I2a4b1ae5be4d27e68c960aa47d91ef350f2d500f
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This moves the STM32 based boards (Nucleo F103RB and STM32 Mini A15) to
the "new" pinmux model.
Change-Id: I190df271a6b83fafeec0b281cd4ee7cf13d7e7db
Signed-off-by: Vinicius Costa Gomes <vinicius.gomes@intel.com>
This driver doesn't provide any API, it only initializes the pinmux
controller to appropriate values depending on the board.
The first board to use this new infrastructure is the Arduino 101 board,
because it is alphabetically the first.
To better organize code for the different SoCs and boards, a "family"
level is created in the 'drivers/pinmux' directory. The Arduino 101
board is part of the Quark MCU "family".
The PINMUX_DEV configuration (and functionality) is removed for now, it
will be added back when the pinmux_dev drivers are (re)introduced, with
clearer semantics.
Change-Id: Idf5cc3caf6be620aa50828ae8fdc535df6caf458
Signed-off-by: Vinicius Costa Gomes <vinicius.gomes@intel.com>
Enable 72MHz SYSCLK by default. The board does not have an on-board
quartz, however the STLink frontend produces a 8MHz clock signal that we
can use. Since the clock signal is not coming from an oscillator, HSE
bypass must be enabled. Make sure not to exceed 36MHz clock on APB1 bus.
Change-Id: I6b0b499a1cc4b0deccbfa374fc9ca3e3e8cc38c5
Signed-off-by: Maciej Borzecki <maciek.borzecki@gmail.com>
Enable 72MHz SYSCLK by default. We use the fact that there is an
on-board 8MHz quartz oscillator available as HSE clock signal. Make sure
not to exceed 36MHz clock limit on APB1.
Change-Id: I9ebc2144910253e68cd8a9b078884852f01c2cab
Signed-off-by: Maciej Borzecki <maciek.borzecki@gmail.com>
Before moving pinmux related code to 'drivers/pinmux' fix their return
codes to be consistent with the rest of the API.
Change-Id: Ie84f64e93745d44bef8b9d2119f6a05cdc8cb8c4
Signed-off-by: Vinicius Costa Gomes <vinicius.gomes@intel.com>
Add configuration for Nucleo-64 F103RB board. By default, the UART
console is forwarded to USART2, available on STLink V2-1 USB
connector. All GPIO ports available on the connecot headers are
enabled.
Change-Id: I266170d1288ef27f668410c5737c46cdf716e137
Origin: Original
Signed-off-by: Maciek Borzecki <maciek.borzecki@gmail.com>
