Minor rework to perform the PLLI2S VCO computations in floating point as
per the original seemingly intent.
Signed-off-by: Raul Pando <raul.pando@bytegrity.co.uk>
STMF412 and STM32F413 did not support CAN bus in Zephyr yet.
This adds the device tree entries to be able to use all 2, resp.
3 CAN controllers.
Signed-off-by: Tom Stirnkorb <tom@stirnkorb.me>
Remove the vref-mv = <3300>; property for all the ADC node of
the stm32 devices as it is set by default to 3300mV by the
dts/adc/st,stm32-adc.yaml
(Except for the stm32f303 vref is 3000mV)
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Update the unittests for feature exchange to use the new ZTEST API
Here we only update the feature exchange procedure. The remaining
unittests will be done in a next PR
Mocks, helper routines and the Unit Under Test are splitted out as
a library instead of adding them to the file list
Signed-off-by: Andries Kruithof <andries.kruithof@nordicsemi.no>
Point to the modified version of hal_stm32 which allow to use
ETH HAL V2 on stm32F7.
Update zephyr driver to allow it.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Align pins that are required to be shorted for this sample on
nRF52840 DK with those used in e.g. uart driver tests.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Improves the message for tests being excluded using the platform key,
describes the key already found and the platform being used to run the test
in its place.
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
Use the maximum data PDU size time reservation space
considering the Data length could be updated from default
27 bytes to maximum support size.
If maximum time reservation is disabled then time space
reservation corresponding to the default data length at the
time of the start/enable of Central role is used.
Note, currently this value is only used to space multiple central
connections and not for actual ticker time reservations.
Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
Fix connection parameter request procedure to be cacheable
if a remote control procedure is in progress.
Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
Fix legacy control procedure implementation to avoid
connection update procedure with reason instant passed
(0x28).
Connection Update Indication PDU is enqueued after data
enqueue to LLL context is paused and the enqueue resumes
when already enqueued data PDUs are all acknowledged.
Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
Adding configuration options to bring old behaviour where
UART shell have been available when overlay-bt.conf has been
used for building sample.
Signed-off-by: Dominik Ermel <dominik.ermel@nordicsemi.no>
Adds details for new logging added to MCUmgr and Kconfig options to
control the level of reporting.
Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
Remove the init command for teh CSIP Set Coordinator.
The main reason for this is that we want to ensure that we
register the conn callbacks early so that `conns` array is
properly filled.
The other callbacks registered in the init function
can easily be moved to where they are needed, and even
unregistered to avoid parsing more data than we need.
Signed-off-by: Emil Gydesen <emil.gydesen@nordicsemi.no>
When the toolchain has picolibc support, run
samples/subsys/cpp/cpp_synchronization and tests/subsys/cpp/libcxx tests
using it.
Signed-off-by: Keith Packard <keithp@keithp.com>
libstdc++ is supported with Picolibc only when the toolchain version of
Picolibc is use -- libstdc++ must be built using a specific Picolibc build
and libstdc++ is included with the toolchain.
Ideally, we'd allow the use of the Picolibc module whenever we weren't
using the GNU libstdc++, including when using the minimal libc++. However,
the obvious dependency settings create a loop:
config PICOLIBC
depends on PICOLIBC_SUPPORTED
config PICOLIBC_SUPPORTED
depends on !(GLIBCXX_LIBCPP && "$(ZEPHYR_TOOCHAIN_VARIANT" = "zephyr")
config GLIBCXX_LIBCPP
depends on NEWLIB_LIBC || PICOLIBC
To break this loop, we replace GLIBCXX_LIBCPP in the second block with
CPP:
config PICOLIBC_SUPPORTED
depends on !(CPP && "$(ZEPHYR_TOOCHAIN_VARIANT" = "zephyr")
This means that picolibc cannot be used with any C++ apps when using the
Zephyr SDK, even when not using the GNU libstdc++. However, Zephyr SDK 0.16
will come with an additional Kconfig file that includes:
config PICOLIBC_SUPPORTED
def_bool y
depends on "$(ZEPHYR_TOOLCHAIN_VARIANT)" = "zephyr"
This will override the Kconfig bits included in Zephyr and allow use of the
Picolibc module with C++ code, including using the minimal libc++ bits.
Signed-off-by: Keith Packard <keithp@keithp.com>
When using picolibc from the toolchain, we need to use the standard include
paths to make sure the library headers are found, especially for libstdc++.
Add toolchain picolibc to the list of cases for which this is the case.
Signed-off-by: Keith Packard <keithp@keithp.com>
Configure RNG domain clock and align it on USB (as this is the same clk).
This is not stricly required, as this configuration matches default
reset but its more consistent this way.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Similarly to what was done in USB or RNG drivers, configure 48MHz domain
clock using device tree.
By default a freq clock check is enabled.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Remove SDMMC from f410 soc variant since it's not actually available.
Do this in package variant as F410 is included by f412 who has a SDMMC.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Provide SDMMC domain clock, when required (because it is common)use
the same as the one selected by USB and RNG.
Otherwise, when available use HSI48, otherwise use the most handy (MSI,
sysclk ...).
PLLSAI is not used as not implemented for now.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
The RX overrun counter is incremented when the CAN controller receives a
CAN frame matching an installed filter but lacks the capacity to store it
(either due to an already full RX mailbox or a full RX FIFO).
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Fix handling of failed NXP FlexCAN RX mailbox reads. Instead of re-enabling
the RX MB in the ISR, we need to handle a failed RX MB read (e.g. due to a
busy MB bit).
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Add a polling sample for CPU temperature monitor.
This sample demonstrates how to data fetch and print to the console.
Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@fujitsu.com>
Add a locking semaphore so that multiple threads
doing transfers with the same i2c will not produce
unexpected results. The lock will ensure that only one
transfer will happen at a time and it must be completed
before another thread can request a new transfer.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
Program the right trim control register for mec150x.
This fixes uart debug console output issue.
Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
This change takes advantage of line information coming from new properties
to simplify exti_irq_table definition and isr routing related code.
All __stm32_exti_isr_x routing functions are removed and instead,
stm32_exti_isr is now taking a exti_range structure which provides,
for each irq, start line and range length.
This argument is provided by IRQ_CONNECT macro instead of previous
dev info (which is constant and doesn't need to be provided as argument).
line_range_x variables are generated at driver init thanks to a
mix of dt magic and runtime implementation:
DT_FOREACH_PROP_ELEM iterates over each irq line (counted as
interrupt-names property) call a macro which instantiates populated
line_range_x variables, and calls IRQ_CONNECT for each IRQ.
Additionally, at each iteration stm32_fill_irq_table() is called to
fill exti_irq_table.
Since not required anymore, Kconfig symbols EXTI_STM32_EXTIX_Y_IRQ_PRI
are removed. IRQ prio is now supposed to be configured in device tree.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Add 2 properties in STM32 external interrupt controller:
- num-lines
- line-ranges
Additionally, make interrupt-names a required property.
The properties will help to simplify exti init code in building the
exti_irq_table and simplify the isr related bits.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
sample.yaml was missing a tests section, making it unable to run with
twister. This patch adds the section.
While at that, fix an issue in the sample README.rst.
Fixes#53656.
Signed-off-by: Ederson de Souza <ederson.desouza@intel.com>
During the NVS initialization, if gc had to be done, the NVS cache
rebuild wasn't called.
Signed-off-by: Julien D'Ascenzio <julien.dascenzio@paratronic.fr>
It looks like versions >= 1.9.2 have disappeared from the Sourceforge
website. Since they use GH releases since 1.9.6, the version we use,
let's just update download URL.
Ref. https://github.com/doxygen/doxygen/issues/9801
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The hda driver uses -EPIPE to signal xrun, as proposed in the alsa lib
https://www.alsa-project.org/alsa-doc/alsa-lib/pcm.html. This commit
changes the xrun error code in dw dma driver from -ENODATA to -EPIPE to
make it consistent across drivers.
Signed-off-by: Adrian Warecki <adrian.warecki@intel.com>
The uart_mux_recv() documentation was wrong, the function parameters
were incorrectly documented.
Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
Given the Zephyr CPU number is no longer tied to the hartid, we must
consider the actual hartid when sending an IPI to a given CPU. Since
those hartids can be anything, let's just save them in the cpu structure
as each CPU is brought online.
While at it, throw in some `get_hart_msip()` cleanups.
Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
Currently it is assumed that Zephyr CPU numbers match their hartid
value one for one. This assumption was relied upon to efficiently
retrieve the current CPU's `struct _cpu` pointer.
People are starting to have systems with a mix of different usage for
each CPU and such assumption may no longer be true.
Let's completely decouple the hartid from the Zephyr CPU number by
stuffing each CPU's `struct _cpu` pointer in their respective scratch
register instead. `arch_curr_cpu()` becomes more efficient as well.
Since the scratch register was previously used to store userspace's
exception stack pointer, that is now moved into `struct _cpu_arch`
which implied minor user space entry code cleanup and rationalization.
Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
