1. Rename DT_COMPAT_ST_BBRAM_IT8XXX2 to COMAPT_ITE_IT8XXX2_BBRAM
2. The default configuration "$( )" should be a parentheses instead
of curly brackets. The BBRAM for it8xxx2 can be driven after
correcting.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
BBRAM content should be cleared when boot from cutoff. Compare magic
number to decide whether to clear entire BBRAM.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
Refactors all of the on-chip flash drivers to use a shared driver class
initialization priority configuration, CONFIG_FLASH_INIT_PRIORITY, to
allow configuring flash drivers separately from other devices. This is
similar to other driver classes like I2C and SPI.
The default is set to CONFIG_KERNEL_INIT_PRIORITY_DEVICE to preserve the
existing default initialization priority for most drivers.
Driver-specific options for SPI-based flash drivers are left intact
because they need to be initialized at a different priority than on-chip
flash drivers.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
This commit updates the ieee802154 driver to match the current feature
set of the nRF 802.15.4 radio driver for nRF53 SoCs.
Signed-off-by: Jedrzej Ciupis <jedrzej.ciupis@nordicsemi.no>
The board_internal_sensors_init function was called erlier than the GPIO
driver was initialized. This commit fixes the issue.
Signed-off-by: Przemyslaw Bida <przemyslaw.bida@nordicsemi.no>
Clear ADRDY before enabling ADC to ensure the subsequent
wait for ADRDY does not stop prematurely in case ADRDY
was already set.
The "ADC on-off control" sections of the following reference manuals
were consulted. That gives at least one instance per series affected
by this change, even if not every affected MCU is covered.
- RM0438 (STM32L552xx and STM32L562xx)
- RM0351 (STM32L47xxx, STM32L48xxx, STM32L49xxx and STM32L4Axxx)
- RM0434 (STM32WB55xx and STM32WB35xx)
- RM0454 (STM32G0x0)
- RM0440 (STM32G4 Series)
- RM0399 (STM32H745/755 and STM32H747/757)
- RM0433 (STM32H742, STM32H743/753 and STM32H750)
- RM0453 (STM32WL5x)
Signed-off-by: Alexander Mihajlovic <a@abxy.se>
Use a wrapper for LL_ADC_Enable that also waits for ADRDY if required
by the SoC to make sure it's properly enabled everywhere this is done.
Signed-off-by: Alexander Mihajlovic <a@abxy.se>
Filter out boards without st,stm32-can compatibles enabled in their
devicetree in the stm32-specific CAN driver test.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Remove the unused base binding for CAN bus devices (as in devices
present on a CAN bus). This binding should have been removed in
2269408572
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
The board features a STM32F405RGT6 MCU.
The code is based on boards/arm/olimex_stm32_p405 and
boards/arm/olimex_stm32_h103.
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
The spi node of the led_ws2812 now includes the frame format
as defined by the dts bindings spi-device.yaml
SPI_FRAME_FORMAT_TI is selected with overlay for target boards.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
the stm32 spi drivers now takes the DTS frame_format property
from the include/ drivers/spi.h
It will be possible to select the Motorola (default)
or TI from the DTS entry of the device,
when soc supports it, else a run time error is raised.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
The Q variant is the same as non-Q, except the Q has SMPS built-in.
This symbol addition is to have the correct
SOC definition ("STM32H7A3XXQ")
Signed-off-by: Manojkumar Subramaniam <manoj@electrolance.com>
Add kscan0 to support tests/driver/kscan/kscan_api.
When running the tests code on it8xxx2_evb, it shows fatal
error: IRQ is enabled. We find that once polling_task() is
created and executed, the KSI interrupt will be enabled and
before we call irq_connect_dynamic(), so we switch both
function sequence.
Signed-off-by: Ruibin Chang <Ruibin.Chang@ite.com.tw>
Adds fix so that a node running with extended adveriser is able to
enable GATT proxy correctly. This fixes a corner case issue where a
device with no other ongoing message sending is unable to advertise
the GATT proxy through
bt_mesh_gatt_proxy_set(BT_MESH_FEATURE_ENABLED) .
Signed-off-by: Anders Storrø <anders.storro@nordicsemi.no>
- Fix some syntax errors, e.g. :c:kconfig:`...`
- Remove references to missing symbols (replaced with literals)
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Add a dummy driver for the `vnd,adc` compatible to allow compilation of
drivers utilising an ADC when running "build_all" tests.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
On some platforms, HPET is not wired to trigger IRQ 2.
This would make HPET non-functional if the legacy
interrupt routing bit is set in the global config
register. This adds a DTS flag so the driver won't
set the bit to enable legacy interrupt.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Add an interrupt driven i2c driver for gd32 i2c peripheral.
The transmit and reception method refer from GD32 SoCs user manual.
Particularly, reception method choose the solution B.
There have some wait for state ready logic in the driver. It cause by
i2c device internal state change slower than i2c driver.
Signed-off-by: HaiLong Yang <cameledyang@pm.me>
The testcase is including a generic configuration conf
for the stm32 target boards when running the SPI loopback in
interrupt and DMA mode. Thus, the board specific conf file is useless.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
This commit adds two stm32 config to execute the testcase
when the SPI is using interrupt mode for transfer.
when the SPI is using DMA for transfer (not Interrupt nor ASYNC mode).
to run the on some specific (listed) stm32 boards on SPI instance.
Note the hw fixture (physical connection on the board)
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Fix the interrupt setting in the fvp_baser_aemv8r dts:
- The correct interrupt number is 5, not 0.
- The interrupt priority and type are swapped.
This patch also enables interrupt driven mode for this platform as this
is the ideal setting for a Fast Models based platform.
Issue-ID: SCM-4037
Signed-off-by: Filipe Rinaldi <filipe.rinaldi@arm.com>
Change-Id: Ic4815f5afe4c9df9d8fe373d47d2773d64087c96
Add configuration to support onboard LED and button.
- LED_R: PC13 (active low/output)
- LED_G: PA1 (active low/output)
- LED_B: PA2 (active low/output)
- BOOT0: PA8 (active high/input)
And enable timer1 to control LED_G and LED_B with PWM.
Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
We will soon need to do more boundary checking to test whether we are
reading secure or non-secure memory.
Refactor the boundary checking in preparation for this.
Signed-off-by: Sebastian Bøe <sebastian.boe@nordicsemi.no>
Adding UART samples to "Drivers: Serial/UART" so that the maintainer
will be notified for relevant PRs in the future.
Signed-off-by: Martin Jäger <martin@libre.solar>
The STM32 single_wire example was merged in parallel to this sample
and ended up as a sub-folder of this one. Separate both into their
own folders.
Signed-off-by: Martin Jäger <martin@libre.solar>
dts/bindings/timer/riscv,machine-timer must have compatible name
riscv,machine-timer. nuclei,machine-timer is wrong, correct it.
Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
Hexdump via logging is supposed to be human-readable for
debug information. Therefore, it should actually print
in human-readable form (well... after some magical decoder
has processed the raw MIPI Sys-T output).
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
GPIOTE channel was not freed when pin was reconfigured. This lead to
channel pool draining when pin was frequently reconfigured.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
