Allow individual specification of the time quanta used for the CAN bus
propagation segment and phase segment 1.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Add support for two CAN bus controller instances and disable both of
them by default. Enable CAN_1 for the STM boards currently supporting
CAN.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Similar deal to commit cc14c40a2d ("kconfiglib: Unclutter symbol
strings, avoid redundant writes, misc.").
Hide the direct dependencies in the defaults, selects, and implies
sections. Do the same in menuconfig/guiconfig as well.
This uses a new Kconfiglib API, so update Kconfiglib to upstream
revision 164ef007a8. This also includes some minor optimizations and
cleanups.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
In z_sys_mem_pool_block_alloc() the size of the first level block
allocation is rounded up to the next 4-bite boundary. This means one
or more of the trailing blocks could overlap the free block bitmap.
Let's consider this code from kernel.h:
#define K_MEM_POOL_DEFINE(name, minsz, maxsz, nmax, align) \
char __aligned(align) _mpool_buf_##name[_ALIGN4(maxsz * nmax) \
+ _MPOOL_BITS_SIZE(maxsz, minsz, nmax)]; \
The static pool allocation rounds up the product of maxsz and nmax not
size of individual blocks. If we have, say maxsz = 10 and nmax = 20,
the result of _ALIGN4(10 * 20) is 200. That's the offset at which the
free block bitmap will be located.
However, because z_sys_mem_pool_block_alloc() does this:
lsizes[0] = _ALIGN4(p->max_sz);
Individual level 0 blocks will have a size of 12 not 10. That means
the 17th block will extend up to offset 204, 18th block up to 216, 19th
block to 228, and 20th block to 240. So 4 out of the 20 blocks are
overflowing the static pool area and 3 of them are even located
completely outside of it.
In this example, we have only 20 blocks that can't be split so there is
no extra free block bitmap allocation beyond the bitmap embedded in the
sys_mem_pool_lvl structure. This means that memory corruption will
happen in whatever data is located alongside the _mpool_buf_##name
array. But even with, say, 40 blocks, or larger blocks, the extra bitmap
size would be small compared to the extent of the overflow, and it would
get corrupted too of course.
And the data corruption will happen even without allocating any memory
since z_sys_mem_pool_base_init() stores free_list pointer nodes into
those blocks, which in turn may get corrupted if that other data is
later modified instead.
Fixing this issue is simple: rounding on the static pool allocation is
"misparenthesized". Let's turn
_ALIGN4(maxsz * nmax)
into
_ALIGN4(maxsz) * nmax
But that's not sufficient.
In z_sys_mem_pool_base_init() we have:
size_t buflen = p->n_max * p->max_sz, sz = p->max_sz;
u32_t *bits = (u32_t *)((u8_t *)p->buf + buflen);
Considering the same parameters as above, here we're locating the extra
free block bitmap at offset `buflen` which is 20 * 10 = 200, again below
the reach of the last 4 memory blocks. If the number of blocks gets past
the size of the embedded bitmap, it will overlap memory blocks.
Also, the block_ptr() call used here to initialize the free block linked
list uses unrounded p->max_sz, meaning that it is initially not locating
dlist nodes within the same block boundaries as what is expected from
z_sys_mem_pool_block_alloc(). This opens the possibility for allocated
adjacent blocks to overwrite dlist nodes, leading to random crashes in
the future.
So a complete fix must round up p->max_sz here too.
Given that runtime usage of max_sz should always be rounded up, it is
then preferable to round it up once at compile time instead and avoid
further mistakes of that sort. The existing _ALIGN4() usage on p->max_sz
at run time are then redundant.
Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
This commit aligns the programming of the privileged stack MPU
guard with that of the default stack guard (i.e of supervisor
threads). In particular:
- the guard is programmed BELOW the address indicated in
arch.priv_stack_start; it is, therefore, similar to the
default guard that is programmed BELOW stack_info.start.
An ASSERT is added to confirm that the guard is programmed
inside the thread privilege stack area.
- the stack fail check is updated accordningly
- arch.priv_stack_start is adjusted in arch_userspace_enter(),
to make sure we account for a (possible) guard requirement,
that is, if building with CONFIG_MPU_STACK_GUARD=y.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
We introduce linker symbols to hold the start and end address of
the memory area holding the thread privilege stack buffers,
applicable when building with support for User Mode.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
The privilege stacks are not sandboxed inside an MPU region,
so they do not have to be aligned with the stack buffer size.
We fix this by using the PRIVILEGE_STACK_ALIGN macro, which
is defined in arch.h and reflects the minimum alignment
requirement for privilege stack buffers.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
For ARM architecture, use Z_THREAD_MIN_STACK_ALIGN to define
MEM_REGION_ALLOC in tests/kernel/mem_protect/mem_protect/.
STACK_ALIGN takes into account MPU stack guard alignment
requirements. However, application memory partitions do not
require MPU stack guards, therefore, the alignment requirements
are not applicable here.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
We introduce a new define to describe the alignment for a
privilege stack buffer. This macro definition is used by the
privilege stack generation script, to determine the required
alignment of threads' privilege stacks when building with
support for user mode.
We cannot use Z_THREAD_MIN_STACK_ALIGN in this case, because
the privilege stacks do not need to respect the minimum MPU
region alignment requirement, unless, of course, this is
enforced via the MPU Stack Guard feature.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
This commit re-organizes the macro definitions in arch.h for
the ARM architecture. In particular, the commit:
- defines the minimum alignment requirement for thread stacks,
that is, excluding alignment requirement for (possible)
MPU stack guards.
- defines convenience macros for the MPU stack guard align and
size for threads using the FP services under Shared registers
mode (CONFIG_FP_SHARING=y). For that, a hidden Kconfig option
is defined in arch/arm/core/cortex_m/mpu/Kconfig.
- enforces stack alignment with a wide MPU stack guard (128
bytes) under CONFIG_FP_SHARING=y for the ARMv7-M architecture,
which requires start address alignment with power-of-two and
region size.
The commit does not change the amount of stack that is reserved
with K_THREAD_STACK_DEFINE; it only determines the stack buffer
alignment as explained above.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
These constants do not need global exposure, as they're only
referenced in the reboot API implementation. Also their names
are trimmed to fit into the X86-arch-specific namespace.
Signed-off-by: Charles E. Youse <charles.youse@intel.com>
This appears to date all the way back to the initial import
and is used in exactly one place if DEBUG is on. Removed.
Signed-off-by: Charles E. Youse <charles.youse@intel.com>
Previously the existing EFLAGS was used as a base which was
then manipulated accordingly. This is unnecessary as the bits
preserved contain no useful state related to the new thread.
Signed-off-by: Charles E. Youse <charles.youse@intel.com>
If immediate logging is disabled, then we must use log_strdup()
when printing log string allocated from stack.
Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
Match what other drivers are doing and use the general BUS define.
Change DT_ST_LIS2DH_0_BUS_SPI to DT_ST_LIS2DH_BUS_SPI
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Definition of obsolete FLASH_PAGE_SIZE Kconfig symbol was
remaining in STM32F3 soc files.
Clean these.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
The defines related to IRQ priority don't exist and aren't used. So
just pass 0 to IRQ_CONNECT for the priority field.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
During conversion in #16815 a few device tree instance macro aliases
where missed (probably due to them existing to support future SoCs
and so not currently compiled), this fixes their usage.
Signed-off-by: Derek Hageman <hageman@inthat.cloud>
During conversion in #16937 a few IRQ macro aliases where missed
(probably due to lack of enabled test cases that compile them),
this fixes their usage.
Signed-off-by: Derek Hageman <hageman@inthat.cloud>
The defines in board.h aren't used/buildable so lets remove it. If
someone wants to support the button/led samples they can add DTS support
for those items.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Ctrl+N - moves in history to next entry
Ctrl+P - moves in history to previous entry
Behavior of those meta-keys is the same as in bash and emacs, which
makes Zephyr shell even more familiar to play with.
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
If the type of property is a 'array' we should generate defines as
if its a list even if theres only a single element in the list.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Fix iterating past the response which causes an invalid memory to be
accessed and passed over to the callback as if there were more
attributes found.
Fixes#16602
Signed-off-by: Luiz Augusto von Dentz <luiz.von.dentz@intel.com>
Log records may store either data or pointers to more records. In both
cases they must have the same size. With 64-bit pointers, the amount
of data that can occupy the same space as a pointer has to be adjusted.
And storage alignment has to accommodate actual pointers not u32_t.
Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
Log arguments were hardcoded to u32_t values. On 64-bit systems, this
is rather restrictive. To make things clear, arguments now have their
own type, log_arg_t, which now can be adjusted in only one location
if need be. It is currently defined as unsigned long whose effective
width is equivalent to u32_t on 32-bit systems, and u64_t on 64-bit
systems.
Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
If the type of property is a 'string-list' we should generate defines as
if its a list even if theres only a single element in the list.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
We missed converting DT_OPENISA_RV32M1_LPTMR_SYSTEM_LPTMR_IRQ to
DT_OPENISA_RV32M1_LPTMR_SYSTEM_LPTMR_IRQ_0.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
We already have the info so let's show it. This helps spots intermittent
issues[*], gives an indication of the time --build-only saves, can help
spot an overloaded test system, highlights the most time-consuming tests
which may need a longer timeout in their config, shows the effective
timeout value when one occurs... all this for a dirt cheap screen estate
price and two extra lines of code.
Sample -v output:
32/81 board123 tests/testme PASSED (qemu 2.049s)
33/81 board456 samples/hello PASSED (build)
34/81 qemu_x3 tests/kernel.stack.usage FAILED: timeout (qemu 60.029s)
see: sanity-out/qemu_x3/tests/kernel.stack.usage/handler.log
35/81 board456 tests/testme PASSED (build)
36/81 qemu_x5 tests/kernel.queue FAILED: failed (qemu 2.191s)
see: sanity-out/qemu_x5/tests/kernel.queue/handler.log
[*] running qemu in heavily packed cloud virtual machines comes to mind,
also see #12553, #14173 etc.
Signed-off-by: Marc Herbert <marc.herbert@intel.com>
Several bindings have an expectation of sub-nodes that describe the
actual infomation. The sub-nodes don't have any compatiable so we can't
key on that.
So we can add the concept of a sub-node to the YAML to handle cases like
'gpio-keys', 'gpio-leds', 'pwm-leds', etc..
The sub-node in the YAML is effective the "binding" params that describe
what properties should exist in the sub-node.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
The defines should have had a _0 on them, now that we generate the
proper defines, fixup the cases that used that old scheme.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
The alias generation wasn't doing the right thing with regards to
keeping the names consistent. We would drop the index from the define
name for aliases.
So we'd get
DT_NXP_KINETIS_GPIO_GPIO_D_IRQ
which should be
DT_NXP_KINETIS_GPIO_GPIO_D_IRQ_0
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Add a deprecate flag to add_prop_aliases so we can make the aliases it
generates as deprecated if needed.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
The last FCB test to run (fcb_test_last_of_n) uses uninitialized
test_data[] and leaves behind a flash.bin with random content. Pick
another one (fcb_test_reset) that leaves a deterministic flash.bin
behind and run that last instead.
Signed-off-by: Marc Herbert <marc.herbert@intel.com>
The binding specified 2 cells for an interrupt, but in reality we only
have an IRQ number. Remove the 'pri' cell from the binding to match
what the dts files are doing.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
There is no point allowing smaller alignments. And on 64-bit systems the
minimum becomes 8 rather than 4, so let's adjust things automatically.
Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
The block alignment must be enforced for statically allocated slabs
as well as runtime initialized ones. It is best to implement this
check only once in create_free_list() which is invoked by both
k_mem_slab_init() and init_mem_slab_module(), where pointers are about
to be set for the first time. It is then unnecessary to perform this
test on every slab allocation as the alignment won't change at that
point.
And not only the block size needs to be aligned, but the buffer
as well.
Signed-off-by: Nicolas Pitre <npitre@baylibre.com>