arch/x86: remove CR4_PAE_DISABLE mask

This is never used. The value is incorrect, in any case.

Signed-off-by: Charles E. Youse <charles.youse@intel.com>
This commit is contained in:
Charles E. Youse 2019-06-23 20:09:33 +00:00 committed by Andrew Boie
commit 01b572937b

View file

@ -110,8 +110,6 @@
/* Enable paging and write protection */
#define CR0_PG_WP_ENABLE 0x80010000
/* Clear the 5th bit in CR4 */
#define CR4_PAE_DISABLE 0xFFFFFFEF
/* Set the 5th bit in CR4 */
#define CR4_PAE_ENABLE 0x00000020