Commit graph

19237 commits

Author SHA1 Message Date
Andrew Boie
ae1a75b82e stack_sentinel: change cooperative check
One of the stack sentinel policies was to check the sentinel
any time a cooperative context switch is done (i.e, _Swap is
called).

This was done by adding a hook to _check_stack_sentinel in
every arch's __swap function.

This way is cleaner as we just have the hook in one inline
function rather than implemented in several different assembly
dialects.

The check upon interrupt is now made unconditionally rather
than checking if we are calling __swap, since the check now
is only called on cooperative _Swap(). The interrupt is always
serviced first.

Issue: ZEP-2244
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2017-06-08 13:49:36 -05:00
Andrew Boie
ef2e463493 frdm_k64f: default to pyocd.sh for flashing/debug
The wiki directions indicate that this script should be used,
and openocd.sh doesn't even work. Switch to pyocd.sh by default.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2017-06-08 13:49:36 -05:00
Andrew Boie
639a10e30d sam3x: report correct number of IRQ priority bits
The Sam3x HAL defines __NVIC_PRIO_BITS to 4.
Fixes an issue where interrupt priorities and masking
were not being done correctly.

Issue: ZEP-2243
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2017-06-08 12:23:37 -05:00
Anas Nashif
3405607d9e license: add missing licenses and copyright
We were missing license boilerplate in many files, add them

Jira: ZEP-1464

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2017-06-08 10:41:56 -04:00
Sharron LIU
c282811983 samples: static_lib: conditional assign BOARD (?=)
The sample app "static_lib" is very important to Zephyr user, which
demonstrate how to build and link a static lib.
ISSM team wanted to integrate this app in their IDE for quark platforms.
However they find the in "static_lib/hello_world/Makefile" BOARD is
hardcoded as qemu_x86.

This patch supports other BOARD passed from build command.
I have verified this app working fine @Arduino101.

Signed-off-by: Sharron LIU <sharron.liu@intel.com>
2017-06-08 07:55:25 -05:00
Andy Gross
84628e8b53 kconfig: misc: Conditionally remove FLASH_LOAD options
This patch adds a condition on the FLASH_LOAD_OFFSET and FLASH_LOAD_SIZE
to make them conditionally excluded if HAS_DTS is enabled.  FLASH
partition information must be defined for all DTS platforms which
utilize flash.

For DTS enabled platforms, CONFIG_FLASH_LOAD_OFFSET and
CONFIG_FLASH_LOAD_SIZE will be generated from the flash information
defined in the DTS file.  The values used for these variables will be
determined by the zephyr,code-partition chosen node.  If no chosen
node is specified, the zephyr,flash chosen node will be used.

Signed-off-by: Andy Gross <andy.gross@linaro.org>
2017-06-08 07:37:44 -05:00
Andy Gross
91f67a13f7 dts: common: yaml: Add partition file
This patch adds the yaml definition for flash partitions.

Signed-off-by: Andy Gross <andy.gross@linaro.org>
2017-06-08 07:37:44 -05:00
Andy Gross
69255043e7 dts/extract_dts_includes.py: Add partition support
This patch adds parsing support for flash partitions.

Signed-off-by: Andy Gross <andy.gross@linaro.org>
2017-06-08 07:37:44 -05:00
Andrew Boie
68e8813896 tests: context: allow 2 ticks of slop
The hard-coded value of 10ms doesn't take the system configured
amount of ticks per second, nor does it account for an unlucky
tick advance which causes the test to fail very intermittently
in QEMU.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2017-06-08 08:02:32 -04:00
Andrew Boie
7a5150cd9f tests: context: make some failures less ambiguous
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2017-06-08 08:02:32 -04:00
David B. Kinder
f0095619ed doc: fix linenum references in api example
fixed literalinclude warning that referenced beyond end of file and
added lineno-start option to show correct line number of included file

Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
2017-06-07 22:54:29 -04:00
Sharron LIU
3970cd4a87 samples: fixed typo in README.rst
Per ISSM team feedbacks:
“demostrating” >> “demonstrating”
“demonstates” >> ”demonstrates”

Signed-off-by: Sharron LIU <sharron.liu@intel.com>
2017-06-07 22:53:54 -04:00
Anas Nashif
054ab5f1cf release: Update version of master to 1.8.99
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2017-06-07 21:33:10 -04:00
Jens Peter Schroer
b676bfafc8 drivers: serial: uart_fe310: fix function definiton name for UART1 IRQ
This commit fixes the compilation error that occurs if both UART
ports on the FE310 SoC are enabled. The error occurs due to the
missing function definition of uart_fe310_irq_cfg_func_1 .

Signed-off-by: Jens Peter Schroer <jens@manetos.com>
2017-06-07 12:17:15 -05:00
Harry Jiang
364a2ac8a1 sensor: lps22hb: fix the pressure sensor fractional value
Signed-off-by: Harry Jiang <explora26@gmail.com>
2017-06-06 22:31:10 -04:00
Andrew Boie
eaa42889de doc: add interrupt implementation details
Issue: ZEP-634
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2017-06-06 22:23:06 -04:00
Andrew Boie
489d7475f8 samples: restore cpp_synchronization test
Issue: ZEP-2172
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2017-06-06 20:37:11 -04:00
Andrew Boie
5b22d6fab3 Makefile.toolchain.zephyr: fix C++ on Xtensa
Need to set CXXFLAGS just like we did CFLAGS.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2017-06-06 20:37:11 -04:00
chunlin
e125e5b9c6 arm: core: mpu: Prevent updating unexpected region
The REGION bits (bit[3:0]) of MPU_RBAR register can specify the number
of the region to update if the VALID bit (bit[4]) is also set.

If the bit[3:0] of "region_addr" are not zero, might cause to update
unexpected region. This could happen since we might not declare stack
memory with specific alignment.

This patch will mask the bit[4:0] of "region_addr" to prevent updating
unexpected region.

Signed-off-by: Chunlin Han <chunlin.han@linaro.org>
2017-06-06 12:21:21 -05:00
Anas Nashif
b520075788 gitlint: Ignore signed-off-by line
When checking for line length limits, ignore lines with Signed-off-by.
Some developers have a long name that would not fit within the limits.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2017-06-06 09:35:50 -04:00
Ravi kumar Veeramally
7a01988c64 net: 6lo: Fix source address uncompression
When src and dst addresses are compressed based on context
information, uncompression method should verify CID bit,
SAC and DAC bits and context ID's. But it has missed some
cases which resulted in invalid uncompressed IPv6 header.

e.g. CID is set, SAC is 0 and DAC is 1 and context id's provided.
Uncompression method assumed that src address is compressed based
on context information but it is not.

Signed-off-by: Ravi kumar Veeramally <ravikumar.veeramally@linux.intel.com>
2017-06-06 09:06:01 -04:00
Ravi kumar Veeramally
4a8a42f9dd net: rpl: Update RPL header
Empty RPL HBH header will be inserted while finalizing IPv6 packet
but updated after finding nexthop and sent the packet. In case of
Bluetooth or multicast dst address it was missed. Resulted in
empty RPL HBH header and packet dropped at peer node. It should
be updated in all circumstances.

Jira: ZEP-2088

Signed-off-by: Ravi kumar Veeramally <ravikumar.veeramally@linux.intel.com>
2017-06-06 09:06:01 -04:00
Jukka Rissanen
2e2ce3120a net: https: Allow mbedtls debugging for https-server
The mbedtls debugging function was set before the ssl config
struct was initialized. This meant that it was not possible
to activate mbedtls debug prints. This commit sets the debug
print option after the config struct has been initialized.

Fixed also the debug prints which print extra \n which looks
very bad in debugging outputs.

This commit does not enable mbedtls debugging, it just makes it
possible to output mbedtls debug prints. In order to get mbedlts
debug prints one needs to do this:
* set DEBUG_THRESHOLD to >0 in http_server.c
* enable CONFIG_NET_DEBUG_HTTP in project config file
* enable MBEDTLS_DEBUG_C in mbedtls config file (see file pointed
  by CONFIG_MBEDTLS_CFG_FILE option)
* in qemu, one needs to increase the size of the available RAM,
  this setting does the trick, CONFIG_RAM_SIZE=300

Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
2017-06-06 09:32:52 +03:00
Andrei Emeltchenko
f84d520088 drivers: IPM: Refactor IPM driver using u32_t registers
Refactor internals of IPM driver removing bitfields and byte access of
32 bit registers.

Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
2017-06-05 21:50:15 -04:00
Andrei Emeltchenko
1129925a62 drivers: IPM: Access 32-bit IPM registers right way
The current method of accessing 32-bit data and control registers does
not work for all quark architectures. Sometimes writing to those
registers byte-by-byte results in last byte occupying whole 32 bit
register.

Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
2017-06-05 21:50:15 -04:00
Andrei Emeltchenko
50605ecba8 drivers: IPM: Fix loosing interrupts
Iterate inside ISR until we handle all events.

Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
2017-06-05 21:50:15 -04:00
Leandro Pereira
7763a1dee9 lib/json: Fix build warnings (-Wpointer-sign) with LLVM/icx
Move all characters to "char" type: no implicit conversions between
"unsigned char", "u8_t", etc.

Tested with ISSM 2016.2.085.

Jira: ZEP-2159
Signed-off-by: Leandro Pereira <leandro.pereira@intel.com>
2017-06-05 21:46:04 -04:00
Paul Sokolovsky
08a2c6019c net: context: Operations on unused context should lead to EBADF.
Semantics of ENOENT error as used previously is "named entity not
found", whereas for "I/O handle is not valid", there's EBADF. For
example, POSIX/SUSV2 doesn't even list ENOENT as a possible error
for accept(), connect(), recv(), etc. whereas it lists EBADF, e.g.:
http://pubs.opengroup.org/onlinepubs/7908799/xns/connect.html

Signed-off-by: Paul Sokolovsky <paul.sokolovsky@linaro.org>
2017-06-05 10:32:28 +03:00
Vinayak Kariappa Chettimada
0998cdfba1 Bluetooth: shell: gatt-write-without-response with repeat
Add a repeat param to gatt-write-without-response so that
it covers what gatt-write-without-response-repeated was
doing. gatt-write-without-response was removed in the
commit 26eae70da.

gatt-write-signed too will have repeat param with this
change.

Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
2017-06-04 09:34:08 +03:00
Leandro Pereira
cb0f81f25f samples: dns_resolve: Clarify documentation about DNS configuration
Add clarification that the DNS server configuration must be edited in
the respective prj.conf file.

JIRA: ZEP-2040
Signed-off-by: Leandro Pereira <leandro.pereira@intel.com>
2017-06-03 15:02:14 -04:00
Andrew Boie
82cd648b9b x86: don't shift data addresses between builds
Inserting the IDT results in any data afterwards being shifted.
We want the memory addresses between the zephyr_prebuilt.elf
and zephyr.elf to be as close as possible. Insert some dummy
data in the linker script the same size as the gen_idt data
structures. Needed for forthcoming patches which generate MMU
page tables at build time.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2017-06-03 15:01:04 -04:00
Carles Cufi
4b355f1191 doc: getting_started: Add WSL instructions
Having tried and tested building Zephyr using the standard SDK on
Windows 10 using the new WSL (Windows Subsystem for Linux), add the
documentation so that others can benefit from the functionality.

Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
2017-06-03 15:00:24 -04:00
Andy Gross
f2ecdd4145 dts: yaml: Add YAML template file
This patch adds a YAML template file that describes the format of a
Zephyr device tree YAML specification.

Signed-off-by: Andy Gross <andy.gross@linaro.org>
2017-06-02 16:56:30 -04:00
Andy Gross
252da09d02 doc: Add Device Tree documentation
This patch adds documention for device tree development in Zephyr.  This
includes a description of device tree, how it is integrated into Zephyr,
and other related information.

Signed-off-by: Andy Gross <andy.gross@linaro.org>
2017-06-02 16:56:30 -04:00
Andrei Emeltchenko
f1f5275779 bluetooth: Allow to specify Logging Domain
At the moment all bluetooth logs are prefixed with [bt] making it
difficult to understand where the logs belong to.

Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
2017-06-02 21:52:17 +03:00
Andrew Boie
6d4763129d riscv32: update time slice before swap
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2017-06-02 14:47:01 -04:00
Andrew Boie
7b7fbf851e nios2: reset timeslice on interrupt-induced swap
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2017-06-02 14:47:01 -04:00
Andrew Boie
7b7504e2b9 schedule_api: don't exclude Nios II
Nothing about this test requires tickless idle and it's not even
turned on in prj.conf.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2017-06-02 14:47:01 -04:00
Andrew Boie
3989de7e3b kernel: fix short time-slice reset
The kernel tracks time slice usage with the _time_slice_elapsed global.
Every time the timer interrupt goes off and the timer driver calls
_nano_sys_clock_tick_announce() with the elapsed time, this is added to
_time_slice_elapsed. If it exceeds the total time slice, the thread is
moved to the back of the queue for that priority level and
_time_slice_elapsed is reset to zero.

In a non-tickless kernel, this is the only time _time_slice_elapsed is
reset.  If a thread uses up a partial time slice, and then cooperatively
switches to another thread, the next thread will inherit the remaining
time slice, causing it not to be able to run as long as it ought to.

There does exist code to properly reset the elapsed count, but it was
only compiled in a tickless kernel. Now it is built any time
CONFIG_TIMESLICING is enabled.

Issue: ZEP-2107
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2017-06-02 14:47:01 -04:00
fallrisk
106bf1c09a arm: board: Add support for board Atmel SAM4S Xplained.
This commit provides support for Atmel SAM4S Xplained board

Signed-off-by: Justin Watson <jwatson5@gmail.com>
2017-06-02 14:11:13 -04:00
Florian Vaussard
5671c15fee samples: blink_led: Add support for STM32F412
The STM32F412 has PWM output capabilities. Add support to the blink_led
samples.

Tested using a Nucleo STM32F412ZG board (PWM output on pin 28 of the
CN11 Morpho connector and pin 29 of the CN10 Zio connector).

Change-Id: I75fb986fa97bd1c07c6375938430e7963297cd9d
Signed-off-by: Florian Vaussard <florian.vaussard@heig-vd.ch>
2017-06-02 14:11:13 -04:00
Florian Vaussard
13cba0bb76 stm32f4: Add STM32F412 Nucleo board
Add necessary board files, pinmux and device tree in order to have a
usable debug console.

Origin: Original

Change-Id: I43a9d278c3f2c936a714263626722f630367b663
Signed-off-by: Florian Vaussard <florian.vaussard@heig-vd.ch>
2017-06-02 14:11:13 -04:00
Florian Vaussard
6ad43279ec arm: stm32f4: Add basic support for STM32F412
Add necessary Kconfig and minimal device tree in order to support
STM32F412ZG variant as found on the Nucleo STM32F412 board.

Origin: Original

Change-Id: Ic98a686f478ce551dc6101466ed0cf16924109e8
Signed-off-by: Florian Vaussard <florian.vaussard@heig-vd.ch>
2017-06-02 14:11:13 -04:00
Erwan Gouriou
9413c8ba4d stm32: clean up after completion of transition to ll Clock control
Following migration of stm32f1xx series clock control driver to
STM32Cube LL API, cleanup stm32 code base in order to take into
account that this is the only clock driver available for stm32
family.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2017-06-02 14:11:13 -04:00
Erwan Gouriou
f2e8a21d7f stm32f1xx: remove references to native driver
Following introduction of stm32cube LL based clock control driver,
remove references to former native driver.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2017-06-02 14:11:13 -04:00
Erwan Gouriou
a7536a12e4 boards: move stm32f1xx based boards to LL based Clock control driver
Following introduction of stm32cube LL based clock control driver
for stm32f1 series, update stm32f1xx based boards to support new
driver settings

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2017-06-02 14:11:13 -04:00
Erwan Gouriou
78d74f4031 drivers: gpio stm32: set the ground for stm32f1x ll clock driver
Before introduction of LL based clock control for stm32f1xx series,
prepare gpio driver to provide useful definition for new API

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2017-06-02 14:11:13 -04:00
Erwan Gouriou
e1a90583d4 drivers: clock_control: provide LL based driver to stm32f1xx series
Align stm32f1xx series clock driver to other parts of stm32 family.
Driver support both Connectivity and Density lines of stm32f1 series,
that are based on different Reset and Clock Control architectures.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2017-06-02 14:11:13 -04:00
Florian Vaussard
acdbf7d093 samples: blink_led: Add support for STM32F413
The STM32F413 has PWM output capabilities. Add support to the blink_led
samples.

Tested using a Nucleo STM32F413ZH board (PWM output on pin 28 of the
CN11 Morpho connector and pin 29 of the CN10 Zio connector).

Change-Id: I3b25b09cab54265b28088ac9681aec588d9d48b5
Signed-off-by: Florian Vaussard <florian.vaussard@heig-vd.ch>
2017-06-02 14:11:13 -04:00
Florian Vaussard
5ffb8d485a nucleo_f413zh: Add pinmux for PWM2_CH1
The Nucleo STM32F413 board is missing the default pinmux for PWM2 on
PA0, as stated in the doc. The same pinmux is also done for other
similar Nucleo board. So add it!

Change-Id: I2086c0a4ce65d68455a0978570f118e965f4c6ca
Signed-off-by: Florian Vaussard <florian.vaussard@heig-vd.ch>
2017-06-02 14:11:13 -04:00