Commit graph

19237 commits

Author SHA1 Message Date
Benjamin Walsh
2c1a95aee6 device: rename SYS_GET_DEVICE_NAME/SYS_GET_DEVICE
Rename them to DEVICE_NAME_GET and DEVICE_GET to fit in the 'device'
namespace.

Change-Id: I407a7f284ed4d1c071961b46615eea859c2e825f
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
2016-02-05 20:25:25 -05:00
Benjamin Walsh
0303d8cab9 device: rename SYS_DEFINE_DEVICE()
Rename it to DEVICE_DEFINE() so that it fits in the 'device' namespace.

Change-Id: I3af3a39cf9154359b31d22729d0db9f710cd202b
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
2016-02-05 20:25:25 -05:00
Andrew Boie
2ee9aca31a irq: size _irq_to_interrupt_vector_table
Most systems have far less than 256 IRQ lines available, so
save some bytes in ROM by making this a config option.

On systems with MVIC, omit the table entirely as the mapping
is fixed.

The build cmd_gen_idt is slightly easier to read and will fail
immediately if any of the commands in the sequence error out.

Change-Id: I411f114557591e5cd96b618e6f79f97e8bedadf0
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-02-05 20:25:25 -05:00
Juan Manuel Cruz
ba15d18d94 adc: updated the adc read api description
The ADC read API has changed from asynchronous read to
synchronous read. There is no callback support anymore.

Change-Id: I2fdd10916dc6acb7b352bc549cd886929f7cd764
Signed-off-by: Juan Manuel Cruz <juan.m.cruz.alcaraz@linux.intel.com>
2016-02-05 20:25:25 -05:00
Benjamin Walsh
bfc27206b2 device: rename DECLARE_DEVICE_INIT_CONFIG()
Rename it to DEVICE_INIT_CONFIG_DEFINE(), because (a) it was not fitting
in any namespace and (b) it is not used to declare, but rather define a
object.

Change-Id: I1da5822f06b85a9fb024b5b184afd0ccc01012ec
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
2016-02-05 20:25:25 -05:00
Andrew Boie
bd18487727 x86: if no dynamic irqs, omit _interrupt_vectors_allocated
This bitfield is only needed to find unused vectors in the IDT
for installing dynamic interrupts.

Change-Id: I34ecd330774a0e50f240b4396527682eded29627
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-02-05 20:25:25 -05:00
Andrew Boie
630280c464 build: fix issue with static interrupts on ARC/ARM
Static interrupts rely on a trick where the _sw_isr_table array
is declared with each element in a different .gnu.linkonce
section, initially pointing to the spurious IRQ handler.

When drivers or apps declare their own interrupts, they override
the element with their own containing the real ISR and parameter.

However, this only works if the initial declaration of the
_sw_isr_table array with the spurious handlers is linked last.
App-specific code was being linked later than the core code,
causing static interrupts declared in apps not to be installed
correctly.

If the _sw_isr_table is moved from SOC-specific code to core arch
code, interrupts configured under soc/ should still also work.

Change-Id: Iec7df47386dfbbf2956a807da27dc8aa6e01b268
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-02-05 20:25:25 -05:00
Rodrigo Caballero
d1ff13e68f doc: Fix cross-reference and toctree on index.rst and about_zephyr.rst
Change-Id: I315a4d90dc2c98062ca84ec01f915bf47d6f15c1
Signed-off-by: Rodrigo Caballero <rodrigo.caballero.abraham@intel.com>
2016-02-05 20:25:25 -05:00
Fabien Chereau
4ec9758034 irq: fix declared _sw_isr_table size on ARC
On ARC, the _sw_isr_table has an actual size of CONFIG_NUM_IRQS - 16
because the 16 first IRQ are reserved.

This patch has no impact on the generated binary but allows the
debugger to display valid information instead of displaying 16 false
entries containing garbage.

Change-Id: Iae2756c1bc333dc822e9f80c2115fba6521792a2
Signed-off-by: Fabien Chereau <fabien.chereau@intel.com>
2016-02-05 20:25:25 -05:00
Fabien Chereau
78b2670032 irq: added a check for dynamic IRQ table overflow
Change-Id: I0128f752f8e42ee38331fa937b7616354bf346e0
Signed-off-by: Fabien Chereau <fabien.chereau@intel.com>
2016-02-05 20:25:24 -05:00
Benjamin Walsh
c5bb958db4 arm: add software reboot for QEMU
This simulates a reboot by jumping back to the address stored in the
reset vector in vector table found at address 0. It is supported from
interrupt/exception level, which means that sys_arch_reboot() in this
case finds out if it is called from thread mode or handler mode, and in
the latter case, it unwinds the nested exception stack as needed.

Change-Id: Ib67f850f8411f1ee8fc592a5f31f2f70d0af14a4
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
2016-02-05 20:25:24 -05:00
Benjamin Walsh
62c65d7f00 arm: in non-XIP image, make __start alias of __reset
The bootloader expects the entry point to be called __start, not __reset.

Change-Id: I5a5f7f45c248b9398e58fb026c731f8617fe4856
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
2016-02-05 20:25:24 -05:00
Benjamin Walsh
ec47784a28 test_mem_safe: support ARM
Test works for ARM, but not testing sys_mem_safe_write_to_text_section()
since base ARM image are XIP images.

This test could be enhanced to  boot a secondary non-XIP image for ARM
to test writing to .text.

Change-Id: I56aef68afabe88588b61c273901491de0c24a39b
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
2016-02-05 20:25:24 -05:00
Benjamin Walsh
2e27adb569 mem_safe: prevent writing to .text in XIP systems
The sys_mem_safe_write_to_text_section() now always fails in XIP
systems, since their .text section is in ROM.

Change-Id: Ie47a5dbf5f75a4bfe8e9fc9852d0037a3546aae8
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
2016-02-05 20:25:24 -05:00
Benjamin Walsh
7b526e2447 cache: add implementation for cache-less systems
Add NOP functions to allow writing cache-availabiliy-agnostic code.

Change-Id: Id8e392271329095abad3db6856a4e621702d1dae
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
2016-02-05 20:25:24 -05:00
Benjamin Walsh
bd94d98255 arm: add connecting exceptions at runtime
Add sys_exc_connect() (and its x86-compatible alias nanoCpuExcConnect())
that allows connecting an exception handler at runtime.

The current implementation is a bit of a bastard, to avoid disturbing
the current implementation of the exception handlers. Instead of hooking
_exc_wrapper() in all vectors and adapting the exception handlers, the
current exception handlers are still hooked directly in the vectors.
When an exception is hooked at runtime, _exc_wrapper() gets installed in
the vector and the real handler gets inserted in _sw_exc_table; this
means that the scheme only works with non-XIP kernels.

This should be enhanced so that _exc_wrapper() is hooked in all vectors,
and that current exception handlers (for faults mostly) are reworked to
be inserted in the _sw_exc_table and wrapped in _exc_wrapper().

Change-Id: Icaa14f4835b57873d2905b7fbcbb94eeb3b247d1
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
2016-02-05 20:25:24 -05:00
Benjamin Walsh
f8807dae89 arm: rename _VectorTableROM
For non-XIP systems, it's not in ROM, so remove the "ROM" part. Adapt it
to coding conventions at the same time, and export it to C code.

Change-Id: Id09a6be8bc9c462667ed71b53be7fa5382c88db3
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
2016-02-05 20:25:24 -05:00
Benjamin Walsh
9dc2374d1c arm/nvic: add _NUM_EXC symbol for number of exceptions
Change-Id: Ibd1660c07a32041c72d2cbb0c2049e04647bb64e
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
2016-02-05 20:25:24 -05:00
Benjamin Walsh
cfac189f98 arm: refactor fault handling stack pointer passing
Find out on which stack the stack frame for an exception is in the assembly
code (__fault()) rather than in C (_Fault()). This will allow pushing
more registers on the stack when debugging is enabled.

Change-Id: I1c510b83098536f8930392b17df27511ccd04d80
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
2016-02-05 20:25:24 -05:00
Benjamin Walsh
c4a093a24e arm: rework _ScbSystemReset() into sys_arch_reboot()
Rename the function and allow it to handle the 'type'
argument, which is ignored in this case.

Change-Id: I3d3493bea4511b2d026747505e7e52c5acc85012
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
2016-02-05 20:25:24 -05:00
Benjamin Walsh
2ace19ede8 arm: allow accessing GPRs in ESF by their real name
The ESF was built using the 'alias' names of the GPRs (a1, lr, pc, etc)
rather than their 'real' name (rN).

Change-Id: I49cae5e94869a79a3165dc7f2347d8cec39dbf67
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
2016-02-05 20:25:24 -05:00
Benjamin Walsh
85138855f0 arm: add macro for defining GPRs with aliases
On ARM, GPRs are often known by two names. E.g. the stack pointer is
both 'sp' and 'r13', the first parameter to a function 'a1' and 'r0',
etc. This macro allows defining them in a data structure, e.g. in the
ESF,  without having to create a union, use the correct type, etc: it is
less error-prone and makes for shorter code.

	sys_define_gpr_with_alias(name1, name2)

Change-Id: Ie4a6caa1ac23f26be4f7f0e05e9265f2655062cc
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
2016-02-05 20:25:24 -05:00
Benjamin Walsh
4465cf47e9 arm/reset: relocate the vector table when a non-XIP image
The processor is made aware that the vector table built in the image is
located at the start of SRAM in the case of a non-XIP image, rather than
at 0 in as is the case in XIP images.

Change-Id: I40b28ca32daf3e8930f103224766ed4e0ccc88e0
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
2016-02-05 20:25:24 -05:00
Benjamin Walsh
21628d41d0 arm: add support for linking images entirely in SRAM
The image will be linked at a different address and with different
ROM/RAM sizes to allow running a bootloder image that loads a payload
image. The addresses/sizes depend on if it is a XIP image or not
(CONFIG_XIP), and in the case of a XIP image, if it is a bootloader
image (CONFIG_IS_BOOTLOADER) or not.

In the case of a bootloader, it is given the full ROM and
CONFIG_BOOTLOADER_SRAM_SIZE kB of SRAM.  When not a XIP image, it is given
the full SRAM minus CONFIG_BOOTLOADER_SRAM_SIZE kB, and is linked at the
start of SRAM.

Change-Id: Ibbb693c7bff022f313dac40f21c04a61f4bed115
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
Signed-off-by: Peter Mitsis <peter.mitsis@windriver.com>
2016-02-05 20:25:24 -05:00
Benjamin Walsh
d04e3fc134 arm/frdm_k64f: only leave space for security in XIP images
This board needs 16 bytes to be written with a specific value when the
target boots. This is only necessary when running a XIP image which
exists around those 16 bytes.

Change-Id: Ifd26b3842f09137765d9c7d1678476bfda8a563f
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
Signed-off-by: Vlad Lungu <vlad.lungu@windriver.com>
2016-02-05 20:25:24 -05:00
Javier B Perez Hernandez
aaa94d8ba2 doc: frdm_k64f: Update firmware name for board frdm_k64f
Update the name of the firmware in the board documentation.
Proper name is "Firmware FRDM K64F" based on their website doc.

Change-Id: I75be2a676a9f2dcb4806ffbb39483c1ad91dae76
Signed-off-by: Javier B Perez Hernandez <javier.b.perez.hernandez@linux.intel.com>
2016-02-05 20:25:24 -05:00
Andre Guedes
93831ebcce i2c: Fix i2c_qmsi_configure()
In the initial version of the I2C shim driver, the i2c clock gate was
enabled within i2c_qmsi_configure(). After some review rounds we decided
to move it to i2c_qmsi_init() but missed to remove the clk_periph_disable
call within i2c_qmsi_configure(). So this patch removes it.

Change-Id: Id45dba2e00a5649846d305399bc1b2b275063cb6
Signed-off-by: Andre Guedes <andre.guedes@intel.com>
2016-02-05 20:25:24 -05:00
Benjamin Walsh
2858cbf829 idle: fix tasks waiting when NANO_TIMEOUTS is enabled
Fix an issue where, if a task is pending on a nano timeout, the duration
it wants to wait is not taken into account by the tickless idle code.
This could cause a system to wait forever, or to the limit of the timer
hardware (which is forever, for all intents and purposes).

This fix is to add one field in the nanokernel data structure for one
task to record the amount of ticks it will wait on a nano timeout. Only
one task has to be able to record this information, since, these waits
being looping busy waits, the task of highest priority is the only task
that can be actively waiting with a nano timeout. If a task of lower
priority was previously waiting, and a new task is now waiting, it means
that the wait of the original task has been interrupted, which will
cause said task to run the busy loop on the object again when it gets
scheduled, and the number of ticks it wants to wait has to be recomputed
and recorded again.

Change-Id: Ibcf0f288fc42d96897642cfee00ab7359716703f
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
2016-02-05 20:25:24 -05:00
Benjamin Walsh
42a97c8b1d device: rename 'caller' field of device_sync_call_t
Rename it to 'waiter', since 'caller' is ambiguous from the point of
view of the _complete() API, since it is not the 'caller' in that case.

Change-Id: Ib3cadba99195935d67153023d731be26ffa58679
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
2016-02-05 20:25:24 -05:00
Benjamin Walsh
99a4f13bbc device: rename synchronous_call_ APIs
Rename them to device_sync_ to fit in the device_ namespace.

Change-Id: I1088dda958584ed90b97137298050fee44c20ee4
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
2016-02-05 20:25:24 -05:00
Benjamin Walsh
2ec2f8bb62 uart: remove incorrect comment w.r.t. type of device pointer
Change-Id: Ic0523d7413dbc14dd8e44cf9c4c0b70d65d759d0
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
2016-02-05 20:25:23 -05:00
Peter Mitsis
0f213d57e4 samples: Ensure stacks are properly aligned
Applies '__stack' tag where necessary to ensure that stacks are
properly aligned.

All stacks must be properly aligned via the '__stack' macro tag.

Change-Id: Icfb04e246bd97b2185bb05e63647c7ab01993e36
Signed-off-by: Peter Mitsis <peter.mitsis@windriver.com>
2016-02-05 20:25:23 -05:00
Peter Mitsis
f23c498018 net: Ensure stacks are properly aligned
Applies '__stack' tag where necessary to ensure that stacks are
properly aligned.

Change-Id: Ibbce5d4656f69db6c9b5006d15e0a0eb231c7af4
Signed-off-by: Peter Mitsis <peter.mitsis@windriver.com>
2016-02-05 20:25:23 -05:00
Tomasz Bursztyka
9acd16c8c5 boards: Quark SE based boards have a different SPI interrupt flag
SPI needs to get its interrupt configured as triggering on level high to
work properly. This is specific to Quark SE (thus x86 core).

Change-Id: If3921240709e0fbf5b26e2325f67eb977a9fac10
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2016-02-05 20:25:23 -05:00
Tomasz Bursztyka
a150c1650e samples: Add a q&d test application for SPI
A dummy test to verify SPI driver and API build properly.

Change-Id: Icb1ab282b4a0fa02ec949c96becdfdc16f20bc2d
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2016-02-05 20:25:23 -05:00
Tomasz Bursztyka
031ae4ec45 cc2520: quark_se_devboard: Provide default configuration
These are the default ones for the internal CC2520 chip found on the
Quark SE SS devboard. GPIO 11 is used to emulate CS.

Change-Id: Ibc564176f1f77edeb7f25df3567de8c334703795
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2016-02-05 20:25:23 -05:00
Tomasz Bursztyka
448acf527f cc2520: Make SPI related info configurable via Kconfig
SPI, to control the CC2520 chip, is the only generic feature and thus
the only one configurable through Kconfig. GPIO on the other end depends
a lot on the SoC/Board. Adding a slave select option as well.

Change-Id: I63068fab476ed8d5b26103e4ad20e5be253c9932
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2016-02-05 20:25:23 -05:00
Tomasz Bursztyka
2b3e60e6df cc2520: Reworking radio on and transmission logic
FIFOP setting is a wrong assumption to know if radio is on.
Transmission runs on clock basis instead of pre-set loop counter. Thus
removing useless config option relevantly as well.
Opmitizing a bit the code as well, and making cc2520_on() public for
testing purpose.

Change-Id: I4495d1d6c19d10dcbc18f7e2fd5041720ec1f438
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2016-02-05 20:25:23 -05:00
Tomasz Bursztyka
930bb9d3ca cc2520: Make the driver more in line with Zephyr
CC2520 drivers as a singleton:
Current driver can only handle a single instance. This is due to the
gpio callback which cannot provide the concerned device (not the gpio
device, the cc2520 one). Setting a singleton instance for now, as the
network stack cannot handle more net devices anyway. This will be fixed
in the future.
In the mean time: improving a bit the usage of spi and gpio by accessing
the cc2520 instance directly.

Also: simplifying SPI usage, useless internal locking removed, better
debugging routines, better busy wait macro and use Zephyr's BIT() macro
instead of internal one.

Change-Id: I92b849135a92f77ee6a4374c9f662dcad8347814
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2016-02-05 20:25:23 -05:00
Jukka Rissanen
cf7c826874 cc2520: Add Quark SE devboard support
Support for running cc2520 radio found on Quark SE devboard.

Change-Id: Ib0781489e3ebae8569a13c35d3fe6a6d87ac9a3b
Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2016-02-05 20:25:23 -05:00
Jukka Rissanen
f1563253cf cc2520: Initial checkin for TI CC2520 802.15.4 driver
Integrating it into network stack. Centralizing all in drivers/802.15.4

Change-Id: Ia2916ff652afe5fe736f6560c2ed4a911a5f0679
Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2016-02-05 20:25:23 -05:00
Tomasz Bursztyka
fa79a5df21 contiki: clock: Tiny cleanup
Use existing macros from Zephyr and apply proper code style.

Change-Id: Ia3d572054aa702ce33ceae04eff931cfb900c45c
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2016-02-05 20:25:23 -05:00
Tomasz Bursztyka
eb96f0a73a spi: dw: Fix Tx and Rx threshold after each push/pull
Reading: As when setting up the transfer, Rx has to adapt to current
left Tx lenght.
Writing: If nothing will be transmitted anymore, downsizing the level to
0. This fixes a hanging issue while making the controller being busy for
nothing. Another hack found to fix the same issue was to test the SR
Busy flag bit in the ISR handler. As the threshold level makes more
sense, kepping this one.

Change-Id: I87ba393d507c9418295f188d866d9979f423536c
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2016-02-05 20:25:23 -05:00
Anas Nashif
e3401c9496 toolchain: remove yocto variant, now using zephyr variant
Change-Id: I976f1e47a4fa80030878da1568dc71289bbd8e0f
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-02-05 20:25:23 -05:00
Dan Kalowsky
2ad4940f6a docs: Platform documentation of Arduino 101
Adds documentation for the Arduino 101 on how to
connect up the debugger, flash, and build for the platform.

Change-Id: I0c7f119eb892ad5857de73dca94bc284bd0b4279
Signed-off-by: Dan Kalowsky <daniel.kalowsky@intel.com>
Signed-off-by: Rodrigo Caballero <rodrigo.caballero.abraham@intel.com>
2016-02-05 20:25:23 -05:00
Juan Manuel Cruz
06e2d0fe76 adc: updates sample width kconfig help message
The numeric code to configure sample width in ADC needs correction.

Change-Id: I6d73db674852650f70178322d949f9b2b49f97af
Signed-off-by: Juan Manuel Cruz <juan.m.cruz.alcaraz@linux.intel.com>
2016-02-05 20:25:23 -05:00
Dmitriy Korovkin
09acfc27f7 c++: Add sample projects
Change-Id: I2d74f6225ed9736d671f34a33c99da34e81863cc
Signed-off-by: Dmitriy Korovkin <dmitriy.korovkin@windriver.com>
2016-02-05 20:25:23 -05:00
Peter Mitsis
8e35cc8eb4 build: Add C++ support
Adds C++ support to the build system.

Change-Id: Ice1e57a13598e7a48b0bf3298fc318f4ce012ee6
Signed-off-by: Dmitriy Korovkin <dmitriy.korovkin@windriver.com>
Signed-off-by: Peter Mitsis <peter.mitsis@windriver.com>
2016-02-05 20:25:23 -05:00
Constanza Heath
eaed145cb6 Integration of TinyCrypt v2: ECC, CMAC, AES-CCM with test cases for CMAC and CCM.
Change-Id: I26a5c3027af0d00f55021c1ac063100606084314
Signed-off-by: Constanza Heath <constanza.m.heath@intel.com>
2016-02-05 20:25:23 -05:00
Anas Nashif
23be7fd1cd build: rebuild binary if dependencies have changed
We had an issue of final binary not being built when sources
are changed. This adds the required dependencies.

Change-Id: I1676fc63e6857ef604576905a5ae1ee02b0b648a
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-02-05 20:25:23 -05:00