It is valid to call set_ad with NULL data as long as length is 0.
Improve code comment for unusual condition check explaning why it
is correct.
Change-Id: I29440fb04747f6df06dc4df466eb43e160ff3be4
Signed-off-by: Szymon Janc <ext.szymon.janc@tieto.com>
Adds implementation of the BR/EDR connection L2CAP notifier. It makes,
for each registered BR/EDR fixed channel, basic validation and channel
initialization using two local helper functions.
Change-Id: I6393a43b25ff0d9f23deaf93562add08861ea1d2
Signed-off-by: Arkadiusz Lichwa <arkadiusz.lichwa@tieto.com>
Moves, specific for BR/EDR transport, register fixed channel handler
to l2cap_br.c file and make it local. Then using it register BR/EDR
signal channel (CID 1) context during channel layer initialization
in 'bt_l2cap_br_init'.
Change-Id: I5e23fc5d43ae3d7838ecb44ad4fa631eccc8cb4c
Signed-off-by: Arkadiusz Lichwa <arkadiusz.lichwa@tieto.com>
Adds dedicated function informing L2CAP layer about established BR/EDR
connection. Existing 'bt_l2cap_connected()' connection notifier is
refactored to use new API 'bt_l2cap_br_connected()' which is implemented
in l2cap_br.c file.
Currently the new handler is just stub since proper internals of
BR/EDR L2CAP signal channel management are not yet implemented
in l2cap_br.c file.
Change-Id: Idef9be63338c6bb4b3315ec0452d84f2431fbaa2
Signed-off-by: Arkadiusz Lichwa <arkadiusz.lichwa@tieto.com>
Moves initialization of signal buffer for BR/EDR transport to
l2cap_br.c unit and removes existing references to signal buffer in
l2cap.c file to prevent compiler complains.
Change-Id: I784b926df814e632944f3a12b0b6d03d144d2438
Signed-off-by: Arkadiusz Lichwa <arkadiusz.lichwa@tieto.com>
The stub label is created with ISR and IRQ number since the same
ISR can be used by several IRQs
Change-Id: I0ea909fddbce7a70c754befd095b7a3b36fffab4
Signed-off-by: Fabrice Olivero <fabrice.olivero@intel.com>
Added CONFIG_KERNEL_EVENT_PROFILER_DYNAMIC flag for enabling that
capability. When set, nothing will be logged by default
Change-Id: I03552483e5a6bfd9e2505eda56908f0d0ae98618
Signed-off-by: Fabrice Olivero <fabrice.olivero@intel.com>
OS tick period (usually 10 ms) is not sufficiently precise for task
execution analysis (like processing CPU load per context)
With that modification, the timestamp used by the kernel event logger
is 32-bit LSB of platform HW timer (for example Lakemont APIC timer
for Quark SE).
This timer period is very small and leads to timestamp wraparound
happening quite often (e.g. every 134s for Quark SE).
This wraparound must be considered when analyzing kernel event logger
data and care must be taken when tickless idle is enabled and sleep
duration can exceed maximum HW timer value.
Change-Id: Idc545da8f828a7357a69d83ff25c9afd09dab3c4
Signed-off-by: Fabrice Olivero <fabrice.olivero@intel.com>
IC_CON_SPEED_MASK isn't used, but I see it was defined wrong.
It should be a 2 bit mask.
Change-Id: I1003ae13b831ff481574bcf956daf2c54dbe7e47
Signed-off-by: Chuck Jordan <cjordan@synopsys.com>
The function i2c_dw_isr() in this file appears to have the wrong
decl for the IRQ_CONNECT macro. It should be: void i2c_dw_isr(void *arg).
Also, at the 2nd use of IRQ_CONNECT there was a variable created
and then marked as UNUSED. I've removed this.
Change-Id: I3f2c4ecb5c13147d577c82a0ec4fe486ae38a475
Signed-off-by: Chuck Jordan <cjordan@synopsys.com>
Added default value for min-conf-desc-length = 1 for kconfig help.
Jira: ZEP-303
Change-Id: Ieab66a5cb76e2ab8dea4e80b056600173c333c01
Signed-off-by: Javier B Perez <javier.b.perez.hernandez@intel.com>
Add a way of finding if a microkernel task is the idle task instead of
of duplicating:
task_priority_get() == (CONFIG_NUM_TASK_PRIORITIES - 1)
which could be subject to change.
Only available for microkernel, since there is no such concept in the
nanokernel.
Change-Id: Ie8930981f1a2ac5ff16f905f4eb4e333c8b59c5d
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
Update openocd configuration file allowing to flash with make
flash for the majority of boards. Old versions still might be flashed
with zflash. This also helps debugging boards.
Change-Id: Ie9701c09e1806e0c4de39f95bd34bce9f66051cc
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
This function returns TC_FAIL and not negative value on failure.
Change-Id: I36e51e39aca07264339fc6c10a9c2b8db61b580d
Signed-off-by: Szymon Janc <ext.szymon.janc@tieto.com>
The application can return BT_ATT_ERR_AUTHORIZATION on the callback
already so there is no reason to have it as a permission as once set
it always fails.
Change-Id: Ia634e3f313993dd36c06bff48f36d4ddf1264376
Signed-off-by: Luiz Augusto von Dentz <luiz.von.dentz@intel.com>
This is no longer needed since commit:
7834061d12
Change-Id: If6436204b886d31be20c27e4f3d74a5c5a979e8c
Signed-off-by: Luiz Augusto von Dentz <luiz.von.dentz@intel.com>
Do not use a TOC, instead put all options in a table and use references.
Jira: ZEP-149
Change-Id: I23821759c64ce28241ee8260ad7cba235df72d86
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Many drivers need to start fibers whose parameters are based on user
configuration. Make it easier to specify such parameters by creating a
fiber_config structure and a wrapper to use it.
Change-Id: I26917ada71acbc676c0f32b6ee081aff7bb1d6d8
Signed-off-by: Vlad Dogaru <vlad.dogaru@intel.com>
Some ARC targets can have a data-cache. Although there is no special
instruction to clear exceptions during early init, it is necessary to
invalidate the d-cache BEFORE any data is fetched. The ARC on arduino 101
doesn't have d-cache, and will thus skip this d-cache invalidate.
Also, it is important to set the vector table base register to point to
the interrupt vector table EARLY, so that if an exception is encountered,
the correct vector table is found. Set this base only if it is found to be
different from the one compiled in to the code.
These initialization steps assure that proper exception handling
is in place during early init.
Change-Id: Ie8b5928e5813e104680a6d6510c85d32dc8ed8f3
Signed-off-by: Chuck Jordan <cjordan@synopsys.com>
The aux register named _ARC_V2_I_CACHE_BUILD can be read
to determine if the ARC has an i-cache. If it does not,
don't attempt to initialize it because this would cause an exception.
Change-Id: I3ff519befcc5ebb7745b58401f12cf3015a9e2e9
Signed-off-by: Chuck Jordan <cjordan@synopsys.com>
BTP API allows to set only advertising and scan response data without
declaring advertising type. Advertising type is deduced from current
flags status. Scan response data is static in tester - to set non
connectable mode in current BTP API scan response length must be
considered.
Change-Id: I742cd8ec774c24f317d639835844a4743bb25445
Signed-off-by: Grzegorz Kolodziejczyk <grzegorz.kolodziejczyk@tieto.com>
gatt_private should be reseted whenever used otherwise other commands
may fail when attempt to use.
Change-Id: I8bdda3d5136368a8f37fd9e2afd97e0957c4e04e
Signed-off-by: Luiz Augusto von Dentz <luiz.von.dentz@intel.com>
Some git commits have slipped into the tree with incorrect author
information. Add entries for these to .mailmap so shortlog shows them
correctly.
Change-Id: Ie60ea08bb5a94f12eeb6c3ef3010b46e1c426c43
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
This makes bt_gatt_write similar to bt_gatt_read where the parameters are
stored in a struct which can be used to store intermediate values while
the operation is in progress.
Change-Id: I3c62af137b99985690cf88dcc37a977a0be891f5
Signed-off-by: Luiz Augusto von Dentz <luiz.von.dentz@intel.com>
This makes sure LE SC are always enabled regardles of controller used.
Change-Id: I015213eb95f97793d1a1962a1cb392c652489568
Signed-off-by: Szymon Janc <ext.szymon.janc@tieto.com>
Only 8 random uint32_t digits are required by ecc_make_key function.
Change-Id: Ib0b4d6923b339828281e13b2a1d960d3bb72e65a
Signed-off-by: Szymon Janc <ext.szymon.janc@tieto.com>
Code shall not have more than 80 columns.
Change-Id: I2ba53c971be1d6936b5092d86c1e2196c100339e
Signed-off-by: Luiz Augusto von Dentz <luiz.von.dentz@intel.com>
Due to the recent changes, read parameters pointer is passed as user_data,
not as gatt_private.
Change-Id: I08b59164acfec8d71801ae2a23ce51abad080dc8
Signed-off-by: Mariusz Skamra <mariusz.skamra@tieto.com>
Revert to RPC to BLE Radio Module 0425 as it is going to be official
open source release beta.
This reverts commit a52d7d7fe0.
Change-Id: Ibdb98b26bcad0a04849e89622527884a2b67c8d4
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Add the license to the loopback driver header
Change-Id: I9cb2d93c8de6fe490912684fc3dfb20526be812d
Signed-off-by: Flavio Santes <flavio.santes@intel.com>
Comparing the Synopsys GPIO driver with the one here in Zephyr revealed
that some register symbols are missing. I am adding them now, and will
be working on getting GPIO working on ARC EM Starterkit board.
Change-Id: Ifccd1e225eb1373a31c6a5c51cf3927e42601d1a
Signed-off-by: Chuck Jordan <cjordan@synopsys.com>
The lr and sr instructions cause a pipeline bubble. There is an efficiency
to be gained if pairs of lr or sr instructions are done right next to
each other. This can avoid some stall cycles.
Also, r14 and r15 can be used with isa-16 instructions.
Change-Id: I4165365b49da910db31e0699a1a6e47114962942
Signed-off-by: Chuck Jordan <cjordan@synopsys.com>
Some ARC SOC implementations will need CONFIG_HARVARD so as to
select a different initial stack pointer (one at the top of DCCM memory),
and also to select a different linker command file that uses
ICCM and DCCM. Quark_se_ss will have HARVARD equal to n.
Change-Id: Idb7c4126866c9604e1924200ad5fdd2bc9d28269
Signed-off-by: Chuck Jordan <cjordan@synopsys.com>
The timer implementation for ARC currently requires timer0 to be present.
I've added a comment that this is an assumption and to encourage developers
to build the ARC CPU with Timer0, when it is to be used with Zephyr.
There is also an optional provision for a Timer1. In future, this
code could be conditional to use either timer.
Change-Id: I4eb3aec59ba4e85f8b70d5531b21bdaab00b93bb
Signed-off-by: Chuck Jordan <cjordan@synopsys.com>
By using isa-16 instructions, a bit of code-size can be saved,
and code can be a little faster.
Change-Id: I0567d8274372748f579610e2bd4236ce52c5d6c8
Signed-off-by: Chuck Jordan <cjordan@synopsys.com>
The ARC CPUs have several other features controlled by aux registers.
Specifically, I will be needing ones for i-cache, d-cache and various
BUILD registers that indicate which features are present.
Change-Id: If15a330f4ea5aa519655f88526fbb5f600d7cc0b
Signed-off-by: Chuck Jordan <cjordan@synopsys.com>
Nios II has no special instructions for testing bits, ffs, etc.
However, when poking memory-mapped peripherals, special *io variants
of ld and st instructions must be used to avoid issues with the
caches.
find_msb_set / find_lsb_set are implemented using universal GCC
compiler built-ins. It's not clear why this approach was not taken
on other arches.
The sys_in/sys_out/sys_io functions are completely removed as there
is no concept of these on Nios II.
sys_read/sys_write functions implemented using special GCC builtins
for the Nios II so that we don't have to use inline assembly.
Rest of the operations implemented in C, there is no requirement that
they be atomic.
Change-Id: Ic251fc7d7f342543dace4ccb3e429937b303215e
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
Although it's unclear why x86 has a different naming convention,
this scales better.
Change-Id: I939b9d4d04b1833391304700a7c12c9c8607192f
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
Now matches kernel/nanokernel/include/nano_internal.h.
Change-Id: I4dbbf50aa05c55de42100a6896fe0fa3b26955ec
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
This file is taken verbatim from the Altera Nios II HAL
source and includes various useful processor defines
and macros.
Change-Id: Idbf0b49bebe33bb5a53f5155d927bafadda9a2fe
Origin: nios2.h Altera Nios II HAL
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
