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arc: Add defines for many more useful auxiliary registers

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The ARC CPUs have several other features controlled by aux registers.
Specifically, I will be needing ones for i-cache, d-cache and various
BUILD registers that indicate which features are present.

Change-Id: If15a330f4ea5aa519655f88526fbb5f600d7cc0b
Signed-off-by: Chuck Jordan <cjordan@synopsys.com>
This commit is contained in:
Chuck Jordan 2016-05-06 11:28:24 -07:00 • committed by Anas Nashif
commit f5912a46ce
1 changed files with 35 additions and 0 deletions
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35
include/arch/arc/v2/aux_regs.h
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@ -31,15 +31,50 @@ extern "C" {
#define _ARC_V2_LP_START 0x002
#define _ARC_V2_LP_END 0x003
#define _ARC_V2_IDENTITY 0x004
#define _ARC_V2_STATUS32 0x00a
#define _ARC_V2_STATUS32_P0 0x00b
#define _ARC_V2_AUX_IRQ_CTRL 0x00e
#define _ARC_V2_IC_IVIC 0x010
#define _ARC_V2_IC_CTRL 0x011
#define _ARC_V2_IC_LIL 0x013
#define _ARC_V2_IC_IVIL 0x019
#define _ARC_V2_IC_DATA 0x01d
#define _ARC_V2_TMR0_COUNT 0x021
#define _ARC_V2_TMR0_CONTROL 0x022
#define _ARC_V2_TMR0_LIMIT 0x023
#define _ARC_V2_IRQ_VECT_BASE 0x025
#define _ARC_V2_AUX_IRQ_ACT 0x043
#define _ARC_V2_DC_IVDC 0x047
#define _ARC_V2_DC_CTRL 0x048
#define _ARC_V2_DC_LDL 0x049
#define _ARC_V2_DC_IVDL 0x04a
#define _ARC_V2_DC_FLSH 0x04b
#define _ARC_V2_DC_FLDL 0x04c
#define _ARC_V2_EA_BUILD 0x065
#define _ARC_V2_VECBASE_AC_BUILD 0x068
#define _ARC_V2_FP_BUILD 0x06b
#define _ARC_V2_DPFP_BUILD 0x06c
#define _ARC_V2_MPU_BUILD 0x06d
#define _ARC_V2_RF_BUILD 0x06e
#define _ARC_V2_MMU_BUILD 0x06f
#define _ARC_V2_VECBASE_BUILD 0x071
#define _ARC_V2_D_CACHE_BUILD 0x072
#define _ARC_V2_DCCM_BUILD 0x074
#define _ARC_V2_TIMER_BUILD 0x075
#define _ARC_V2_AP_BUILD 0x076
#define _ARC_V2_I_CACHE_BUILD 0x077
#define _ARC_V2_ICCM_BUILD 0x078
#define _ARC_V2_MULTIPLY_BUILD 0x07b
#define _ARC_V2_SWAP_BUILD 0x07c
#define _ARC_V2_NORM_BUILD 0x07d
#define _ARC_V2_MINMAX_BUILD 0x07e
#define _ARC_V2_BARREL_BUILD 0x07f
#define _ARC_V2_ISA_CONFIG 0x0c1
#define _ARC_V2_SEP_BUILD 0x0c7
#define _ARC_V2_IRQ_BUILD 0x0f3
#define _ARC_V2_PCT_BUILD 0x0f5
#define _ARC_V2_CC_BUILD 0x0f6
#define _ARC_V2_TMR1_COUNT 0x100
#define _ARC_V2_TMR1_CONTROL 0x101
#define _ARC_V2_TMR1_LIMIT 0x102