Following comments on nucleo_f411re doc, update doc for
nucleof401re
Change-Id: I86b7a016b604a31e210e425718e835e15560a46a
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
As cpu_idle.S is the only bit of code that is using the SCB asm defines,
so to allow us to remove scb.h in the future lets move the defines that
are used just into cpu_idle.S
Jira: ZEP-1568
Change-Id: I3c3a6f145ec4c1a43f076d079d5fe1694c255b78
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
A number of SoCs clear out the Mem/Bus/Usage and Hard Fault exceptions
during init. Lets refactor that into a common function so we don't have
to keep duplicating it over and over.
Change-Id: Ida908a9092db37447abcf3c9872f36937982f729
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Update Cube version for STM32L4XX family
from version: V1.5.2
to version: V1.6.0
Add support for following soc:
stm32l451xx
stm32l452xx
stm32l462xx
Change-Id: I116458ff8163f99aec5cf3965296d79728faf672
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Update Cube version for STM32F4XX family
from version: V1.13.0
to version: V1.14.0
Add support for following soc:
stm32f413xx
stm32f423xx
Change-Id: I050bdbe5980b2294955379a2ad917d25aa501578
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
This patch updates the mps2_an385 documentation adding the information
of the CMSDK (Cortex-M System Design Kit) GPIOs Pinmuxing.
Change-Id: Icab0d47bf1a58be058f036fb3db346ef6390266a
Signed-off-by: Vincenzo Frascino <vincenzo.frascino@linaro.org>
This patch fixes the UART4 base address on the ARM MPS2 platform.
Change-Id: I14bf2a4dc2378d4b2c4295a75cd68c6c895fbd60
Signed-off-by: Vincenzo Frascino <vincenzo.frascino@linaro.org>
Kill of nvic.h and use either CMSIS helper functions for NVIC or direct
NVIC register access via CMSIS for IRQ handling code.
Jira: ZEP-1568
Change-Id: If21910b9293121efe85c3c9076a1c2b475ef91ef
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Move the exception priority related defines into exc.h out of nvic.h
Change-Id: I7ded917a3f6f7cdbc506b2f70c22f37eddc5f5c7
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Replace _ScbExcPrioSet with calls to NVIC_SetPriority as it handles both
interrupt and exception priorities. We don't need to shift around the
priority values for NVIC_SetPriority.
Jira: ZEP-1568
Change-Id: Iccd68733c3f7faa82b7ccb17200eef328090b6da
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This patch updates the mps2_an385 documentation adding the information
of the new added CMSDK (Cortex-M System Design Kit) Drivers.
Change-Id: I5615ebec13e8831a0360fc32cfd8be0d3ebc85b5
Signed-off-by: Vincenzo Frascino <vincenzo.frascino@linaro.org>
This patch enables the CMSDK (Cortex-M System Design Kit) Drivers on
mps2_an385 (Cortex M3).
Change-Id: Iff51141a183ac94ad6b905acf10389ca94a451d3
Signed-off-by: Vincenzo Frascino <vincenzo.frascino@linaro.org>
This patch adds the configuration parametes required to enable CMSDK
(Cortex-M System Design Kit) Drivers at MPS2 soc level.
It provides as well the definitions for the MPS2 System Control
registers.
Change-Id: I06181dcfeb4fb887425b85ec9a99c268c857a34e
Signed-off-by: Vincenzo Frascino <vincenzo.frascino@linaro.org>
Adds initial support and documentation for the frdm_kw41z board.
- Configures the kw41 to use the 32 MHz external oscillator on the board
to generate a 40 MHz system clock. The clock settings match the MCUX
SDK hello_world example project.
- Provides pinmux settings for the uart, i2c, LEDs, and switches
- Enables pinmux, gpio, uart, and i2c driver instances
- Configures the fxos8700 accelerometer/magnetometer driver
Jira: ZEP-1390
Change-Id: I025a0eae3d380eaf90b02683acf5c592e2204a2e
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Adds initial support for the kw41z SoC. This is the first SoC in the
Kinetis W (wireless connectivity) series added to Zephyr. The kw41z
integrates a 2.4 GHz radio transceiver, BLE link layer hardware, and an
802.15.4 packet processor with an ARM Cortex M0+. It has 512 KB flash,
128 KB SRAM, and can run the system clock at up to 48 MHz.
This SoC currently has mcux shim drivers for lpuart (serial), gpio,
pinmux, i2c, and flash.
Jira: ZEP-1389
Change-Id: I8cff6d203867ba3ace7e05c36441dc8f3cbca8d8
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Renames the flash security section so it makes sense for other Kinetis
devices, not just k64. In Kinetis reference manuals, this section is
referred to as the 'flash configuration field'.
Change-Id: I2b7c7cc1ec2541419d77878d367d96c9ceb7a0cf
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Adds a shim layer around the mcux lpuart driver to adapt it to the Zephyr
serial interface.
NXP has multiple uart hardware blocks that implement different features
and have different register maps. The k64 has a uart block called
'uart', while the kw41 has a uart block called 'lpuart' (low power
uart). The MCUXpresso SDK provides separate drivers for each type of
uart block but with similar software interfaces. As a result, there are
also separate shim drivers in Zephyr. There is a 1:1:1 relationship
between hardware block, mcux driver, and mcux shim driver.
Because we now have two mcux shim drivers for the uart interface, a new
naming convention is created:
<interface>_mcux_<hw block>
Where <interface> is the name of the Zephyr interface, in this case
'uart'. This convention is not new.
<hw block> is the name of the NXP hardware block, in this case 'lpuart'.
This is the new part, and distinguishes different hardware blocks
for the same interface.
Change-Id: I3a80b9bffa116bbb2b02ee950d4bdd79a19a4edc
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
The newer version of mcux changes its flash api slightly, so update the
Zephyr shim accordingly.
Change-Id: I0c974fc3e82b9f40372c636f0b805ed143be2198
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Imports the mcux device header files and peripheral drivers for the
kw41z and its subset devices (kw31z, kw21z). The subset devices are
included since they are released together with the kw41z by nxp, and to
avoid them getting out of sync in Zephyr if they were added later.
The kw41z shares several peripheral drivers with the k64f, so those
drivers are updated to the newer version released with the kw41z.
Origin: NXP Kinetis KW41Z Connectivity Software Linux(REV 1.0.2)
URL: https://www.nxp.com/webapp/Download?colCode=KW41Z-CONNECTIVITY-SOFTWARE-LIN&appType=license&Parent_nodeId=1441226359347708902175&Parent_pageType=product
Maintained-by: External
Jira: ZEP-1389
Change-Id: Id8e87f32b7afe01605e1e05b88addc547b2f5e21
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
This reverts commit 9fb0c2af5c.
SDK 0.9 has now been released.
Change-Id: I676b6f0e31ab48fde3dda41b681abf53964ea9f9
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
The fat library uses its own typedef for integer parms and expects a
UINT to be either 16 or 32-bits in length. We potentially get into
trouble when we build with newlib if we use an uint32_t. Lets just use
unsigned int which should cover all cases for us.
Change-Id: I3dbbf4871ab65dd12488d41cb06a06387c128339
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
bytes_read should be an int, all uses of it in this sample are of type
int. Lets clean this up so when building with newlib or in the future
when uint32_t might change its definition we don't have issues.
Change-Id: Ief7bfb48948df50cec45b4707ef7676d13173f34
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
The functions that implement usb_request_handlers are already using an
int32_t for transfer_len, so lets make the typedef match. This address
a potential issue in the future when the typedef of int32_t changes (or
when building with newlib).
Change-Id: I6e478551c38f2040b0dcec47c2e4c565c27acdd0
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
There are a few arrays we use with print_number and parse_number. These
functions expect a const uint32_t so lets have the arrays for TIME_US,
KBPS, and K match.
Change-Id: I6347b06af2374d702144084bb6b538a478fb8fac
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Updated main menuconfig image
Jira: ZEP-1434
Change-Id: Ib78f65868e025a45d51f1561f7e487eda0d7dbcd
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
spi_transceive can return successfuly even if the data provided by the
slave is invalid, so check if the content is correct and retry until a
valid data is available.
Change-Id: Ia951de391e0b24c5b41eeabfb5c10b056d32b62e
Signed-off-by: Ricardo Salveti <ricardo.salveti@linaro.org>
Drop the BLUETOOTH_SPI_RX_BUFFER_SIZE and BLUETOOTH_SPI_TX_BUFFER_SIZE
config options by fixing the max SPI buffer length to 255, as used by
the X-NUCLEO-IDB04A1 BSP. This simplifies the rx/tx buffer handling, and
avoids a potential spi rx stack overflow depending on the config values
set by the user.
Change-Id: Ifa7fd086016abda4bdcf9638f28b38d001a288c5
Signed-off-by: Ricardo Salveti <ricardo.salveti@linaro.org>
This new option is used to encapsulate the logic specific to devices
implementing the BlueNRG Bluetooth stack (e.g. X-NUCLEO-IDB05A1).
The current BlueNRG specific logic covers the HCI Reset handling and
the manual control of the SPI Chip Select line (normally not needed since
spi_transceive is also responsible for controlling the SPI CS line).
Change-Id: I5db4addf873eee0af2d957e2181c50aac53ab656
Signed-off-by: Ricardo Salveti <ricardo.salveti@linaro.org>
The hci_raw version of bt_buf_get_rx was expecting an int for timeout.
Let us int32_t instead so we match both the hci_core version and the
type that net_buf_alloc expects.
This addresses a possible build issue if/when int32_t differs from our
default (ie, newlib).
Change-Id: I69374c48da8f2b96fa2bd418ff505fbaacda11f0
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Instead of using a hard-coded string, make the sample use the Kconfig
variable for the device name.
Change-Id: Ib09f594e1cba221f9064318572bd90d38bd2733a
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
Change BREDR_NAME to DEVICE_NAME so it can also be used as the LE
device name.
Change-Id: I9ef55d9dff098372d47d9d5754ad7a7163a65bc0
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
Code was assuming that all the HCI messages were events, causing invalid
data length when receiving HCL ACL packets.
Change-Id: I8c1a07f46b6b62a04e242cf29ee1119f59d4bda6
Signed-off-by: Ricardo Salveti <ricardo.salveti@linaro.org>
Added structure definition for stream end points
and the a2dp stream.
Change-Id: I6d0cc08611f5179397bea6200eb9244d7c1cc8d6
Signed-off-by: Piyush Itankar <piyush.t.itankar@intel.com>
All mandatory and most of optional PTS tests are passing.
The only not supported optional tests are sending of Test,
RPN and RLS which is not required at the moment.
Change-Id: I5a92d30c0d44803baf6c705d86f2272e4e57fd18
Signed-off-by: Jaganath Kanakkassery <jaganathx.kanakkassery@intel.com>
