Usually, we want to operate only on "available" device
nodes ("available" means "status is okay and a matching binding is
found"), but that's not true in all cases.
Sometimes we want to operate on special nodes without matching
bindings, such as those describing memory.
To handle the distinction, change various additional devicetree APIs
making it clear that they operate only on available device nodes,
adjusting gen_defines and devicetree.h implementation details
accordingly:
- emit macros for all existing nodes in gen_defines.py, regardless
of status or matching binding
- rename DT_NUM_INST to DT_NUM_INST_STATUS_OKAY
- rename DT_NODE_HAS_COMPAT to DT_NODE_HAS_COMPAT_STATUS_OKAY
- rename DT_INST_FOREACH to DT_INST_FOREACH_STATUS_OKAY
- rename DT_ANY_INST_ON_BUS to DT_ANY_INST_ON_BUS_STATUS_OKAY
- rewrite DT_HAS_NODE_STATUS_OKAY in terms of a new DT_NODE_HAS_STATUS
- resurrect DT_HAS_NODE in the form of DT_NODE_EXISTS
- remove DT_COMPAT_ON_BUS as a public API
- use the new default_prop_types edtlib parameter
Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
This commit adds basic support for nRF52820 SoC.
Changes affect introducing:
- architecuture files (dtsi)
- configuration of nrfx drivers
- adaptation of inclusions based on chosen SoC
Signed-off-by: Mieszko Mierunski <mieszko.mierunski@nordicsemi.no>
Changes:
- Added all required board files in /boards/arm/96b_aerocore2
- Modified pinmux for stm32f4
Most of the changes in this PR is based on reverse-engineering of the
PCB layout and following commits in the PX4 firmware repository for
the same board. The manufacturer does not provide and or generate
schematics and pinout tables for this board.
This PR includes almost all of the interfaces connected to the STM32
MCU, the only thing not included is the J9 and J8 headers that connect
to a 96Boards baseboard.
These headers are not vital to the functionality of the Aerocore2.
Signed-off-by: Sahaj Sarup <sahaj.sarup@linaro.org>
Add STM32F427. This is mainly aimed towards the stm32f427vi.
Changes:
- Add stm32f427 support based on previous work
done for the stm32f429.
- Rework currunt stm32f429 implimentation to now
be based on stm32f427.
- Introduce dedicated dtsi for the VI variant of both
stm32f427 and stm32f429. This is done to prevent stm32f4.dtsi
from being included twice.
Signed-off-by: Sahaj Sarup <sahaj.sarup@linaro.org>
The SAM V71 SoC configuration currently selects the `ARM_MPU` symbol
and this effectively forces MPU usage on the SoC.
This commit removes `ARM_MPU` selection from the SoC Kconfig since it
is intended to be selected by a board, and the `CPU_HAS_ARM_MPU` symbol
already indicates that the SoC supports ARM MPU.
Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
The SAM E70 SoC configuration currently selects the `ARM_MPU` symbol
and this effectively forces MPU usage on the SoC.
This commit removes `ARM_MPU` selection from the SoC Kconfig since it
is intended to be selected by a board, and the `CPU_HAS_ARM_MPU` symbol
already indicates that the SoC supports ARM MPU.
Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
Add initial support for Broadcom Viper SoC.
It has ARM Cortex-M7 and Cortex-A72 cores.
Signed-off-by: Arjun Jyothi <arjun.jyothi@broadcom.com>
Signed-off-by: Abhishek Shah <abhishek.shah@broadcom.com>
Use MSI as PLL source. This enables to run system clock at 110MHz.
To achieve this, voltage regulator should be set to scale 0.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
This patch defines the dma feature for the stm32wbXX
and the dmamux feature for the stm32wb55x
soc series from STMicroelectronics
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Add support for ADC on H7 series. Note that ADC1 and ADC2 share the same
register set, so it is added as "adc1_2".
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
All pin configuration for ATMEL SAM SoC come from devicetree so we can
now remove the soc_pinmap.h header files.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Convert i2s_sam_ssc driver to utilize devicetree. We replace Kconfig
options for specifying the DMA configuration (channel, DMA device name)
with getting that from devicetree. We also get pincfg from devicetree,
however we still have Kconfig sybmols to specify if the RF or RK pin is
enabled.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Due to a typo compiling the WWDG on the g4 family does not
work. This adds the correct include filename.
Signed-off-by: Richard Osterloh <richard.osterloh@gmail.com>
High Speed Flexcomm device that handles high speed SPI transfer are
mapped to the same High Frequency clock that the ARM core uses.
This allows for higher frequency SPI traffic.
Signed-off-by: Andrei Gansari <andrei.gansari@nxp.com>
Port the usage of the timeouts to the new timeout API, in order to be
able to deselect the legacy timeout option.
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
Convert to using DT_INST_LABEL() in the dma driver and convert dma users
to use the DMA property macros to get the dma controller name. We make
the assumption in the drivers that there is a single DMA controller
instance.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Some Kinetis SoCs have an instance of the the TPM module
that can be used for PWM control. As such, add the necessary
configurations to enable it on the SoCs that support it, as well as
enable the clock for the module to function.
In this case, the enablement is done only for the KW41Z SoCs,
but there are other SoCs that support it, f.i. KW38Z
Signed-off-by: Alex Porosanu <alexandru.porosanu@nxp.com>
Enable I2S_STM32 in the soc common part, so it will no
longer be required in board default configuration.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
Rename DT_HAS_NODE to DT_HAS_NODE_STATUS_OKAY so the semantics are
clear. As going forward DT_HAS_NODE will report if a NODE exists
regardless of its status.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
As we phase out per instance Kconfig symbols convert to utilize
DT_NODELABEL for SPI and I2C instances instead.
Also updated comments to change from FLEXCOMM8 to HSLSPI.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Remove DT_ADC_{0..2}_NAME from dts_fixup.h, if this casues the
dts_fixup.h file to be empty we remove the file as well.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Reworked sam_gmac driver to get pin ctrl/mux configuration information
from the device tree instead of via Kconfig and defines in soc_pinmap.h
We remove defines from soc_pinmap.h that are no longer needed due to
getting all that information from devicetree.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This commit adds the `devicetree.h` header inclusion in the Atmel SAM-
family SoC header files, as required by the ARM SoC conventions.
Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
This commit adds the `devicetree.h` header inclusion in the Atmel SAM0-
family SoC header files, as required by the ARM SoC conventions.
Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
Enable the driver for the Kinetis Digital-to-Analog (DAC) modules
present in the NXP Kinetis K6x SoC series.
Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
Enable the driver for the Kinetis Digital-to-Analog (DAC32) module
present in the NXP Kinetis KE1xF SoC series.
Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
Remove dts_fixup.h files that are needed anymore, remove defines that
are used, and replace defines with new DT macros.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Remove dts_fixup.h files that are not used (empty) or the defines aren't
used anymore and thus can be removed.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Remove dts_fixup.h files that are needed anymore, remove defines that
are used, and replace defines with new DT macros.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Complete STM32 conversion to new DT macros by removing
remaining occurences of DT_ST_STM32_ADC_FOO_LABEL.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Complete STM32 conversion to new DT macros by removing
remaining occurences of DT_ST_STM32_ADC_FOO_LABEL.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
