Add @abrodkin to the list of CODEOWNERS for ARC code (ARCH,
BOARDS, DTS) instead of @vonhust.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
Add an entry in CODEOWNERS for auto-assigning reviewers
in MAINTAINERS.yml and get_maintainer.py files.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
Add PL330 dma driver support, this driver
- supports 32 bit memory to memory operation
- supports 36 bit memory to memory operation
under a config flag DMA_64BIT
- supports secure channel
Signed-off-by: Raveendra Padasalagi <raveendra.padasalagi@broadcom.com>
The esp_8266 shield was added without owner on #24710. Add myself as
an owner of esp_8266 shield files.
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
The Atmel RF2xx module shield is a generic solution to enable any Atmel
AT86RF2xx IEEE 802.15.4 transceiver. This module enables IEEE 802.15.4
RF2xx Zephyr driver.
The Atmel RF2xx module shield enables any board with an Atmel Xplained,
Xplained-Pro, Arduino or MikroBus expansion header to connect to
networks operation with IEEE 802.15.4, OpenThread or any other stack
based on this media type.
The Atmel RF2xx module is configured to allow interoperate with other
medias like Ethernet. User need configure network stack properlly.
Fixes#26259.
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
Add Nuvoton numicro series UART support, currently supports
only poll mode.
UART0 clock and pincontrol are directly configured, will be
replace when clock and gpio support is added.
Signed-off-by: Saravanan Sekar <saravanan@linumiz.com>
Add initial support for nuvoton numicro m48x SoC series, basic
init and uart functionality are covered with gpio and clock
directly relies on HAL.
Signed-off-by: Saravanan Sekar <saravanan@linumiz.com>
This runs the Timer/Counter for Control in 'normal' PWM mode. The
number of channels and counter width depends on the device and is
imported from DeviceTree.
Signed-off-by: Michael Hope <mlhx@google.com>
- Support PLL for Higher Frequencies 80,160,240 MHz
- Support XTAL Frequencies 26MHz, 40MHz
- Clock Driver can't be disabled, because all of the other drivers
will depend on it to get their operating Frequency based on chosen
clock source (XTAL/PLL).
- Add needed references to BBPLL i2c bus ROM functions.
- Add `rtc` node to Device Tree.
- Since All Peripherals Frequency is depending on CPU_CLK Source,
`clock-source` property added to CPU node
Signed-off-by: Mohamed ElShahawi <ExtremeGTX@hotmail.com>
Add setup to utilize buildkite for CI purposes:
1. .buildkite/hooks/pre-command:
* Handles getting git checkout setup against upstream repo
* Setup some west module cache (dirs, clean out files & locks)
* init dir for ccache
2. .buildkite/hooks/post-command:
* Report disk usage (meant for possible debugging)
3. .buildkite/pipeline.yml [uses to determine what to do]:
* setup zephyr env vars
* set which docker container to use
(export some local disk caches for git, west modules, and ccache)
* uses plug to general build annotation on failure (junit-annotate)
4. .buildkite/run.sh [ buildkite wrapper to invoke scripts/ci/run.sh ]
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Add infineon XMC4 series UART support. Driver supports
only poll mode using XMCLib.
Out of 4 available UART's on SoC, only UART1 is confgired
by default in UART mode until GPIO & pinctrl support.
Signed-off-by: Parthiban Nallathambi <parthiban@linumiz.com>
Add infineon xmc series with XMC4500 support. XMC series comes with,
- CPU operates upto 120MHz
- 3 RAM (PSRAM1 - code, DSRAM1 - data and DSRAM2 - communiation)
- upto 1MB flash
init: clock control & gpio is not done, so SoC initialization directly
relies on HAL. Core operating clock is stored in no_init section, which
is kept under DSRAM1. Only DSRAM1 is used until clock support. Using
PSRAM1 and DSRAM1 needs adaptation in linker script - planned for next
revision.
Note: SystemInit cannot be consumed directly due to vector table +
HAL linker dependency.
Signed-off-by: Parthiban Nallathambi <parthiban@linumiz.com>
This change enables specific compiler and linker options to be used in
the case that an arch/posix/os.arch.cmake file exists.
Note: os and arch in the above case are evaluations of
CMAKE_HOST_SYSTEM_NAME and CMAKE_HOST_SYSTEM_PROCESSOR.
Otherwise, the existing "generic" compiler and linker flags in
arch/posix/CMakeLists.txt are used.
Additional flags and checks are provided in
arch/posix/Linux.aarch64.cmake.
Added scripts/user_wordsize.py to detect if userspace is 64-bit or
32-bit, which should be consistent with the value of CONFIG_64BIT
for Aarch64 on Linux.
Fixes#24842
Signed-off-by: Christopher Friedt <chrisfriedt@gmail.com>
Add a disk access driver for the stm32 sdmmc component. The driver is
based around the stm32 cube HAL and uses the blocking API.
Signed-off-by: Anthony Brandon <anthony@amarulasolutions.com>
Many chips have only one serial port. When the serial port is occupied
by other devices, there is a lack of a console to output debugging
information. Semihosting can provide a console. The disadvantage of
semihosting is that a debugger must be connected, so it can only be
used for online debugging.
Signed-off-by: ZhongYao Luo <LuoZhongYao@gmail.com>
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
Cloned from counter_basic_api with modifications based on DS3231
limitations:
* Only one device tested per board;
* Counter cannot be stopped or started;
* Alarms are serviced by worker thread, so are not invoked from ISR
and require that test thread yield to allow processing (no
k_busy_wait());
* Multiple Alarms test is disabled as documented in test.
Additional tests were added for DS3231-specific API.
Signed-off-by: Peter A. Bigot <pab@pabigot.com>
The DS3231 is an I2C real-time clock with internal temperature
compensated oscillator, maintaining civil time to 1 s precision with
nominal 2 ppm accuracy from 0-40 Cel.
The basic functionality is exposed as a counter that is always running
at 1 Hz. Much more functionality is exposed as driver-specific API,
including the ability to translate between the time scale of the DS3231
and the time scale of the Zephyr uptime clock. This allows correlation
of events in the system clock to UTC, TAI, or whatever time scale is
used to maintain the DS3231.
Signed-off-by: Peter A. Bigot <pab@pabigot.com>
This commit renames the CAN sample directory name from `CAN` to `can`
to be consistent with others.
Noting that the CAN driver test directory is named `tests/drivers/can`,
we have no excuse for naming the CAN driver sample directory
`samples/drivers/CAN`.
Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
DAC (digital to analog converter) peripheral driver with a generic API
suitable for most MCUs (only basic DAC features considered).
Signed-off-by: Martin Jäger <martin@libre.solar>
Add pinctl support for the SAM UART and SAM USART devices. We update
the UART and USART bindings to have pinctrl-0 bindings that are expected
to have 2 phandles to the RX & TX pinctrl nodes.
The pinctrl nodes will have an 'atmel,pins' property that describes the
GPIO port, pin and periphal configuration for that pin.
We add sam*-pinctrl.dtsi files with all the various pin ctrl
configuration operations supported by the given SoC family. These
files are based on data extracted from the Atmel ASF HAL
(in include/sam<FAMILY>/pio/*.h).
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This GitHub account has been disabled for over a year (it was replaced
by a `ricardosalveti` account). Remove from CODEOWNERS.
Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
This sample now supports SMP UDP transport.
Two config overlays have been added for ipv4 and ipv6, respectively.
The sample documentation has been completely revamped to be less
bluetooth focused and more general.
Signed-off-by: Mikkel Jakobsen <mikkel.aunsbjerg@prevas.dk>
Add code owners for nRF UART drivers and the corresponding Kconfig file
so that some reviewers are automatically assigned for these files.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
k_poll() for a signal is often desired for notification of completion
of asynchronous operations, but there are APIs where it may be
necessary to invoke "asynchronous" operations from contexts where
sleep is disallowed, or before the kernel has been initialized.
Extract the general notification solution from the on-off service into
a utility that can be used for other APIs.
Also move documentation out to a resource management section.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
The resource table is needed by the Linux kernel OS
for a rpmsg generic support, but is also recognised by OpenAMP.
This table allows to add trace based on the RAM console
and to support rpmsg protocol.
Signed-off-by: Arnaud Pouliquen <arnaud.pouliquen@st.com>
Fixes: #23872
Relocating Zephyr Unittest CMake package to ensure that
HINTS ${ZEPHYR_BASE} in
find_package(ZephyrUnittest HINTS ${ZEPHYR_BASE}) works correctly when
the package has not been exported to CMake user package registry.
This ensure that the new package functionality is fully backwards
compatible on systems where the package is not exported and ZEPHYR_BASE
is set.
Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
Add @nandojve, the SAM V71 platform maintainer, as a code owner for
the SAM E70 platform, as these two platforms share the same base and
are practically identical.
Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
Transfer review assignments from SebastianBoe to tejlmand.
Sebastian Bøe's role is being transferred to Torsten
Rasmussen (tejlmand).
Signed-off-by: Sebastian Bøe <sebastian.boe@nordicsemi.no>
Adding ZephyrConfig.cmake and ZephyrConfigVersion.cmake allows projects
to use find_package to locate Zephyr.
This means that it will be possible to allow users to run CMake without
the need to source zephyr-env.sh or run zephyr-env.cmd.
This is especially useful for IDEs such as Eclipse or SES, where it will
no longer be required to source the above files before launching the
IDE.
Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
This commit renames the `cortex_r` directory under the AArch32 to
`cortex_a_r`, in preparation for the AArch32 Cortex-A support.
The rationale for this renaming is that the Cortex-A and Cortex-R share
the same base design and the difference between them, other than the
MPU vs. MMU, is minimal.
Since most of the architecture port code and configurations will be
shared between the Cortex-A and Cortex-R architectures, it is
advantageous to have them together in the same directory.
Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
This adds a rather primitive driver for use with the Intra-DSP
Communication (IDC) on the DSP on certain Intel SoCs. The IDC
generates interrupts from one core to another by writing to
certain registers. This is also being utilized as
the scheduler IPI since it can interrupt other cores.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
The DSP wall clock timer on some Intel SoC is a timer driven
directly by external oscillator and is external to the CPU
core(s). It is not as fast as the internal core clock, but
provides a common and synchronized counter for all CPU cores
(which is useful for SMP).
This uses the RISCV timer as base as it is using 64-bit
counter.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Add @stephanosio as a code-owner for the tests/arch/arm
test suites, so they get auto-assigned in reviews.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
This commit adds basic testcases for sanitycheck tool using pytest.
Coverage for the sanitycheck tool is obtained using coverage tool.
Instructions are included in the README.md in
scripts/tests/sanitycheck directory.
Signed-off-by: Aastha Grover <aastha.grover@intel.com>
Michael Hope
