Split ARM and ARM64 architectures.
Details:
- CONFIG_ARM64 is decoupled from CONFIG_ARM (not a subset anymore)
- Arch and include AArch64 files are in a dedicated directory
(arch/arm64 and include/arch/arm64)
- AArch64 boards and SoC are moved to soc/arm64 and boards/arm64
- AArch64-specific DTS files are moved to dts/arm64
- The A72 support for the bcm_vk/viper board is moved in the
boards/bcm_vk/viper directory
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
This reverts commit 79d73063af.
The issue #31333 is fixed so this can be reverted to
enable tests/kernel/context to run with demand paging enabled.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Until #31333 is resolved, the periodic timer in the eviction
algorithm interacts with this test in such a way that the system
deadlocks.
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
Upcoming changes from Andrew that add a global timeout to the kernel
broke because of some voodoo behavior in the kernel/context test. It
will use arch_irq_disable() on the timer interrupt directly to prevent
interrupts and measure timekeeping in their absence. But some
architectures[1] don't reliably deliver interrupts that arrive, which
means that a running timeout that exists across this period will
result in a corrupt timeout queue.
Document that rule for architectures, move the offending test to the
end of the test suite (to minimize the chance of interacting with
other test code) and put a giant warning about the situation on it.
Long term, we may want to rework this test to do its job in other
ways.
[1] On x86, the interrupt disable happens at the IO-APIC level, while
interrupt latching and delivery is downstream in each CPU's Local
APIC. An IO-APIC masked interrupt is completely invisible to the APIC
and can never be delivered once the line goes low.
Fixes#31333
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
Until #31333 is resolved, the periodic timer in the eviction
algorithm interacts with this test in such a way that the system
deadlocks.
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
For a while now, we've had two APIC drivers. The older was preserved
initially as the new (much smaller, "new style") code didn't have
support for Quark interrupt handling. But that's long dead now. Just
remove it.
Note that this migrates the one board using this driver (acrn) to
CONFIG_APIC_TIMER instead.
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
There are now two timer drivers available for various xtensa
platforms. Select based on their driver and not the architecture.
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
Align to ticks so the first iteration sleeps long enough
(k_timer_start() rounds its duration argument down, not up,
to a tick boundary)
Fixes#28319
Signed-off-by: Alexandre Bourdiol <alexandre.bourdiol@st.com>
Work around an issue where the emulator ignores host OS
signals when inside a `wfi` instruction.
This should be reverted once this has been addressed in the
AARCH64 build of QEMU in the SDK.
See https://github.com/zephyrproject-rtos/sdk-ng/issues/255
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
The Wait For Interrupt (WFI) instruction ARM Cortex-M1 CPU does not
operate as a powersave instruction. It is always executed as a NOP.
Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
Remove all ram restrictions in kernel tests and revisit all tests and
try to make them pass on all platforms.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
... because it is (required).
This makes a difference when building with CMake and forgetting
ZEPHYR_BASE or not registering Zephyr in the CMake package registry.
In this particular case, REQUIRED turns this harmless looking log
statement:
-- Could NOT find Zephyr (missing: Zephyr_DIR)
-- The C compiler identification is GNU 9.3.0
-- The CXX compiler identification is GNU 9.3.0
-- Check for working C compiler: /usr/bin/cc
-- ...
-- ...
-- ...
-- Detecting CXX compile features
-- Detecting CXX compile features - done
CMake Error at CMakeLists.txt:8 (target_sources):
Cannot specify sources for target "app" which is not built by
this project.
... into this louder, clearer, faster and (last but not least) final
error:
CMake Error at CMakeLists.txt:5 (find_package):
Could not find a package configuration file provided by "Zephyr" with
any of the following names:
ZephyrConfig.cmake
zephyr-config.cmake
Add the installation prefix of "Zephyr" to CMAKE_PREFIX_PATH or set
"Zephyr_DIR" to a directory containing one of the above files. If
"Zephyr" provides a separate development package or SDK, be sure it
has been installed.
-- Configuring incomplete, errors occurred!
Signed-off-by: Marc Herbert <marc.herbert@intel.com>
Because the sleep instruction issue for nsim_hs_smp, idle
loop is used to simulate behavior of sleep, so arch_cpu_idle will
forever loop. This causes cpu idle test loop, then the whole
context test timeouts.
as a fix, skip the cpu_idle test for nsim_hs_smp now.
Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
The commit b7e363661d added an additional
busy wait call in the `busy_wait_thread` function -- effectively making
the minimum time required for the thread to exit twice that of the
original implementation.
This commit updates the busy wait thread completion timeout to reflect
that change.
Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
Set the TICK_IRQ on litex and rv32m1 based on DT_IRQN(). For litex we
use DT_NODELABEL(timer0) and on rv32m1 we use DT_ALIAS(system_lptmr) to
determine the timer device.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Kernel timeouts have always been a 32 bit integer despite the
existence of generation macros, and existing code has been
inconsistent about using them. Upcoming commits are going to make the
timeout arguments opaque, so fix things up to be rigorously correct.
Changes include:
+ Adding a K_TIMEOUT_EQ() macro for code that needs to compare timeout
values for equality (e.g. with K_FOREVER or K_NO_WAIT).
+ Adding a k_msleep() synonym for k_sleep() which can continue to take
integral arguments as k_sleep() moves away to timeout arguments.
+ Pervasively using the K_MSEC(), K_SECONDS(), et. al. macros to
generate timeout arguments.
+ Removing the usage of K_NO_WAIT as the final argument to
K_THREAD_DEFINE(). This is just a count of milliseconds and we need
to use a zero.
This patch include no logic changes and should not affect generated
code at all.
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
Using find_package to locate Zephyr.
Old behavior was to use $ENV{ZEPHYR_BASE} for inclusion of boiler plate
code.
Whenever an automatic run of CMake happend by the build system / IDE
then it was required that ZEPHYR_BASE was defined.
Using ZEPHYR_BASE only to locate the Zephyr package allows CMake to
cache the base variable and thus allowing subsequent invocation even
if ZEPHYR_BASE is not set in the environment.
It also removes the risk of strange build results if a user switchs
between different Zephyr based project folders and forgetting to reset
ZEPHYR_BASE before running ninja / make.
Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
We update README file to correct the text for k_cpu_idle
testing, since now we cover the test for both tickless
and non-tickless kernel configuration.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
We fix the kernel.context test, so it tests the
implementation of k_cpu_idle for tickless kernel.
As most platforms now support tickless kernel by
default, this extension of the test is essential
to get coverage on k_cpu_idle() API.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
The `xlnx,ttcps` binding, despite having the file name of
`xlnx,ttcps.yaml`, had the compatible property of `cdns,ttc`.
While it is true that the Xilinx ZynqMP platform embeds the Cadence
Triple Timer Counter (TTC) IP core, its TTC differs from the original
Cadence core in that it implements 32-bit counters, instead of the
16-bit counters defined in the original; hence, the Xilinx variant is
not compatible with the original Cadence version and should be treated
as a different device.
This commit changes the `xlnx,ttcps.yaml` compatible property to
`xlnx,ttcps` for the above reasons.
Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
The `tests/kernel/context` test fails for the `qemu_cortex_r5` when the
icount emulation mode is used, because the Xilinx QEMU ignores the WFI
instruction when the icount parameter is specified.
This will be fixed in the Zephyr SDK 0.11.3 and this commit must be
reverted once the CI is updated to use this new SDK version.
For more details, see zephyrproject-rtos/sdk-ng#191.
Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
ARM cores may have a per-core architected timer, which provides per-cpu
timers, attached to a GIC to deliver its per-processor interrupts via
PPIs. This is the most common case supported by QEMU in the virt
platform.
This patch introduces support for this timer abstracting the way the
timer registers are actually accessed. This is needed because different
architectures (for example ARMv7-R vs ARMv8-A) use different registers
and even the same architecture (ARMv8-A) can actually use different
timers (ELx physical timers vs ELx virtual timers).
So we introduce the common driver here but the actual SoC / architecture
/ board must provide the three helpers (arm_arch_timer_set_compare(),
arm_arch_timer_toggle(), arm_arch_timer_count()) using an header file
imported through the arch/cpu.h header file.
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
The seasonal overhaul of test identifiers aligning the terms being used
and creating a structure. This is hopefully the last time we do this,
plan is to document the identifiers and enforce syntax.
The end-goal is to be able to generate a testsuite description from the
existing tests and sync it frequently with the testsuite in Testrail.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Mark the old time conversion APIs deprecated, leave compatibility
macros in place, and replace all usage with the new API.
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
After run Sanitycheck script I found out that test cases
had the same test case name in the test result .xml file.
For board itodk in .xml file was duplicated kernel.common test.
To get rid of it, I decided to change test cases names
for the kernel tests, contained name kernel.common.
Now only one test has kernel.common test name,
and will be no duplicated test cases names in the future.
Signed-off-by: Maksim Masalski <maksim.masalski@intel.com>
Re-run with updated script to convert integer literal delay arguments
to k_thread_create and K_THREAD_DEFINE to use the standard timeout
macros.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Disabling SMP mode for certain tests was a one-release thing, done to
avoid having to triage every test independently (MANY are not
SMP-safe), and with the knowledge that it was probably hiding bugs in
the kernel.
Turn it on pervasively. Tests are treated with a combination of
flagging specific cases as "1cpu" where we have short-running tests
that can be independently run in an otherwise SMP environment, and via
setting CONFIG_MP_NUM_CPUS=1 where that's not possible (which still
runs the full SMP kernel config, but with only one CPU available).
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
This driver was still using CONFIG_* values to determine its address,
IRQ, etc. Add a binding for an "intel,hpet" device and migrate this
driver to devicetree.
Fixes: #18657
Signed-off-by: Charles E. Youse <charles.youse@intel.com>
These two tests were right at the knife edge of 16kb
on riscv64, and were not building with logging enabled
on that platform.
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
With the upcoming riscv64 support, it is best to use "riscv" as the
subdirectory name and common symbols as riscv32 and riscv64 support
code is almost identical. Then later decide whether 32-bit or 64-bit
compilation is wanted.
Redirects for the web documentation are also included.
Then zephyrbot complained about this:
"
New files added that are not covered in CODEOWNERS:
dts/riscv/microsemi-miv.dtsi
dts/riscv/riscv32-fe310.dtsi
Please add one or more entries in the CODEOWNERS file to cover
those files
"
So I assigned them to those who created them. Feel free to readjust
as necessary.
Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
The sleep test was checking that the sleep took no longer than "2
ticks" longer than requested. But "2 ticks" for fast tick rate
configurations can be "zero ms", and for aliasing reasons it's always
possible to delay for 1 unit more than requested (becuase you can
cross a millisecond/tick/whatever boundary in your own code on either
side of the sleep). So that "slop" value needs to be no less than
1ms.
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
Test needs trivial modification to account for new APIC timer code.
Eventually CONFIG_APIC_TIMER_IRQ, CONFIG_LOAPIC_TIMER_IRQ, etc. will
be consolidated into one CONFIG_TIMER_IRQ to reduce the noise a bit.
Signed-off-by: Charles E. Youse <charles.youse@intel.com>
The Quark D2000 is the only x86 with an MVIC, and since support for
it has been dropped, the interrupt controller is orphaned. Removed.
Signed-off-by: Charles E. Youse <charles.youse@intel.com>
We missed converting DT_OPENISA_RV32M1_LPTMR_SYSTEM_LPTMR_IRQ to
DT_OPENISA_RV32M1_LPTMR_SYSTEM_LPTMR_IRQ_0.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Using void pointers as universal arguments is widely used. However, when
compiling a 64-bit target, the compiler doesn't like when an int is
converted to a pointer and vice versa despite the presence of a cast.
This is due to a width mismatch between ints (32 bits) and pointers
(64 bits). The trick is to cast to a widening integer type such as
intptr_t and then cast to
void*.
When appropriate, the INT_TO_POINTER macro is used instead of this
double cast to make things clearer. The converse with POINTER_TO_INT
is also done which also serves as good code annotations.
While at it, remove unneeded casts to specific pointer types from void*
in the vicinity, and move to typed variable upon function entry to make
the code cleaner.
Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
Add LiteX timer driver with bindings for this device.
Signed-off-by: Filip Kokosinski <fkokosinski@internships.antmicro.com>
Signed-off-by: Mateusz Holenko <mholenko@antmicro.com>
