Commit graph

7,138 commits

Author SHA1 Message Date
Ioannis Glaropoulos
ce0dcea4b1 soc: arm: remove redundant CPU_CORTEX_M selection
CPU_CORTEX_M does not need to be selected by Kconfig
symbols that already select a CORTEX_M variant.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2019-04-25 23:09:23 -07:00
Sören Tempel
5311a7d7be soc/riscv32-fe310: add label for uart1
Without this label cmake fails when attempting to enable this uart.

Signed-off-by: Sören Tempel <soeren+git@soeren-tempel.net>
2019-04-25 09:19:14 -07:00
Habib Zaid
32367c0dfc soc: arm: stm32: Updated SRAM Region Definitions
This updates the SRAM region definition for stm32

Signed-off-by: Habib Zaid <habibzaid@gmail.com>
2019-04-24 11:06:41 -05:00
Charles E. Youse
6fc655351c drivers/gpio/gpio_intel_apl: remove dependency on shared interrupts
The GPIO driver for the Intel Apollo Lake has so many pins it has to
export ten devices to shoehorn its one device into the GPIO API. The
current implementation uses the shared IRQ driver because these
pseudodevices all share one IRQ. However, since the GPIO driver is
aware of all the possible interrupt sources, it's smaller and faster
(and not even messy) to handle it internally, so this patch eliminates
the dependency on the shared IRQ driver.

Signed-off-by: Charles E. Youse <charles.youse@intel.com>
2019-04-23 09:10:00 -07:00
Manivannan Sadhasivam
b31adf2d33 drivers: i2c: Add STM32L1X I2C support
Add I2C support for STM32L1X SoC series based on I2C_STM32_V1
driver.

Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
2019-04-22 08:54:18 -05:00
Manivannan Sadhasivam
0525019b23 drivers: interrupt_controller: Add STM32L1X EXTI support
Add EXTI support for STM32L1X SoC series.

Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
2019-04-22 08:54:18 -05:00
Manivannan Sadhasivam
1eb6177e9b drivers: gpio: Add STM32L1X GPIO support
Add GPIO driver support for STM32L1X SoC series.

Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
2019-04-22 08:54:18 -05:00
Manivannan Sadhasivam
43e56a93bb soc: arm: stm32: stm32l1: Add UART support
Add UART support for STM32L1 series SoCs.

Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
2019-04-22 08:54:18 -05:00
Manivannan Sadhasivam
c8b0a8d41f drivers: clock_control: Add STM32L1X clock support
Add clock support for STM32L1X SoC series.

Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
2019-04-22 08:54:18 -05:00
Manivannan Sadhasivam
92ac6d8fc6 soc: arm: st_stm32: Add STM32L1 SoC series
Add STM32L1 SoC series support with STM32L15XXB as the target
SoC.

Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
2019-04-22 08:54:18 -05:00
Erwan Gouriou
1847426f32 dts/arm/st: Add serial nodes on stm32wb
Add USART1 and LPUART1 nodes on stm32wb series.
Only these 2 ones are available for now on this series.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2019-04-19 14:19:44 -05:00
Erwan Gouriou
eb51ea00b0 soc/arm/st_stm32: stm32wb: Add gpio support
Add GPIO support to stm32wb series.
Only ABCDE and H ports are available for now on this series.
Accordingly, update series dtsi file.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2019-04-19 14:19:44 -05:00
Erwan Gouriou
b11289997f drivers/clock_control: Add support to stm32wb series
Add support to stm32wb series in stm32 clock_control driver.
Ip is similar to stm32l4 one but AHB bus presacler is renamed
to "CPU1" and CPU2 and AHB4 prescalers should be defined.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2019-04-19 14:19:44 -05:00
Erwan Gouriou
6347b87e8f soc/arm/st_stm32: Add support for stm32wb soc
Provide basic soc configuration for STM32WB SoCs support in Zephyr.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2019-04-19 14:19:44 -05:00
Arnaud Pouliquen
776671c7eb drivers/interrupt_controller: stm32: add support of stm32mp1
Add support of the stm32mp1 gpio exti.

Signed-off-by: Arnaud Pouliquen <arnaud.pouliquen@st.com>
2019-04-19 12:05:27 -05:00
Arnaud Pouliquen
e0afd7e580 soc: stm32: add initial soc support for stm32mp1 family
Add the initial SoC support for the STM32MP1 family. The code was
tested on STM32MP157c, but should work on any STM32MP1XX currently
available.

Signed-off-by: Arnaud Pouliquen <arnaud.pouliquen@st.com>
2019-04-19 12:05:27 -05:00
Ioannis Glaropoulos
bb35bb8ad5 soc: arm: sam3x: minor fixes in soc.h and arm_mpu_regions.c
Force soc.h to include the headers generated automatically
by DTS. In addition, force arm_mpu_regions.c to include
misc/slist.h for ARRAY_SIZE() macro. arm_mpu_regions.c
does not need to include soc.h (it is included indirectly
via arm_mpu.h)

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2019-04-18 17:43:26 -04:00
Ryan QIAN
f44514d1e4 arch: arm: nxp: imxrt1015: add device support
- Add SoC information for RT1015

Signed-off-by: Ryan QIAN <jianghao.qian@nxp.com>
2019-04-18 16:11:34 -05:00
Henrik Brix Andersen
8a4dbb5b03 drivers: i2c: rv32m1: add I2C driver for the RV32M1 RI5CY SoC
Add driver and device tree binding for the Low Power Inter-Integrated
Circuit (LPI2C) controllers found in the RV32M1 RI5CY SoC.

Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
2019-04-18 16:04:23 -05:00
Karl Zhang
13dfeba5bd arm: V2M Musca B1: Add Musca B1 SoC and board support
Musca B1 is a Cortex-M33 based SoC.

Signed-off-by: Karl Zhang <karl.zhang@linaro.org>
2019-04-18 13:25:50 -05:00
William Fish
cc15b9ced3 soc: nordic_nrf: MPU temperature sensor default
Consistency: nrf51 & 52 SOC set temp sensor as default if SENSOR=y

Signed-off-by: William Fish <william.fish@manulytica.com>
2019-04-18 12:25:51 -04:00
Ulf Magnusson
7fdb525754 kconfig: Use 'default' instead of 'def_bool' in Kconfig.defconfig files
Same deal as in commit 4638652214 ("Kconfig: Use 'default' instead of
'def_bool' in Kconfig.defconfig files"), fixing new stuff that got
introduced since then.

Some symbols, like ALTERA_AVALON_PIO, are only defined in
Kconfig.defconfig files, and so need the def_bool.

Motivation (from the note at the end of
guides/kconfig/index.html#common-shorthands):

For a symbol defined in multiple locations (e.g., in a Kconfig.defconfig
file in Zephyr), it is best to only give the symbol type for the "base"
definition of the symbol, and to use 'default' (instead of 'def_<type>'
value) for the remaining definitions. That way, if the base definition
of the symbol is removed, the symbol ends up without a type, which
generates a warning that points to the other definitions. That makes the
extra definitions easier to discover and remove.

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2019-04-18 12:20:49 -04:00
Kwon Tae-young
a7199b757d soc: st: add STM32F415RG
This commit adds support for STM32F415RG.

Signed-off-by: Kwon Tae-young <tykwon@m2i.co.kr>
2019-04-18 11:12:16 -05:00
Alexander Wachter
78714b4ff4 boards: arm: nucleo_f746zg: Activate CAN on nucleo F746zg
This commit adds CAN support for nucleo F746zg.
Furtermore CAN was added in stm32f7.dtsi and pinmuc_stm32f7.h
CAN_RX: PD0, CAN_TX: PD1

Signed-off-by: Alexander Wachter <alexander.wachter@student.tugraz.at>
2019-04-18 09:23:20 -04:00
Ulf Magnusson
9964cf29ac kconfig: Add missing quotes after 'source' and 'menu'
Missing quotes are accepted in some places for compatibility with the C
tools, e.g.

  source no/quotes/Kconfig
  menu Title

It looks broken though. Fix the two places in Zephyr that skip the
quotes. A style warning will be added.

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2019-04-18 08:46:15 -04:00
Georgij Cernysiov
04da64db76 drivers: serial: stm32: dts binding, and fixup for flow control
Allows to enable initial RTS/CTS hardware flow control
in the dts.

Co-authored-by: Benoit Leforestier <benoit.leforestier@gmail.com>
Signed-off-by: Georgij Cernysiov <g.cernysiov@elco-automation.de>
2019-04-17 16:09:54 -05:00
Ioannis Glaropoulos
51a563dc7d soc: arm: sam3x: add MPU capability
Add Memory Protection (MPU) capability to the Atmel SAM3X SoC.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2019-04-17 15:03:32 -04:00
Charles E. Youse
e039053546 uart/ns16550, drivers/pcie: add PCI(e) support
A parallel PCI implementation ("pcie") is added with features for PCIe.
In particular, message-signaled interrupts (MSI) are supported, which
are essential to the use of any non-trivial PCIe device.

The NS16550 UART driver is modified to use pcie.

pcie is a complete replacement for the old PCI support ("pci"). It is
smaller, by an order of magnitude, and cleaner. Both pci and pcie can
(and do) coexist in the same builds, but the intent is to rework any
existing drivers that depend on pci and ultimately remove pci entirely.

This patch is large, but things in mirror are smaller than they appear.
Most of the modified files are configuration-related, and are changed
only slightly to accommodate the modified UART driver.

Deficiencies:

64-bit support is minimal. The code works fine with 64-bit capable
devices, but will not cooperate with MMIO regions (or MSI targets) that
have high bits set. This is not needed on any current boards, and is
unlikely to be needed in the future. Only superficial changes would
be required if we change our minds.

The method specifying PCI endpoints in devicetree is somewhat kludgey.
The "right" way would be to hang PCI devices off a topological tree;
while this would be more aesthetically pleasing, I don't think it's
worth the effort, given our non-standard use of devicetree.

Signed-off-by: Charles E. Youse <charles.youse@intel.com>
2019-04-17 10:50:05 -07:00
Josef Gajdusek
29ffcae80c drivers: usb_dc_stm32: Make pin remapping part of the device tree
The SYSCFG_CFGR1_PA11_PA12_RMP define is present even on packages where
the remap isn't strictly required. This commit makes the remap optional
based on a DT property.

Also fixes syntax error caused by a missing );.

Signed-off-by: Josef Gajdusek <atx@atx.name>
2019-04-17 09:58:09 -05:00
Charles E. Youse
468df5390e soc/x86/apollo_lake: strip leading zeros from decimal constants
Remove leading zeros from decimal constants, because long live octal.

Fixes: #15463

Signed-off-by: Charles E. Youse <charles.youse@intel.com>
2019-04-15 20:42:42 -04:00
Daniel Leung
7fe29dcee9 soc: intel_s1000: change cached regions to write-through
The i2s_cavs.c driver manipulates cache lines before commencing
any DMA transfers. With write-back cache, if the DMA receive
buffer is not aligned to the cache lines, the data around
the buffer will be invalidated and may never written to memory.
Since the driver takes an external memory slab as buffer and
there is no easy way to force cache line alignment on
the application side, set the cached region to write-through
to avoid potential issue.

Fixes #13223

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2019-04-12 17:59:06 -04:00
Anas Nashif
3ae52624ff license: cleanup: add SPDX Apache-2.0 license identifier
Update the files which contain no license information with the
'Apache-2.0' SPDX license identifier.  Many source files in the tree are
missing licensing information, which makes it harder for compliance
tools to determine the correct license.

By default all files without license information are under the default
license of Zephyr, which is Apache version 2.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-04-07 08:45:22 -04:00
Andrew Boie
4e5c093e66 kernel: demote K_THREAD_STACK_BUFFER() to private
This macro is slated for complete removal, as it's not possible
on arches with an MPU stack guard to know the true buffer bounds
without also knowing the runtime state of its associated thread.

As removing this completely would be invasive to where we are
in the 1.14 release, demote to a private kernel Z_ API instead.
The current way that the macro is being used internally will
not cause any undue harm, we just don't want any external code
depending on it.

The final work to remove this (and overhaul stack specification in
general) will take place in 1.15 in the context of #14269

Fixes: #14766

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2019-04-05 16:10:02 -04:00
Patrik Flykt
fd42bf7443 soc: Rename reserved function names
Rename reserved function names in the soc/ subdirectory.

Signed-off-by: Patrik Flykt <patrik.flykt@intel.com>
2019-04-03 17:31:00 -04:00
Patrik Flykt
5aecf9db37 boards: Rename reserved function names
Rename reserved function names in the boards/ subdirectory.

Signed-off-by: Patrik Flykt <patrik.flykt@intel.com>
2019-04-03 17:31:00 -04:00
Patrik Flykt
7c0a245d32 arch: Rename reserved function names
Rename reserved function names in arch/ subdirectory. The Python
script gen_priv_stacks.py was updated to follow the 'z_' prefix
naming.

Signed-off-by: Patrik Flykt <patrik.flykt@intel.com>
2019-04-03 17:31:00 -04:00
Wayne Ren
0734b4fcaa board: nsim_em: fix the bug in nsim host timer
* the nsim host timer does not work as expected,
  disable it, use cycle count to simulate timer tick

* optmize the freq definition of nsim_em

Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
2019-04-02 17:39:25 -04:00
Wayne Ren
d6870e408a board: emsk: fix the ddr related definitons
* add ddr fixup in dts_fixup.h
* use DT_DDR_XXX in linker.ld

Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
2019-03-29 09:37:43 -04:00
Patrik Flykt
24d71431e9 all: Add 'U' suffix when using unsigned variables
Add a 'U' suffix to values when computing and comparing against
unsigned variables.

Signed-off-by: Patrik Flykt <patrik.flykt@intel.com>
2019-03-28 17:15:58 -05:00
Piotr Zięcik
bd24b31139 Revert "soc: arm: nordic: provide custom busy_wait implementations"
This reverts commit d4b4b99272 as it
introduced unwanted side effect: It moved the k_busy_wait() to other
clock that the one driving system timer and k_cycle_get_32(). As result,
delays created using these interfaces not matched each other.

Signed-off-by: Piotr Zięcik <piotr.ziecik@nordicsemi.no>
2019-03-28 15:09:32 -05:00
Mieszko Mierunski
7700322961 dts: nrf: Add DPPIC to device tree.
Add DPPIC to dts. Add HAS_HW_NRF_DPPIC to nrf91 soc.

Signed-off-by: Mieszko Mierunski <mieszko.mierunski@nordicsemi.no>
2019-03-28 09:30:57 -04:00
Maureen Helm
5cdbd39e33 soc: nxp_imx: Configure NUM_IRQS independently for each rt soc
Not all i.mx rt socs have the same number of irqs, so move the default
configuration from the soc series level to the individual socs. The
rt1020 hardware reference manual (IMXRT1020RM Rev.1 12/2018) incorrectly
documents 160 irqs (#142-159 reserved), but the soc actually has 142
irqs.

Fixes tests/kernel/gen_isr_table for the mimxrt1020_evk board.

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2019-03-26 22:16:47 -04:00
Piotr Mienkowski
a3082e49a1 power: modify HAS_STATE_SLEEP_ Kconfig options
Add SYS_POWER_ prefix to HAS_STATE_SLEEP_, HAS_STATE_DEEP_SLEEP_
options to align them with names of power states they control.
Following is a detailed list of string replacements used:
s/HAS_STATE_SLEEP_(\d)/HAS_SYS_POWER_STATE_SLEEP_$1/
s/HAS_STATE_DEEP_SLEEP_(\d)/HAS_SYS_POWER_STATE_DEEP_SLEEP_$1/

Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
2019-03-26 13:27:55 -04:00
Piotr Mienkowski
17b08ceca5 power: clean up system power managment function names
This commit cleans up names of system power management functions by
assuring that:
- all functions start with 'sys_pm_' prefix
- API functions which should not be exposed to the user start with '_'
- name of the function hints at its purpose

Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
2019-03-26 13:27:55 -04:00
Piotr Mienkowski
204311d004 power: rename Low Power States to Sleep States
There exists SoCs, e.g. STM32L4, where one of the low power modes
reduces CPU frequency and supply voltage but does not stop the CPU. Such
power modes are currently not supported by Zephyr.

To facilitate adding support for such class of power modes in the future
and to ensure the naming convention makes it clear that the currently
supported power modes stop the CPU this commit renames Low Power States
to Slep States and updates the documentation.

Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
2019-03-26 13:27:55 -04:00
Ulf Magnusson
735de5fc38 soc: kconfig: Simplify SOC_*_LD deps. with an 'if'
'if FOO' is equivalent to adding 'depends on FOO' to each item within
the 'if'.

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2019-03-26 07:56:39 -05:00
Ulf Magnusson
056199d5a1 kconfig: Remove blank line at end of Kconfig file
This one got away in
https://github.com/zephyrproject-rtos/zephyr/pull/14452. Didn't spot
there were two blank lines.

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2019-03-26 07:56:09 -05:00
Ulf Magnusson
19626892b5 kconfig: Replace two leftover 'gsource' with 'source'
Plain 'source' is globbing. 'gsource' is a leftover from an older
design, and works as a synonym for 'source'.

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2019-03-26 07:55:35 -05:00
Wayne Ren
62da238571 board: emsk: fix the wrong info about DDR
DDR's info should come from DT_MMIO_SRAM_0

Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
2019-03-22 08:35:26 -05:00
Daniel Leung
71b4137d30 adc: overhaul adc_dw and rename it to adc_intel_quark_se_c1000_ss
Since commit 0906a51dac, the driver
fails the test: tests/drivers/adc/adc_api. Some of the workflow
turns out to be incorrect (e.g. not doing dummy conversion after
getting out of deep power down, and not clearing interrupt status
bits). So take some time to overhaul the driver. Also rename
the driver to adc_intel_quark_se_c1000_ss because the inner
working of this driver is tied to Quark SE C1000 SoC.

Fixes: #12632

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2019-03-20 18:11:33 -07:00