For !TRACING, most arch_cpu_idle and arch_cpu_atomic_idle implementation
relies on the fact that there's weak stub implementations in
subsys/tracing/tracing_none.c, this works, but the arch_cpu_idle sits in
hot code path, so we'd better to make it as efficient as possible.
Take the riscv implementation for example,
Before the patch:
80000a66 <arch_cpu_idle>:
80000a66: 1141 addi sp,sp,-16
80000a68: c606 sw ra,12(sp)
80000a6a: 37c5 jal 80000a4a <sys_trace_idle>
80000a6c: 10500073 wfi
80000a70: 3ff1 jal 80000a4c <sys_trace_idle_exit>
80000a72: 47a1 li a5,8
80000a74: 3007a073 csrs mstatus,a5
80000a78: 40b2 lw ra,12(sp)
80000a7a: 0141 addi sp,sp,16
80000a7c: 8082 ret
NOTE: the sys_trace_idle and sys_trace_idle_exit are just stubs when
!TRACING
after the patch:
80000a62 <arch_cpu_idle>:
80000a62: 10500073 wfi
80000a66: 47a1 li a5,8
80000a68: 3007a073 csrs mstatus,a5
80000a6c: 8082 ret
Signed-off-by: Jisheng Zhang <jszhang@kernel.org>
With -Hccm, the linker automatically moves stuff in RODATA
section into DATA section. Our current kobject related
scripts cannot accommodate this, resulting in space not
being reserved correctly. So for now, disable -Hccm
compiler option if userspace is enabled.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
The ARC IoT SoC (used on iotdk board) has a hardware limitation where
entering CPU sleep mode causes some peripherals (e.g., UART) to lose
power, preventing the board from waking up via peripheral interrupts.
Add a configurable custom CPU idle option (CONFIG_ARC_IOT_CUSTOM_CPU_IDLE)
that enables interrupts without executing the sleep instruction. This
allows the system to remain responsive while keeping peripherals powered.
The option defaults to disabled (n) to preserve normal CPU sleep behavior
for most use cases. Tests that require continuous UART operation during
idle (pytest/shell harnesses) can enable it via platform-specific
extra_configs.
This approach allows timer-based idle to work correctly by default while
providing a workaround for tests that need UART retention.
Signed-off-by: Mohamed Moawad <moawad@synopsys.com>
Add explicit PMP_GRANULARITY default value of 8 to RMX SoC configuration.
This makes the PMP configuration more explicit and easier to understand.
No functional change as RISCV_PMP was already enabled and PMP_GRANULARITY
already defaulted to this value.
Signed-off-by: Afonso Oliveira <afonsoo@synopsys.com>
Uses shorter names for the RMX SOC configuration.
Changes:
- SOC_SERIES_NSIM_ARC_V_RMX -> SOC_SERIES_RMX
- SOC_NSIM_ARC_V_RMX100 -> SOC_RMX100
Also updates board Kconfig to use the shorter names.
Signed-off-by: Afonso Oliveira <afonsoo@synopsys.com>
Add device tree binding file for the Synopsys ARC-V RMX RISC-V
CPU core. This binding enables proper device tree property parsing by
the Enhanced Device Tree (EDT) system, allowing Kconfig device tree
macros to access CPU properties like clock-frequency.
The binding includes the standard RISC-V CPU properties by extending
riscv,cpus.yaml, which provides access to properties defined in cpu.yaml
such as clock-frequency.
Also removes hardcoded SYS_CLOCK_HW_CYCLES_PER_SEC from board level
and adds DT-derived value to RMX SoC level.
Signed-off-by: Afonso Oliveira <afonsoo@synopsys.com>
Remove CONFIG_SOC_SERIES_NSIM_ARC_V_RMX conditional check from
zephyr_compile_options_ifdef and apply all extensions
unconditionally when using arcmwdt compiler.
Since this CMakeLists.txt is already SoC-specific, the
additional config check is redundant.
Signed-off-by: Afonso Oliveira <afonsoo@synopsys.com>
Rename SOC configuration symbols from generic names to more specific
ones that include the vendor and platform information. This improves
clarity and prevents potential naming conflicts.
Changes:
- SOC_SERIES_RMX -> SOC_SERIES_NSIM_ARC_V_RMX
- SOC_RMX100 -> SOC_NSIM_ARC_V_RMX100
Signed-off-by: Afonso Oliveira <afonsoo@synopsys.com>
Do not use the custom buildlib configuration for the RMX series as it
was replaced with several even more specific configurations in the
recent MWDT release. Pass the generic RMX option to the linker instead.
Signed-off-by: Ilya Tagunov <Ilya.Tagunov@synopsys.com>
Introduce `CONFIG_RISCV_GP_PURPOSE` choice to make sure that only
one of `CONFIG_RISCV_GP` or `CONFIG_RISCV_CURRENT_VIA_GP` can be
enabled, instead of relying of dependencies.
To do that, introduce a new
`CONFIG_RISCV_SOC_HAS_GP_RELATIVE_ADDRESSING` that can be selected
by SoC when it implemented global pointer (GP) initialization for
relative addressing in its linker.
`CONFIG_RISCV_GP` will be the default choice when
`CONFIG_RISCV_SOC_HAS_GP_RELATIVE_ADDRESSING=y`
Signed-off-by: Yong Cong Sin <ycsin@meta.com>
Signed-off-by: Yong Cong Sin <yongcong.sin@gmail.com>
The commit introduced regression for hsdk4xd platform.
The hsdk4xd SoC setup from soc_early_asm_init_percpu need to be done
in early code before any C code execution.
The current approach has multiple issues
- we call function (which can be easily implemented in C for
this or other SoC) from the place where we haven't setup stack
pointer (so we can't use stack) - which is very error-prone
- we never return back from soc_reset_hook on hsdk4xd platform
So let's just revert it for now. If any other ARC SoC need to use
soc_reset_hook - than it can be implemented properly.
This reverts commit 8c32a82e47.
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Evgeniy Paltsev <PaltsevEvgeniy@gmail.com>
Use generic hook infrastrucutre instead of custom Kconfig and hooks for
ARC.
Replace soc_early_asm_init_percpu() with platform_reset()
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
After recent nsim SoCs & boards reorganization the SOC_SERIES_*
config is missing for vpx5 SoC which leads to cmake errors
when building against nsim/nsim_vpx5 configuration.
Fix that and align soc series name in soc.yml
Signed-off-by: Evgeniy Paltsev <PaltsevEvgeniy@gmail.com>
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Add RV PMP to the SoC configuration and to simulator options
Signed-off-by: Evgeniy Paltsev <PaltsevEvgeniy@gmail.com>
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
This PR adds support for new Synopsys nSIM RMX100 platform.
New platform based on RISC-V ISA instead of classic ARC.
Signed-off-by: Nikolay Agishev <agishev@synopsys.com>
Change source tree organization for Synopsys nSIM platform.
Classical ARC architectures arc_v2 arc_v3 moved to arc_classic
SoC and boards family.
nSIM SoCs were separated regarding series: EM, HS, SEM, VPX2.
This PR sould be seeing as the preparation for
addition new nSIM platform based on the RISC-V architecture.
Signed-off-by: Nikolay Agishev <agishev@synopsys.com>
Align SYS_CLOCK_HW_CYCLES_PER_SEC with other SMP nSIM
configurations and set it to 1000000.
This significantly reduce verification time on HS5x platforms.
Signed-off-by: Evgeniy Paltsev <PaltsevEvgeniy@gmail.com>
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Replaces inaccurate or wrong vendor prefixes in board and soc
folder names with those from thr vendor prefix file
Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
