Fix alignment fo the cbprintf package withing the log message.
Aligning tests to pass.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
Since the CAN header file is included directly by application code,
an application developer including this file and only applying
-Wextra to the application source files will see many warnings.
Signed-off-by: Pete Dietl <petedietl@gmail.com>
Fix STM32 clock dt-bindings location as they were added during
the shift of bt-bindings location from include to include/zephyr.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Since gpio_dt_spec is finally available within spi_cs_control
struct, mark the old fields deprecated in order to use
gpio_dt_spec struct.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Co-authored-by: Jordan Yates <jordan.yates@data61.csiro.au>
Signed-off-by: Bartosz Bilas <bartosz.bilas@hotmail.com>
Co-authored-by: Bartosz Bilas <bartosz.bilas@hotmail.com>
There is errata clarification (Errata ID:18700)
about subscriptions on fixed group addresses.
It is possible to subscribe models on non primary elements
on any fixed group address except all nodes address.
Devices should be able to receive messages on fixed addresses
even if they do not support the feature
to which the fixed group address belongs.
Signed-off-by: Aleksandr Khromykh <Aleksandr.Khromykh@nordicsemi.no>
STM32H7 series offer alias addresses to access some registers that could
be accessed by the M4 core on dual core variants.
For instance RCC_AHB3ENR could be accessed at following offsets:
- 0x0D4: Accessible from both cores
- 0x134: Accessible from C1 (M7) core
- 0x194: Accessible from C2 (M4) core (if any)
For most single core H7 variants, the two first addresses were accessible,
but for some others (stm32h7ax/stm32h7bx), only the 'C1 accessible'
was available.
This fact used to be hidden by the use of LL API to access these registers,
providing the required abstraction (an mainly using the first alias
when possible to simplify implementation).
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Add new scheme clock bindings for 'common' series:
- stm32f1_clock.h > compatible with f0/f1/f3 series
- stm32f4_clock.h > compatible with f2/f4/f7 series
- stm32l0_clock.h > compatible with l0 series
- stm32l1_clock.h > compatible with l1 series
- stm32l4_clock.h > compatible with g4/l4/l5/wb series
- stm32wl_clock.h > compatible with wl series
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Simplify and clean up driver code using STM32 clocks DT based macros.
Added STM32_FLASH_PRESCALER macro for this purpose.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Introduce a new scheme to define clock bingings on u5.
In a next steps, this new scheme will allow to provide u5 specific
alternate and complementary device clocks.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
On some series (H7, U5), it is possible define clock configuration
with disabled PLL outputs.
In that case, it is legit that matching pll property is not available.
Define corresponding STM32_PLLX_Y_DIVISOR macros using DT_PROP_OR
to avoid build issues in case prop is not available.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Set bus binding values using registers offset values.
As a consequence update driver to take this into account
in clock_on and clock_off functions.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
This new binding allows to work on providing stm32h7 specific
alternate and complementary device clocks.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Add an API that utilizes the ARM semihosting mechanism to interact with
the host system when a device is being emulated or run under a debugger.
RISCV is implemented in terms of the ARM implementation, and therefore
the ARM definitions cross enough architectures to be defined 'common'.
Functionality is exposed as a separate API instead of syscall
implementations (`_lseek`, `_open`, etc) due to various quirks with
the ARM mechanisms that means function arguments are not standard.
For more information see:
https://developer.arm.com/documentation/dui0471/m/what-is-semihosting-
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
impl
When threads are in more than one state at a time, k_thread_state_str()
returns a string that lists each of its states delimited by a '+'.
This in turn necessitates a change to the API that includes both a
pointer to the buffer to use for the string and the size of the buffer.
Signed-off-by: Peter Mitsis <peter.mitsis@intel.com>
Files should not be in the root include/ directory but instead under
the zephyr/ prefix path.
Issue #41543
Signed-off-by: Yuval Peress <peress@google.com>
Since the UART header file is included directly by application code,
an application developer including this file and only applying
-Wextra to the application source files will see many warnings.
Signed-off-by: Pete Dietl <petedietl@gmail.com>
Changes the media_proxy API to pass structs by reference instead of by
value.
Also pass structs by reference in internal functions in media player
and in media controller test.
Add pointer checks to the public API implementation where
user/application code provides structs by reference.
Signed-off-by: Asbjørn Sæbø <asbjorn.sabo@nordicsemi.no>
Changes the media control client API to pass structs by reference
instead of by value.
Also change internals of test to pass struct by reference.
Signed-off-by: Asbjørn Sæbø <asbjorn.sabo@nordicsemi.no>
Update the definition of the set extended advertising data command to be
a variable array instead of hardcoded to the maximum length. This
conforms to the definition from the Bluetooth specification and allows
the corresponding code to be slightly cleaner.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
to support implementation and peripheral usage of the pinctrl
driver API.
Removes deprecated "use-iomux" property from the SPI node.
Signed-off-by: Glauber Maroto Ferreira <glauber.ferreira@espressif.com>
In some cases (for examples when offloaded socket implementation does
not implement TLS functionality) it could be desired to create a native
TLS socket with an underlying offloaded socket.
This cannot be achieved with SO_BINDTODEVICE option only, as TLS socket
type is not really associated with a particular interface - it either
has to be offloaded, or a fully native socket is created (native TLS on
a native interface).
In order to address the problem, introduce TLS_NATIVE socket option.
This option instructs the socket dispatcher layer to create a native TLS
socket. As with the socket dispatcher the underlying socket
implementation is not decided during TLS socket creation, therefore it's
possible to use SO_BINDTODEVICE to choose either native or offloaded
interface for the underlying socket.
Additionally remove NET_SOCKETS_OFFLOAD_TLS Kconfig option, as it's no
longer needed with an runtime option to select whether to offload TLS or
not.
Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
Add a separate macro for registering offloaded sockets implementation,
along with information in the structure whether the implementation is
offloaded or not. This allows to differentiate between native and
offloaded socket implementations, which is critical for binding socket
API with an interface.
Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
Instead of keeping a boolean informing whether a network interface is
offloaded at socket layer or not, keep a pointer to a function which
allows to create an offloaded socket. Native interfaces keep this as
NULL, while for offloaded interfaces it allows to connect an offloaded
socket implementation with an interface.
Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
Add an API that clears cpu mask from a thread and sets it to a specific
CPU.
This is the equivelent of:
k_thread_cpu_mask_clear(&thread);
k_thread_cpu_mask_enable(&thread, cpu_idx);
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Add a new flag that is used to tell whether or not a device is a power
domain. In order to a device be identified as a power domain the node
has to be compatible with "power-domain".
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
Add API to add devices to a power domain in runtime. The number of
devices that can be added is defined in build time.
The script gen_handles.py will check the number defined in
`CONFIG_PM_DEVICE_POWER_DOMAIN_DYNAMIC` to resize the handles vector,
adding empty slots in the supported sector to be used later.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
Add pinctrl driver for CC13XX/CC26XX family of SoCs
to facilitate transition from pinmux to pinctrl.
`IOCPortConfigureSet()` from TI hal driverlib used to
implement the generic pinctrl driver.
Signed-off-by: Vaishnav Achath <vaishnav@beagleboard.org>
Both the `_cpu_arch` and `k_thread_runtime_stats` structs can have a
size of 0 in C, but will fail when building with C++. Add an extra
byte in those cases.
Signed-off-by: Yuval Peress <peress@google.com>
If the sys_slist_t instance is not empty, its head and tail points to
some sys_snode_t instances. If sys_slist_append_list is executed with
tail being NULL the list object is corrupted. Tail of the sys_slist_t
instance is set to NULL. If one executes sys_slist_append on that node,
then nodes pointed by head are lost.
The commit fixes the issue and adds unit tests to verify correct
behavior.
Added change verifies if head and tail of appended list are not NULL.
In other case the list object is invalid and should not be appended
to a valid list instance.
Signed-off-by: Piotr Pryga <piotr.pryga@nordicsemi.no>
