No fmc node for the stm32u5 is implemented. This commit
adds a stm32-fmc compatible node to the device tree.
Signed-off-by: Christian Spinnler <christian.spinnler@fau.de>
Without adding a RAM entry for the USB RAM in the MPU,
USB RAM is mapped in the Peripheral Memory region
where unaligned memory accesses will cause a fault error.
Unaligned access errors were uncovered when we switch
to a different Zephyr C library where the memcpy function
implementation has unaligned accesses to the USB RAM.
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
Zephyr SPI driver model for full-duplex operation assumes
data will be transmitted and received during each clock period.
The QMSPI driver for the XEC family also supported dual and
quad I/O use cases which are inherently half-duplex. To
support dual/quad the driver incorrectly processed spi buffers
as all transmit buffers first then all receive buffers. This
worked if only the SPI driver was used. It did not work with
the Zephyr flash SPI NOR driver which assumes SPI drivers
follow the SPI driver model. This commit implements a QMSPI
driver that follows the Zephyr SPI driver model resulting in
a slightly smaller driver. Dual/quad SPI transactions are
supported if the experimental SPI extended mode Zephyr
configuration flag is enabled. We also remove the QMSPI full duplex
driver added previously to support the flash SPI NOR driver.
Added board to spi loop-back test and spi_flash sample.
Signed-off-by: Scott Worley <scott.worley@microchip.com>
Add the FDCAN peripheral to the stm32H5 serie.
Two CAN1 & 2 instances for the stm32H56x/H57x devices.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Arm fvp_baser_aemv8r and fvp_base_revc_2xaemv8a boards are using
SMSC91C111 as their ethernet adapters.
Portions of the codes are based on FreeBSD code from its
'src/sys/dev/smc/if_smc.c' and 'src/sys/dev/smc/if_smcreg.h'.
This driver has two parts, one is the ethernet controller driver, which
is MAC layer driver. The other is the MDIO driver, which is the PHY
layer driver. Both of them are in the same source file due to that they
need to share the same reading and writing register functions and
the smsc object.
The mdio driver is needed by the existing 'phy_mii' driver, which is
a driver for the generic MII-compliant PHY.
This driver was developed under the fvp_base_revc_2xaemv8a target and
has been tested on the fvp_baser_aemv8r target.
Signed-off-by: Huifeng Zhang <Huifeng.Zhang@arm.com>
move DT_DRV_COMPAT to bmm150.h. so that can be decide which interface
to use.
define struct bmm150_bus_io interface for bmm150_i2c.c and bmm150_spi.c
in bmm150.h.
redefined bus operation interface in bmm150.c, this allow the driver
to decide which interface to use during construction.
Signed-off-by: Weiwei Guo <guoweiwei@syriusrobotics.com>
Convert the SDL driver to use the input subsystem. This is specifically
meant to emulate touchscreen drivers, so it's setup to send triplet of
x, y, touch for touch-on events and just touch off on touch off events.
Renamed the driver to input-sdl-touch since now we can also develop an
sdl driver for simulating key events.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
This commit adds support for ANY_MOTION and DATA_READY interrupts for
the BMI270. To implement this, a different config blob than the
"max_fifo" blob has to be used.
Signed-off-by: Benjamin Lindqvist <benjamin@eub.se>
This adds the i2c driver for the Renesas SmartBond(tm) MCU family.
It supports blocking transfers and callback transfers.
Currently only supports controller mode.
Co-authored-by: Stan Geitel <stan@geitel.nl>
Signed-off-by: Ben Lauret <ben.lauret.wm@renesas.com>
Under disk bindings. NVMe is a purely PCIe based technology, thus the
relevant includes.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Removed extra #includes at top of files. Missed closing } of
mec172xnlj.dtsi. Lower-cased 'reg' field of PWMs.
Signed-off-by: Jeff Daly <jeffd@silicom-usa.com>
This adds a driver for the DS2482-800 1-wire multi channel bus driver.
The driver uses a split architecture in order to share a common lock
among all configured channels of a single IC.
Signed-off-by: Caspar Friedrich <c.s.w.friedrich@gmail.com>
Add test for the experimental feature GPIO_ENABLE_DISABLE_INTERRUPT,
which covers APIs gpio_pin_interrupt_enable() and
gpio_pin_interrupt_disable().
Signed-off-by: Sung-Chi Li <lschyi@google.com>
Use the LTDC in combination with the DSI HOST makes the pinctrl obsolete.
DSI HOST has dedicated pins.
Signed-off-by: Rico Ganahl <rico.ganahl@bytesatwork.ch>
The driver has been recently moved under the input subsystem but the
corresponding driver was left over. Move it from kscan to input.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Give precision to the description of the dma phandle in the
quadspi node.
When a DMAMUX is present and enabled, the channel is the dma one
(not dmamux channel) and the request is given by the DMAMUX.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
The emulated RTC device driver is used to emulate a real
RTC device. Note that it is not a replacement for the
native_rtc module, which is used to control simulated time,
get time from the host system, etc.
Signed-off-by: Bjarki Arge Andreasen <baa@trackunit.com>
This test suite adds tests for the following:
- Setting and getting time
- Validating time is incrementing correctly
- Validating behavior of alarms with callback disabled
- Validating behavior of alarms with callback enabled
- Validating update callback
The test suite uses the devicetree alias rtc to find
the device to test.
Signed-off-by: Bjarki Arge Andreasen <baa@trackunit.com>
Add optional filter value properties. The filter is disabled by default
but can be enabled by setting the filter-sample-period > 0 in the dts
file. A latency is introduced if the filter is enabled. The latency can
be printed by setting sensor log level to debug.
Signed-off-by: Jeppe Odgaard <jeppe.odgaard@prevas.dk>
This commit implements the temperature sensor interface for
the Maxim MAX31865 SPI Temperature Sensor.
Signed-off-by: Fin Maaß <fin.maass@haw-hamburg.de>
Co-authored-by: Armin Brauns <armin.brauns@embedded-solutions.at>
Sort SoC nodes by address to make it easier to find them. As part
of this also move the intel-sha node under SoC where it belongs.
Signed-off-by: Kumar Gala <kumar.gala@intel.com>
In ACE 2.0 platform (LNL) ssp got new shim registers.
SSP driver need to program them to configure the interface.
This patch adds new shims to device tree.
Signed-off-by: Jaroslaw Stelter <Jaroslaw.Stelter@intel.com>
As the power domain nodes don't represent something accessible via
a MMIO register move those under the lps node to address warnings
generated when building the DTS.
Signed-off-by: Kumar Gala <kumar.gala@intel.com>
