Add "zephyr,displays" compatible for passing available display
controllers nodes to graphical libraries that have multi-display support
like LVGL
Signed-off-by: Abderrahmane JARMOUNI <git@jarmouni.me>
Add the 20-pin camera connector used by at least Arducam, Waveshare,
Olimex, Arduino, NXP, ST, Adafruit that connects image sensor module
boards and devkits.
Signed-off-by: Josuah Demangeon <me@josuah.net>
This patch modifies the DTS files for Intel ADSP ACE 3.0 platforms,
ensuring the power-states node is a child of the cpus node. This change
aligns with Linux conventions and mirrors the adjustments made in commit
e4c43e4cc9 for other platforms.
Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>
This diag0-gpios property allows configuring the diag0 diagnostic pin,
which can be used to indicate position reached, stall detection, and
other status information from the controller.
Signed-off-by: Dipak Shetty <shetty.dipak@gmx.com>
Change the base address of GPIO and pinctrl voltage selection
The new base address enables more pins to support voltage selection.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
The tx-en-settle-time-us is set to 26 to take into account
the time needed for the RF output power rise time of the nRF5 SoC.
Signed-off-by: Andrzej Kuros <andrzej.kuros@nordicsemi.no>
Remove the boolean flag "promiscuous-mode" from the GEM's
DT binding, as promiscuous mode control is being switched
over the the Ethernet device driver's get_config/set_config
API functions.
Signed-off-by: Immo Birnbaum <mail@birnbaum.immo>
Add a parameter to define the maximum PSRAM frequency for the STM32 XSPI
driver. It will be useful to automatically calculate a prescaler.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
As the code noted, the RGMII RX and TX clock delay values may need to
change depending on the MAC configuration or the PCB layout. Add
properties to allow configuring these in the device tree, defaulting to
the previous hard-coded values if not present.
Signed-off-by: Robert Hancock <robert.hancock@calian.com>
The GPTM is a general purpose module with a 16 bit prescaler, 16 bit
counter, and 4 compare units that can be used for PWM generation.
Use the same style as gd32 where the timer is a counter and the PWM
mode is a child node.
Signed-off-by: Michael Hope <michaelh@juju.nz>
This PR adds a new devicetree property
that allows enabling external battery
backup functionality.
Signed-off-by: Marcin Lyda <elektromarcin@gmail.com>
`msi-range` value 4 sets MSI clock frequency to 1 MHz and not 4 MHz as
intended.
Change value to 6 to increase clock to 4 MHz which matches comment.
Signed-off-by: Jeppe Odgaard <jeppe.odgaard@prevas.dk>
Add memc driver for the MAX32 HyperBus peripheral, supporting HyperRAM
and Xccela PSRAM memory devices.
Signed-off-by: Pete Johanson <pete.johanson@analog.com>
The Alternate Function IO (AFIO) block must have the clock enabled
before configuring. Some remappings seem to work without, but some
like EXTI do not. Fix.
Signed-off-by: Michael Hope <michaelh@juju.nz>
Intial serial driver support for RX MCU, this driver utilize
the SCI HWIP for uart communication
Current support include polling API and Interrupt driven API,
some of the code is using Renesas RX Driver Package (RDP) as
hal layer
Signed-off-by: Duy Nguyen <duy.nguyen.xa@renesas.com>
Signed-off-by: Sang Tran <sang.tran.jc@renesas.com>
Initial commit for GPIO driver support on board using RX130 MCUs
* drivers: GPIO: implementation for GPIO driver on RSK_RX130_512KB
* dts: rx: add device node for GPIO of RSK_RX130_512KB
Signed-off-by: Duy Nguyen <duy.nguyen.xa@renesas.com>
Signed-off-by: Phi Tran <phi.tran.jg@bp.renesas.com>
Intial support of pinctrl driver for Renesas RX MCU
family.
This support base on using Renesas RX driver package in
hal_renesas layer
Signed-off-by: Duy Nguyen <duy.nguyen.xa@renesas.com>
Signed-off-by: Phi Tran <phi.tran.jg@bp.renesas.com>
This commit add a system timer driver for Renesas RX using the
CMT peripheral. The driver supports both system ticks and
high-resolution cycle counting
- Configures CMT0 as the system tick timer
- Configures CMT1 as a free-running cycle timer for precise
time tracking
- Handles timer overflows to maintain a continuous cycle count.
- Implements sys_clock_cycle_get_32() and sys_clock_cycle_get_64()
for high-resolution timing
- Supports Zephyr tickless kernel mode by tracking elapsed cycles
- Enables interrupt-based tick announcement using CMT0
Signed-off-by: Duy Nguyen <duy.nguyen.xa@renesas.com>
Signed-off-by: Yuichi Nakada <yuichi.nakada.sx@renesas.com>
Initial support of clock control driver for RX MCU
Signed-off-by: Duy Nguyen <duy.nguyen.xa@renesas.com>
Signed-off-by: Tran Van Quy <quy.tran.pz@renesas.com>
The qemu-system-rx is based on RX62N, this commit added
support for the RX62N SOC layer. MCU is using RXv1 core and
system timer running at 6MHz
Signed-off-by: Duy Nguyen <duy.nguyen.xa@renesas.com>
Add disabled qdec subnodes to timers TIM1 through TIM5 and TIM8
for STM32F2 series MCUs. This enables Zephyr to provide consistent
QDEC support across all supported encoder-capable STM32 timers.
Signed-off-by: Amaan Singh <amaansingh160@gmail.com>
Clean up dt binding descriptions and introduce titles where
needed to make board documentation pages look nice. The supported
hardware table on board documentation pages sources its data
from dt bindings, and needs succinct titles.
Signed-off-by: Aksel Skauge Mellbye <aksel.mellbye@silabs.com>
Added USB device node with compatible "st,stm32-usb".
Added usb_fs_phy node with compatible "usb-nop-xceiv".
Signed-off-by: IBEN EL HADJ MESSAOUD Marwa <marwa.ibenelhadjmessaoud-ext@st.com>
K3 series is a Nuvoton embedded controller based on NPCX series.
Add npck3m8k dtsi
Signed-off-by: Alvis Sun <yfsun@nuvoton.com>
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
