In order to use fstab with fatfs in addition to
littlefs a new driver fstab,fatfs was introduced
containing the required logic to detect and if
needed automount fatfs devices specified in fstab.
Additionally as the partition phandle is not needed
by fatfs and currently is specific to littlefs it
was moved from the common dts binding into the
littlefs binding.
Signed-off-by: Carlo Kirchmeier <carlo.kirchmeier@zuehlke.com>
Co-authored-by: Carlo Kirchmeier <carlo.kirchmeier@zuehlke.com>
Co-authored-by: Dominik Ermel <dominik.ermel@nordicsemi.no>
- add driver for Vishay VEML6031 High Accuracy Ambient Light Sensor.
- add new compatible "vishay,veml6031".
- read and write consecutive 8 bit registers as bulk operation.
- add driver to build all test of sensors.
- support fetch and get.
- triggered mode and interrupt is not yet supported.
Signed-off-by: Andreas Klinger <ak@it-klinger.de>
Adding a stepper driver implementation for allegro a4979
microstepping programmable stepper motor driver.
The implemenation was tested using the drv8424/api testsuite.
Signed-off-by: Verena Schweinstetter <verena.schweinstetter@zeiss.com>
Add interrupt controller driver support for RZ/N2L
Signed-off-by: Quang Le <quang.le.eb@bp.renesas.com>
Signed-off-by: Nhut Nguyen <nhut.nguyen.kc@renesas.com>
Add serial driver support for RZ/N2L
Signed-off-by: Hoang Nguyen <hoang.nguyen.jx@bp.renesas.com>
Signed-off-by: Nhut Nguyen <nhut.nguyen.kc@renesas.com>
This is the initial commit to support pinctrl driver for Renesas RZ/N2L
Signed-off-by: Hoang Nguyen <hoang.nguyen.jx@bp.renesas.com>
Signed-off-by: Nhut Nguyen <nhut.nguyen.kc@renesas.com>
Add DMA driver support for Renesas RZ/G3S
Signed-off-by: Tien Nguyen <tien.nguyen.zg@renesas.com>
Signed-off-by: Nhut Nguyen <nhut.nguyen.kc@renesas.com>
Working through either Motion detection or through Data-Ready.
Data-ready has a back-up timer to trigger worst case, if no motion
occurs within 10X data-rate.
On every streaming event, the driver checks for the sensor health, and
attempts recoverying its state if it detects issues.
Signed-off-by: Luis Ubieda <luisf@croxel.com>
- Add bus support for SPI (based on RTIO).
- Support read/decode API for one-shot reads on the following channels:
- SENSOR_CHAN_POS_DX.
- SENSOR_CHAN_POS_DY.
- SENSOR_CHAN_POS_DXYZ.
Signed-off-by: Luis Ubieda <luisf@croxel.com>
Initial AD405X driver supporting sampling, averaging
and burst averaging operation modes. Configurable
without interrupts or with device ready and
data ready interrupt.
Signed-off-by: Dimitrije Lilic <dimitrije.lilic@orioninc.com>
- Define i2c0, i2c1 bus nodes in the device tree for ZynqMP
- Note: Platform-specific configurations, such as I2C Bus Frequency and
Reference input clock, should be handled according to the design.
Signed-off-by: Ajay Neeli <ajay.neeli@amd.com>
Protection circuit must be disabled to use NFCT antenna pins
as GPIOs. It can be done by adding nfct-pins-as-gpios to nfct
node in the devicetree in cpuapp. Node must be disabled as
NFCT is not used. In legacy platforms same property was added
to uicr node because that information was stored in UICR. In
nrf54h20 it is not part of UICR so property is part of nfct
node.
Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
Add initial support for nuvoton numaker m55m1x SoC series
including basic init and device tree source include.
Signed-off-by: cyliang tw <cyliang@nuvoton.com>
Add support for the Octavo's OSD32MP1-BRK platform. The board uses
Octavo's OSD32MP15x SiP which integrates STM32MP157F MCU and
its SoC configuration.
Signed-off-by: Jakub Wasilewski <jwasilewski@internships.antmicro.com>
Signed-off-by: Filip Kokosinski <fkokosinski@antmicro.com>
Rename the driver from uart_native_posix to uart_native_pty.
Including renaming the DTS compatible, and kconfig options, deprecating
the old ones.
And refactor the driver, generalizing it, so we can have any number of
instances.
Note that, unfortunately generalizing to N instances cannot be done
without a degree of backwards compatibility breakage: This driver was
born with all its configuration and selection of the instances based on
kconfig.
When the driver was made to use DT, it was done in a way that required
both DT and kconfig needing to manually coherently enable the 2nd UART.
This has now been fixed, which it means only DT is used to decide how
many instances are avaliable, and UART_NATIVE_POSIX_PORT_1_ENABLE is
just ignored.
Including:
* Deprecate UART_NATIVE_WAIT_PTS_READY_ENABLE: the options is always on
now as it has no practical drawbacks.
* Deprecate UART_NATIVE_POSIX_PORT_1_ENABLE: DTS intanciation defines it
being available now.
* Rename a few functions and in general shorten pseudo-tty/pseudo-
terminal to PTY instead of PTTY.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
- Add support for Fetch/Get API.
- Add support for Read/Decode API.
- Add config settings through device-tree.
- Add bus support for SPI (although easily extensible to others as
based on RTIO).
Fetch/Get API tested with accel_polling sample.
Read/Decode API tested with sensor_shell sample.
Signed-off-by: Luis Ubieda <luisf@croxel.com>
Use vendor prefix "neorv32" for all peripherals provided by the NEORV32
RISV-V Processor project.
Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
It seems that this DTS entry has been copied from another DTS.
The address of FlexPWM1 conflicts right now with the flash memory space.
Signed-off-by: Piotr Zierhoffer <pzierhoffer@antmicro.com>
This patch adds an initial driver for the WCH DMA
controller. All hardware features and most interface
features are implemented.
Signed-off-by: Paul Wedeck <paulwedeck@gmail.com>
The flash erase-blocks property was a bit malformed, it has 254 pages
of size 8192 after the first 8 pages of size 2048 to reach the total
size of 2048K. This caused issues when trying to erase the last pages
of the flash, which caused the flash erase_blocks test suite to fail.
Adjust the erase-blocks to match the flash layout.
Signed-off-by: Bjarki Arge Andreasen <bjarki.andreasen@nordicsemi.no>
Pinoroni Pico Plus2 is an RP2350B based board that has
more rich I/O, RAM, and Flash than the original Raspberry Pi Pico2.
Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
As the RP2350B has more than 32 GPIO pins,
we changed the configuration so that it is split into two ports.
To do this, we created a `raspberrypi,pico-gpio-port` node and
moved the previous `raspberrypi,pico-gpio-port` functions to it.
This became a child node of `raspberrypi,pico-gpio-port`, and
`raspberrypi,pico-gpio-port` will remain a gpio mapper.
Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
