Add a DTS fragment to support defining a RP2350 series SoC with two
Hazard3 cores in use.
Signed-off-by: Andrew Featherstone <andrew.featherstone@gmail.com>
The RP2350 uses the Xh3irq interrupt controller, which supports nested
and prioritised interrupts. This adds initial support, configuring the
controller in 'direct' (non-vectored) mode.
Signed-off-by: Andrew Featherstone <andrew.featherstone@gmail.com>
These .dtsi files are common regardless of which permutation of cores
are in the two CPU 'sockets'.
Take the opportunity to make the includes paths to rp2350a.dtsi relative
to the current file to emphasise their relationship.
This is foundation work ahead of adding support for the Hazard3 cores.
Signed-off-by: Andrew Featherstone <andrew.featherstone@gmail.com>
The s2ram power state is a "suspend-to-ram" state which is not
supported by the radio core, so delete it from the overlay.
Signed-off-by: Bjarki Arge Andreasen <bjarki.andreasen@nordicsemi.no>
Add the driver itself and Kconfig/CMakeLists/dts/bindings related to it.
Other files and libraries needed are in ST's dedicated folder
hal_stm32 (modules/hal/stm32).
Signed-off-by: Vincent Tardy <vincent.tardy@st.com>
This commit improves the I3C handling of open-drain
timing configurations with the following changes:
- Add OD minimum high_ns and low_ns DT properties
- Implement dw_i3c_init_scl_timing for runtime timing updates
- Initialize scl_od_min configuration from device tree
- Maintain backward compatibility with existing configurations
Requirement (MIPI Specification for I3C Basic v1.2 (16-Dec-2024),
Section 4.3.11.2 & Table 49):
- The MIPI I3C specification mandates different open-drain speeds during
bus initialization as defined in
"I3C Basic Open Drain Timing Parameters".
- The first broadcast address (7'h7E+W) must be transmitted at a slower
open-drain speed to ensure visibility to all devices on the I3C bus,
including legacy I2C devices. This slow speed (minimum 200ns Thigh)
allows I2C devices to properly detect the I3C mode transition and
disable their spike filters before switching to I3C mode. After the
initial broadcast, normal I3C open-drain speeds can be used for
regular operation.
Signed-off-by: Shreehari HK <shreehari.hk@alifsemi.com>
Update board to use default power domain for the "peripheral"
domain, which when resumed prevents SoC from entering suspend and
standby states as these power down peripherals.
Note by co-author: Cherry-picked this commit and edited it to work
without the generic domain refactoring on the branch it came from.
Signed-off-by: Bjarki Arge Andreasen <bjarki.andreasen@nordicsemi.no>
Co-authored-by: Declan Snyder <declan.snyder@nxp.com>
Refactor low power state handling to not tie to zephyr,disabling-states
and define it's own separate "low power states" property in DT instead.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
- add NXP_BOARD_SPECIFIC_MPU_SETTINGS kconfig to provide a switch
for developer if they want to use private mpu settings
CONFIG_NXP_BOARD_SPECIFIC_MPU_SETTINGS==1 | NXP default setting
CONFIG_NXP_BOARD_SPECIFIC_MPU_SETTINGS==0 | User specific
- Use DT function to get memory base address and region size for cm7
- CM33 use dts to set mpu settings
- Add REGION_CUSTOMED_MEMORY_SIZE macro provide a common mapping ways
to map actual memory_size_kb to "region_size"
- The settings of the unified memory on cm33/cm7 cores:
ocram1/flexspi2 -> REGION_RAM_NOCACHE_ATTR
ocram2/dtcm -> REGION_RAM_NOCACHE_ATTR
flexspi/itcm -> REGION_FLASH_ATTR
Signed-off-by: Lucien Zhao <lucien.zhao@nxp.com>
Invert property was not implemented and is now redundant with the flag
pwm-cell which is more flexible in case you want some IO to be inverted
and some not
Signed-off-by: Franck Duriez <franck.lucien.duriez@gmail.com>
# Conflicts:
# doc/releases/migration-guide-4.3.rst
This commit moves common DTS entries into common file
dts/arm/nxp/nxp_rt7xx_common.dtsi.
This way there is not duplication between cpu0 and cpu1.
Signed-off-by: Tomas Galbicka <tomas.galbicka@nxp.com>
Fixes the on-chip flash write-block-size for
MCXA platforms to 16 Bytes.
It was set to 128 Bytes, but the MCXA Flash ROM-API
supports 16-byte writes.
Signed-off-by: Andrej Butok <andrey.butok@nxp.com>
1. the MCXA family use MRCC to reset peripheral
2. MRCC register, 0: hold in reset, 1: release from reset
3. usage as blow
syscon: syscon@xxx {
...
reset: reset {
compatible = "nxp,mrcc-reset";
#reset-cells = <1>;
};
};
Signed-off-by: Peter Wang <chaoyi.wang@nxp.com>
Reformat devicetree files:
* Sort nodes by unit address or name
* Sort properties by category and name
Add missing properties to existing nodes.
Signed-off-by: Aksel Skauge Mellbye <aksel.mellbye@silabs.com>
Add support for runtime and devicetree configuration of themocouple
type, ADC resolution, filter coefficient and cold junction temperature
resolution. Extend device specific sensor channels to include cold
junction temperature, delta tempereature, hot junction temperature and
raw ADC values while still maintaining backwards compability with the
existing SENSOR_CHAN_AMBIENT_TEMP channel.
Signed-off-by: Thomas Schmid <tom@lfence.de>
Introduce new binding properties for the LPADC DT
and update the driver to consume them.
Users can use these properties to obtain the opamp
device bound to the ADC and dynamically adjust the
opamp gain so that the opamp output is within the
ADC ideal sample range.
Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
This commit includes the following changes:
1. Add top level CMakeLists.txt entry and Kconfig.
2. Add bindings for opamp-controller.
2. Add bindings for nxp,opamp and nxp,opamp_fast.
3. Implemented NXP opamp and opamp_fast device driver.
Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
Add optional fast-memory-region property to the Ethos-U driver. When
present in the devicetree, the driver passes the region base and size
to ethosu_init(), allowing platforms to use dedicated SRAM for improved
NPU performance.
If the property is not specified, the driver falls back to using NULL/0,
keeping existing behavior unchanged.
Signed-off-by: Johan Alfvén <johan.alfven@arm.com>
Added support for RTIO stream.
Also added sampling_period property to the DTS. This is for setting the
sampling period when streaming is used.
Hardware or kernel timer can be
used for this.
To use hardware timer you need to add it to the DTS. Example:
{
chosen {
zephyr,adc-clock = &counter0;
};
};
Signed-off-by: Vladislav Pejic <vladislav.pejic@orioninc.com>
Add nodes for the GPIO controller (controlling pins PA00-44). Naming is
a bit confusing. In some places you'll find HPSYS_GPIO, other GPIO1,
pins are named PA00-PA44... I've chosen "GPIOA". Because the Zephyr GPIO
API assumes a maximum of 32 pins per controller, we have to split the
controller into 32-bit wide blocks. In reality, the controller
internally works like that (see the `reg` addresses), however, the whole
block is clocked by a single RCC _switch_.
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
