Explain how 'include:' works in some more detail and mention base.yaml,
along with an example of how it can be used.
This was adapted from
https://github.com/zephyrproject-rtos/zephyr/pull/19846.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
Add SPI driver and bindings for LPSPI peripheral for the RV32M1 SOC.
Based heavily on the existing mcux LPSPI driver.
Signed-off-by: Karsten Koenig <karsten.koenig.030@gmail.com>
- Add WDT(0,1) to esp32.dtsi
- Extend the module to be able to use WDT(0,1)
- Some minor refactoring due to usage of device tree
Tests:
- samples/drivers/watchdog
- tests/drivers/watchdog/wdt_basic_api
Note:
- timer module interrupt registers shall be removed when
timer driver implemented.
Signed-off-by: Mohamed ElShahawi <ExtremeGTX@hotmail.com>
Unlike most other GPIO controllers which support 32 pins this device
only supports 16. (There is an SX1508B that has 8 pins, but the
driver doesn't support it.)
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
All 96Boards complying to the IE spec exposes either 40pin or 30pin
standard low speed connectors for peripheral connectivity. These
connectors are well defined and available in the IE spec. So, lets
create a devicetree binding for the 40pin header for the 1.8v IE
96Boards. This binding will be utilized by the 96Boards
for exposing the GPIO pins as nexus node as per the devicetree spec.
This will allow the shields and applications to use board independent
GPIO mapping.
Signed-off-by: Manivannan Sadhasivam <mani@kernel.org>
All 96Boards complying to the IE spec exposes either 40pin or 30pin
standard low speed connectors for peripheral connectivity. These
connectors are well defined and available in the IE spec. So, lets
create a devicetree binding for the most commonly used 30pin header
for the 3.3v IE 96Boards. This binding will be utilized by the 96Boards
for exposing the GPIO pins as nexus node as per the devicetree spec.
This will allow the shields and applications to use board independent
GPIO mapping.
Signed-off-by: Manivannan Sadhasivam <mani@kernel.org>
Do
description: |
instead of
description: >
in the example, to preserve internal newlines in the string. Also link
to https://yaml-multiline.info/, which is handy.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
The int, array, string, and string-array property types were not
documented together with the other types, for whatever reason (might've
been too focused on the more complex types and overlooked it). Add
documentation for them.
Also do some minor cleanup on the descriptions, e.g. to make them more
consistent.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
With https://github.com/zephyrproject-rtos/zephyr/pull/20185, multi-line
descriptions will be formatted nicely, but using '>' breaks it, because
it removes internal newlines (including between paragraphs).
See https://yaml-multiline.info/.
Replace 'description: >' with 'description: |' to encourage '|'. That'll
prevent '>' from getting copied around and messing up long descriptions.
This will lead to some extra newlines in the output, but it's fine.
Line-wrapping messes up any manual formatting.
The replacement was done with
$ git ls-files 'dts/bindings/*.yaml' | \
xargs sed -i 's/description:\s*>/description: |/'
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
Add bindings for Nordic nRF family peripherals:
- IPC (Interprocessor Communication)
- RNG (Random Number Generator)
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
MT9M114 is a CMOS digital image sensor.
Implement video interface.
Only VGA (640x480) supported for now.
Signed-off-by: Loic Poulain <loic.poulain@linaro.org>
The Thingy:52 has a LIS2DH12 low-power accelerometer on the external
I2C bus. Add the necessary description to devicetree.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Make the clkout properties of the NXP Kinetis SIM module device tree
bindings optional since not all boards rely on this clock signal for
clocking external peripherals.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Remove the common.dts file which has been used for a year.
common.dts at one point allowed us to conditionally add an MCUBoot
overlay based on Kconfig.
but since DT lost access to Kconfig options it has been unused.
The overridable variable DTS_COMMON_OVERLAYS, which by default points
to common.dts, is also unused in-tree, and any out-of-tree usage can
be ported over to use DTC_OVERLAY_FILE instead, so we remove the
variable as well.
This simplifies the configuration system.
Signed-off-by: Sebastian Bøe <sebastian.boe@nordicsemi.no>
Add binding for arm,mps2-fpgaio-gpio and update device tree and change
FPGA GPIO init code to utilize device tree defines.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Move the selection of the IP clock source for the modules in the NXP
Kinetis KE1xF SoCs from being hardcoded in soc.c to being specified in
the device tree.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
This commit adds LiteX SPI drivers and its bindings.
Signed-off-by: Daniel Craviee <dcraviee@internships.antmicro.com>
Signed-off-by: Mateusz Holenko <mholenko@antmicro.com>
STM32L151XB-A SoC is almost similar to the STM32L151XB SoC except that
it has more RAM (32KiB). Hence add devicetree and Kconfig support.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Indtroduction of generic device tree bindings for keyboard scan devices.
In addition, device tree node entries and dt specific bindings where
also implemented for Microchip MEC1501
Signed-off-by: Francisco Munoz <francisco.munoz.ruiz@intel.com>
STM32L1 uses the same spi controller as STM32F1 so we can just set the
right addresses and enable them. We also need to add the fixup names and
to correctly include the header for ST LL HAL.
Signed-off-by: Karl Palsson <karlp@etactica.com>
1. Replace the non-existent CPU device binding ("Cortex-R") specified
by the CPU node with a proper one.
2. Relocate CPU node declaration to SoC dtsi:
The CPU node should be declared in the SoC dtsi because the core
type is SoC-dependent. In fact, this is exactly how it is done in
the Cortex-M port.
3. Remove core_intc (supposedly Cortex-R VIC):
Unlike the NVIC of Cortex-M, the VIC of Cortex-R is not a true
interrupt controller in the conventional sense and merely acts as
a CPU input port for aggregated interrupt request and vector index
signals. For this reason, there is no point in declaring it in the
device tree and specifying it as an interrupt parent. All SoCs
incorporating Cortex-R implement a separate true interrupt
controller (for instance, GIC for Zynq MPSoC and VIM for Hercules).
Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
This commit adds device bindings for Cortex-R4(F) and Cortex-R5(F).
These were supposed to be added during the initial development of
Cortex-R port, but it was not due to an incorrect device tree
specification.
Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
Implemented latest extensions to the counter API related to
detection of alarms being set too late and short relative alarms.
Implementation could not be realized on nrfx_rtc driver thus
driver has been reimplemented based on nrf_rtc hal.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
The patch adds initial support for STM32F030X4 SoC.
STM32F0 Cube package advises to use 'stm32f030x6' code
for both STM32F030x4 and STM32F030x6 SoC variants.
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
