Have nodelabels match the SoC docs so when a nodelabel reference is
made in the code its easier to relate to the SoC.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Have nodelabels match the SoC docs so when a nodelabel reference is
made in the code its easier to relate to the SoC.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Have nodelabels match the SoC docs so when a nodelabel reference is
made in the code its easier to relate to the SoC.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Have nodelabels match the SoC docs so when a nodelabel reference is
made in the code its easier to relate to the SoC.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This commit adds a GMAC instance to the SAM E5x device tree, along with
the refactoring necessary to specify the SAM E5x-specific components.
Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
The SAM4E GMAC version can use only MII as phy-connection-type. This
update the current default RMII value to MII.
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
This add the following options to GMAC device tree bindings:
- max-frame-size
- max-speed
- phy-connection-type
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
This commit adds a GMAC instance to the SAM 4E device tree.
Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
This commit fixes the incorrect memory (FLASH and SRAM) size
specification in the device tree and the board test yaml files.
The `qemu_cortex_r5` board (using `fdt-single_arch-zcu102-arm.dtb` FDT)
has 64MiB RAM at the address 0 and 32MiB QSPI flash at 0xc0000000.
QEMU `info mtree`:
0000000000000000-ffffffffffffffff (prio 0, i/o): memory@00000000
0000000000000000-000000000002ffff (prio 0, ram): ddr_bank1_1@0x0
0000000000030000-000000000003ffff (prio 0, ram): ddr_bank1_2@0x30000
0000000000040000-0000000003ffffff (prio 0, ram): ddr_bank1_3@0x40000
00000000c0000000-00000000c1ffffff (prio 0, i/o): lqspi
Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
Now that all entropy drivers use DTS we can remove HAS_DTS_ENTROPY being
set everywhere as well as Kconfig ENTROPY_NAME since that is now coming
from DT_ENTROPY_NAME.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Replace CONFIG_ENTROPY_NAME with DT_CHOSEN_ZEPHYR_ENTROPY_LABEL. We now
set zephyr,entropy in the chosen node of the device tree to the entropy
device.
This allows us to remove CONFIG_ENTROPY_NAME from dts_fixup.h. Also
remove any other stale ENTROPY related defines in dts_fixup.h files.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
dmas and dma-names properties could be used by a wide range
of potential dma client, hence put them in base.yaml, as
optional properties.
Since current stm32-i2s driver implementation only support
dma, set these properties as required.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Add a property to the openisa,rv32m1-gpio binding that relates the GPIO
node to the pinmux PORT node.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Convert driver to use DT_INST macros and remove related board per
instance Kconfig symbol usage.
Updated the openisa,rv32m1_vega-pinmux binding to require the label
property and updated the rv32m1.dtsi to add label properties for the
pinmux nodes.
Also update gpio_basic_api test to use DT_NODELABEL.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
As prep for drivers being converted to utilize DT_INST and removal of
per instance Kconfig symbols, move soc.c code to utilize DT_NODELABEL
instead.
Also rename various node labels to match the SoC docs.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Don't assume in the soc level device trees that flexcomm nodes will
always be configured as spi. Instead, configure flexcomm nodes at the
board level for lpcxpresso55s69 and lpcxpresso54114 boards.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Don't assume in the soc level device trees that flexcomm nodes will
always be configured as usart. Instead, configure flexcomm nodes at the
board level for lpcxpresso55s69 and lpcxpresso54114 boards.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Don't assume in the soc level device trees that flexcomm nodes will
always be configured as i2c. Instead, configure flexcomm nodes at the
board level for lpcxpresso55s69 and lpcxpresso54114 boards.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
The flexcomm peripheral on lpc socs can be configured into uart, spi,
i2c, or i2s mode. Introduce a shared device tree binding that gets
included by the more specific driver type bindings.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
The st,stm32l0-flash-controller did not have a binding, add one for it.
Also made a comment in stm32l0.dtsi that the driver doesn't currently
support this controller.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
The flash at 0 is a cfi-flash and its 2 banks each that are 64M.
Update qemu-virt-a53.dtsi to reflect the proper flash config, however we
comment out the second bank of flash for now because zephyr,flash can
only handle one value in the reg property.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Group all the GPIO controllers under a pinctl node so that we have a
container for pinmux configuration data.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Adds i2c device tree bindings and nodes for the lpc54xxx and lpc55s6x
socs in preparation for adding a new i2c driver.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Make sure every flash controller has a node label "flash_controller".
This will make it easier to refer to the SoC NVMC node when necessary.
Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
With the introduction of the new device-tree macros it is now possible
to use the settings for speed and flow-control from the bus node instead
of having the same properties on the esp node itself.
Signed-off-by: Tobias Svehagen <tobias.svehagen@gmail.com>
Define rng nodes for all SoCs featuring the RNG peripheral,
so that the entropy_nrf5 driver can be converted to DTS.
For the network core in nRF5340, align the RNG interrupt priority with
what is used as the default value in (almost) all other DTS nodes.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Make the label property required for "arm,cmsdk-gpio" compatible
nodes. Update binding to mark the 'label' property required and updated
associated .dts files to add a 'label' property if it didn't exist.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Currently supported nRF SoCs featuring the second GPIO port (P1) do not
have all 32 pins implemented in that port. Add the "ngpios" property
in gpio1 nodes for these SoCs, so that they don't take the default
value of 32 to indicate the number of available pins but use instead:
- 10 for nRF52833
- 16 for nRF52840
- 16 for nRF5340 (both application and network core)
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Add support for the STM32L422Xb SoC. Base stm32l422.dtsi on
stm32l412.dtsi to be able to add the crypto device later.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
