Update Microchip XEC RTOS timer driver adding MEC172x support and
using more device tree properities in the driver. We must also update
the XEC counter driver to use the new GIRQ DT properties.
Add new properties to RTOS timer and RTC timer YAML. These two timers
are linked due to option using a high speed timer for kernel busy wait.
Add Kconfig logic for XEC RTOS timer to MEC172x SoC.
Enable the Microchip XEC RTOS timer in the MEC172x evaluation board.
Add device tree nodes for most peripeherals.
Signed-off-by: Scott Worley <scott.worley@microchip.com>
In the eeprom read operation, when rambuf was available
mutex was not unlocked after the read. Consequence of that is
that device was blocked after that read for incoming operations.
This commit fixes the issue
Signed-off-by: Andrzej Puzdrowski <andrzej.puzdrowski@nordicsemi.no>
Add driver implementation and header files for a MEC172x
aggregated interrupt driver. Enable the parent(ECIA) node
to have the driver initialize interrupt hardware for use.
Enable child nodes for those GIRQs used for aggregation.
Refer to chip documention for the list of GIRQs restricted
to aggregation and those which support direct mode.
Add chip level device tree node for MEC172x EC interrupt
aggregator parent and GIRQ children. Each child node contains
a list of sources representing the source bit position in the
GIRQ registers.
Add DT bindings for ECIA and GIRQ nodes.
Add build file(s) and configuration items for the MEC172x ECIA
aggregated interrupt driver. Add and enable the MEC172x interrupt
driver on the MEC172x evaluation board(EVB). Enable parent node to
initialize ECIA hardware. Child nodes are left disabled until a
future driver needs them.
Signed-off-by: Scott Worley <scott.worley@microchip.com>
Add basic counter driver based on Timer Counter (TC) module for Atmel
SAM family.
Remarks:
- The driver is not thread safe.
- The driver does not implement guard periods.
- The driver does not guarantee that short relative alarm will trigger
the interrupt immediately and not after the full cycle / counter
overflow.
Tested on Atmel SMART SAM E70 Xplained board
Origin: Original
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
This commit adds dt definitions for the hw aes accelerator
on stm32g0 Series.
The accelertor is available on the following socs:
stm32g041, stm32g061, stm32g081, and stm32g0c1.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
This commit adds a dt node for the hw aes accelerator of the
stm32l5 series.
The stm32l562Xe.dtsi file now includes the newly created
stm32l562Xe.dtsi with the additional aes definitions instead of the
stm32l552Xe.dtsi file.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
This commit adds bindings for the STM32 AES accelerator.
Common properties of st,stm32-cryp are moved into
st,stm32-crypto-common.yaml.
The accelerator supports ECB, CBC, CTR, GCM, GMAC, and CCM
chaining modes.
128 bit bit data blocks with cipher key lengths of 128 and 256 bit are
supported.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
Add support for power management and the shutdown mode for bq274xx fuel
gauge sensor. This now allows boards that have any kind of low power
mode to turn on or off the sensor.
Tested on a Company's custom board with bq27421 sensor on it.
Signed-off-by: Luka Lopotar <luka.lopotar@greyp.com>
Each stm32 dma can be of V1 or V2 or V2bis type. Each type
has a dma-cell with specific nb of element. The feature and slot
properties are not required depending on the stm32 family.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
This will define a new bindings for any stm32 dma feature
Depending on the soc family, the DMA is of V1 or V2 or Vbis type
And give a factored definition for feature
The difference is on the dma-cell structure.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Implement a clock control driver for Microchip MEC172x handling
configuring the 32 KHz input sources for the PLL and peripheral-32k
clock domains. MEC172x differs from MEC152x. MEC152x had one 32K source
for both PLL and peripherals. MEC172x allows the two domains to use
independent 32 KHz sources. Device tree updated to provide addresses
of hardware used by the driver.
Signed-off-by: Scott Worley <scott.worley@microchip.com>
This adds the dts to PASS the tests/drivers/dac/dac_loopback
on the nucleo_f429zi board, when PA0 and PA4 are connected.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
This commit adds a driver implementation for the LM75 I2C temperature
sensor.
Signed-off-by: Alexander Wachter <alexander.wachter@leica-geosystems.com>
reuse the lpc's lpadc driver for rt1170, modify the dts and add
some macro to shield some code of LPC series. Also add the
board support inside the tests/drivers/adc/adc_api/src/test_adc.c,
and a dts node:zephyr,user inside
samples/drivers/adc/boards/mimxrt1170_evk_cm7.overlay
Signed-off-by: Crist Xu <crist.xu@nxp.com>
This patch states that the Everlight B1414 LED controller is compatible
with the Worldsemi WS2812. Some information about it is added to the
WS2812 DT binding and driver Kconfig files.
Signed-off-by: Simon Guinot <simon.guinot@seagate.com>
Some devices compatibles with the WS2812 IC have a different reset/latch
delay.
This patch introduces the "reset-delay" optional property for the WS2812
DT binding and adds support to the ws2812_spi driver. This new property
allows to configure the reset/latch delay of a WS2812 compatible LED
strip controller from its DT node.
If omitted the driver uses 8 microseconds by default (which is good for
the WS2812 IC).
Signed-off-by: Simon Guinot <simon.guinot@seagate.com>
Some devices compatibles with the WS2812 IC have a different channel to
color mappings (e.g. RGB, BGR, RGBW, etc).
This patch introduces the "color-mapping" required property for the
WS2812 DT binding and adds support to the ws2812_gpio and ws2812_spi
drivers. This new property allows to configure the color to channel
mapping of a WS2812 compatible LED strip controller from its DT node.
Since this property also allows to know if a white channel is available,
then this patch removes the "has-white-channel" property.
Signed-off-by: Simon Guinot <simon.guinot@seagate.com>
Add a new property to the "nordic,nrf-clock" binding to allow
configuration of the HFCLKAUDIO frequency.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Adding support for the stm32l051 devices.
Signed-off-by: Even Falch-Larsen <even.falch.larsen@nomono.co>
Co-authored-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Added minimal device tree and board files to build Microchip
MEC172x. SOC layer stripped down to allow build for checking
compilation only.
Signed-off-by: Scott Worley <scott.worley@microchip.com>
The zephyr sam gmac driver don't get register address and, in some
cases, peripheral id from devicetree. This replace headers constants
in favor of devicetree values.
This fix wrong Atmel SAME7x/SAMV7x gmac register address and add
missing peripheral id property for SAM family.
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
The current GMAC compatible not allow especialize properties by SoC
family. Split current generic Atmel GMAC compatible into two new
compatibles which are defined by SoC families. This increase the
freedom and avoid odd situations.
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
This fixes properties documentation and two devicetree styles:
- properties with wrong code identation and
- property description tag style
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
A syscon device is a device managing a memory region containing a set of
registers that are not cohesive enough to represent as any specific type
of device. We need a driver for that because several other drivers could
use the same region at the same time and we need to io-map the region at
boot for MMU enabled platforms.
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Define the subghz radio node in the module dtsi file, with the internal
RF switch connection and TCXO setting, and point at it from the
corresponding dev board file.
Signed-off-by: Fabio Baltieri <fabio.baltieri@gmail.com>
Add a device node for the subghz radio in stm32wl.dtsi. The radio is
present in all chips of the series, so having the node there with the
common properties simplifies the board dts files.
Signed-off-by: Fabio Baltieri <fabio.baltieri@gmail.com>
This adds support for controlling the SUBGHZSPI NSS line in STM32WL
devices. This is a special dedicated SPI port only connected to the
radio device internally, chip select happens through a bit in the PWR
module. Adding a special dt-property to identify the port, it all gets
built out on non-WL devices.
Deduplicate the existing dts bindings in the process, and add the new
one for the special spi with the new property.
Signed-off-by: Fabio Baltieri <fabio.baltieri@gmail.com>
Add a dts node for st,stm32wl-subghz-radio. The device is integrated in
STM32WL series SoCs, and based on the sx1262, but it does not use any
gpio as all the necessary signals are internally connected to various
SoC units.
To account for that, make the redundant gpio optional in the template
files, but mark them as required in the sx1261 and sx1262 definitions,
to match with what's used in the driver.
Signed-off-by: Fabio Baltieri <fabio.baltieri@gmail.com>
The STMPE1600 is an I2C based GPIO expander. This initial patch
only supports reading from/writing to the pins on the STMPE1600,
and there is currently no support for interrupts.
Signed-off-by: Titouan Christophe <moiandme@gmail.com>
Introduce a set of header files to be able to define and declare
sections and regions in the linker script. Introduce also DT helpers to
retrieve data back.
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
