Commit graph zephyr/dts
Author SHA1 Message Date
Kumar Gala
762eadc15d drivers: gpio: dw: rework init to use DT_INST_FOREACH_STATUS_OKAY
Use DT_INST_FOREACH_STATUS_OKAY to reduce duplicated code for each
instance.

We make interrupts optional since they aren't always available.

Signed-off-by: Kumar Gala <galak@kernel.org>
2022-07-14 10:31:42 +02:00
Kumar Gala
0b5b74da82 drivers: video: video_mcux_csi: Use phandle for devicetree sensor ref
Replace sensor_label property in devicetree with just a sensor phandle
property.  This is more generic and allows driver to use DEVICE_DT_GET
instead of device_get_binding.

Signed-off-by: Kumar Gala <galak@kernel.org>
2022-07-14 10:31:27 +02:00
Lucas Tamborrino
eca365929b dts: esp32: add bindings to mcpwm driver
add new pwm driver based on the mcpwm peripheral

Signed-off-by: Lucas Tamborrino <lucas.tamborrino@espressif.com>
2022-07-14 10:29:26 +02:00
Jan Kablitz
d6fc415e2a dts: arm: st: l4: add counter nodes to timers of stm32l4 series
Add counter nodes to timer nodes in dts of stm32l4 series.
This should enable the support of the basic counter API
on all stm32l4 mcus for general-purpose and basic TIMx timers.

Signed-off-by: Jan Kablitz <kabeljant@gmail.com>
2022-07-13 21:34:19 +02:00
Henrik Brix Andersen
7b6ca29941 drivers: can: mcux: mcan: add pinctrl support
Add pinctrl support to the NXP LPC driver front-end.

Fixes: #47742

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2022-07-13 18:10:52 +02:00
Tom Burdick
3824024f77 dma: hda link driver fixups
Fixes configured DMA direction for HDA link in/out drivers.

Adjusts the number of channels for link in/link out to safe value
that seems to work on all tested parts.

Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
2022-07-13 10:55:17 -04:00
Glauber Maroto Ferreira
00f3582d89 soc: esp32: dts: counter: add properties and update dt
- adds properties 'group', 'index' and 'prescaler'.
- updates board's dts to include those properties.

Signed-off-by: Glauber Maroto Ferreira <glauber.ferreira@espressif.com>
2022-07-13 15:53:04 +02:00
Mulin Chao
3468a02f72 npcx: scfg: pinmux: cleanup unused functions and macro
Clean up unused pinmux function 'npcx_pinctrl_mux_configure()' and
related 'NPCX_DT_IO_ALT*' macro functions.

Please refer https://issuetracker.google.com/234861079 for more detail.

Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
2022-07-13 10:38:49 +02:00
Henrik Brix Andersen
c0cba8f21a drivers: can: stm32: switch to supporting CAN_MODE_ONE_SHOT
Switch from using a driver-specific, compile-time devicetree one-shot
property to supporting the newly added CAN_MODE_ONE_SHOT flag for
enabling/disabling one-shot mode at run-time.

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2022-07-13 10:13:42 +02:00
Kumar Gala
1eeae77621 sensors: ak8975: remove passthrough support for MPU9150
Remove the support for enabling passthrough mode support for MPU9150
on the AK8975.  We don't have a proper MPU9150 driver and the MPU9150
has been EOL.  So its highly unlikely this code is being used.

Additonally we remove the device tree binding for the MPU9150 since
we don't have a proper driver for it.

Signed-off-by: Kumar Gala <galak@kernel.org>
2022-07-12 17:57:18 -05:00
Guillaume Lager
f6f52d3842 drivers: adc: Add ADS1119 driver
The driver support both synchronous and asynchronous reading.

Signed-off-by: Guillaume Lager <g.lager@innoseis.com>
2022-07-12 12:29:45 +02:00
Andriy Gelman
33edc4a065 dts: arm: infineon: Append package name to dtsi file
Be more verbose in the naming to match convention on other boards.

Signed-off-by: Andriy Gelman <andriy.gelman@gmail.com>
2022-07-12 10:18:59 +02:00
Gerard Marull-Paretas
c2d699ec2d drivers: spi: sifive: remove CONFIG_SIFIVE_SPI_0_ROM
CONFIG_SIFIVE_SPI_0_ROM (default y) was an option to disable spi0 if
used to access SPI Flash ROM. However, its design had a problem: it
relied on instance numbers. You had to set status okay for spi0 to make
it work (incongruent with the purpose of the option itself). This patch
makes things simpler: if such SPI0 is not available, simply keep it
disabled in DT. Bindings have been updated to mention this case.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-07-11 17:56:55 +02:00
Carlo Caione
83939c1bb5 dts: nrf5340: Add label for cpu0
Add a node label for cpu0 so that we can extend that using overlays.

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
2022-07-11 15:26:26 +02:00
Flavio Ceolin
ad8ae7f735 dma: intel: Merge cavs and ace gpdma
cAVS and ACE gpdma driver have several similarities. This commit merge
this two drivers into a single one for Intel ADSP devices.

Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2022-07-11 10:21:17 +02:00
Anas Nashif
b161554ee8 soc: cavs15: disable hda link in/out
This seems to cause a crash when running tests/boards/intel_adsp/hda and
also causing issues downstream on SOF.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2022-07-08 22:40:12 -04:00
Tom Burdick
572ccd531d intel_adsp: Use device tree to enable/disable each HDA driver
Uses the dt_compat_enabled Kconfig preprocessor to set defaults
for each HDA driver.

Each direction is uniquely selectable which can be useful when building
with SOF where only some directions may wish to be enabled at any given
time.

By default, given the device tree (intel_cavs.dtsi) only the host
directions are enabled but an overlay may adjust that as needed.

Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
2022-07-08 14:33:06 -04:00
Yuriy Vynnychek
53c6983442 dts: riscv: add Telink B91 ADC driver support
Added ADC driver DTS support for Telink B91 platform.

Signed-off-by: Yuriy Vynnychek <yura.vynnychek@telink-semi.com>
2022-07-08 11:07:18 +02:00
Jay Vasanth
76eecd3345 dts: microchip: add support for MEC1727 dts
MEC1727 has internal flash, so add the definition in
a separate MEC1727nsz.dtsi file.

Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
2022-07-08 11:07:00 +02:00
Mulin Chao
5bb33e9a1d dts: power: Add npcx PSL DT node.
Add NPCX Power Switch Logic (PSL) DT node which controls the power rails
of SoC to get better power consumption.

Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
2022-07-07 14:12:52 +00:00
Mulin Chao
851e357aa4 pinctrl: npcx: add pinctrl support for psl pads
This CL introduces how to configure PSL (Power Switch Logic) pads
properties such as input detection mode/polarity, pin-muxing and so
on via pinctrl mechanism. It includes:

1. Add two pinctrl properties and their enums for PSL input
   detection configuration.
    psl-in-mode:
      - "level"
      - "mode"
    psl-in-pole:
      - "low-falling"
      - "high-rising"

2. Add macro functions to get PSL input detection and pin-muxing
   configurations from 'pinmux', 'psl-offset' abd 'psl-polarity'
   properties.

Here is an example to configure PSL_IN2 as the PSL detection input and
its mode and polarity.

/* A falling edge detection type for PSL_IN2 */
&psl_in2_gp00 {
	psl-in-mode = "edge";
	psl-in-pol = "low-falling";
};

A device will be introduced later which uses this pinctrl node to
configure PSL input detection settings and how to turn off VCC1 power
rail by PSL_OUT.

Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
2022-07-07 14:12:52 +00:00
Joep Buruma
7e0fff24c7 drivers: pwm: add pwm driver for rpi_pico
Add pwm driver implementation for rpi pico family.
Adds myself as codeowner of drivers/pwm/*rpi_pico*

Signed-off-by: Joep Buruma <burumaj50@gmail.com>
2022-07-07 15:17:26 +02:00
Joep Buruma
2e3d446c6e dts: arm: rpi_pico: add dt bindings for pwm
Add devicetree bindings for pwm peripheral using pinctrl

Signed-off-by: Joep Buruma <burumaj50@gmail.com>
2022-07-07 15:17:26 +02:00
Martin Jäger
d21907ccb8 dts: riscv: esp32c3: add usb_serial devicetree node
Devicetree configuration for ESP32-C3 USB serial / JTAG interface.

Signed-off-by: Martin Jäger <martin@libre.solar>
2022-07-07 13:14:00 +00:00
Martin Jäger
2ed42b3555 drivers: serial: esp32_usb: Add USB serial / JTAG interface
This peripheral combines a hardware-based USB CDC ACM serial interface
and a JTAG interface.

It is present in the ESP32-C3.

Signed-off-by: Martin Jäger <martin@libre.solar>
2022-07-07 13:14:00 +00:00
Flavio Ceolin
158a87018c intel: adsp: Simplify PM
Both idle and suspend states were just being used to set the cpu
idle. That is not necessary, if the pm policy does not find a suitable
power state the kernel automatically calls k_cpu_idle().

This remove unnecessary code and the weirdness of having
min-residency-us set to 0 and other arbitrary values.

Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2022-07-07 02:10:11 -04:00
Anas Nashif
b330a05539 intel_adsp: add a new series to support Meteorlake
Meteorlake support as part of the Intel ADSP family.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Co-authored-by: Michal Wasko <michal.wasko@intel.com>
Co-authored-by: Konrad Leszczynski <konrad.leszczynski@intel.com>
Co-authored-by: Rafal Redzimski <rafal.f.redzimski@intel.com>
Co-authored-by: Enjia Mai <enjia.mai@intel.com>
Co-authored-by: Flavio Ceolin <flavio.ceolin@intel.com>
Co-authored-by: Tomasz Leman <tomasz.m.leman@intel.com>
Co-authored-by: Bonislawski Adrian <adrian.bonislawski@intel.com>
Co-authored-by: Serhiy Katsyuba <serhiy.katsyuba@intel.com>
Co-authored-by: Andrey Borisovich <andrey.borisovich@intel.com>
2022-07-06 15:11:07 -04:00
Anas Nashif
252f4052a6 drivers: dma: Add gpdma derivative of dw dma for ace
This will add ace compatible DMA driver.

Co-authored-by: Adrian Bonislawski <adrian.bonislawski@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2022-07-06 15:11:07 -04:00
Anas Nashif
b951a0ebed drivers: Add ACE V1X interrupt controller
Add Designware Interrupt Controller for ACE v1x platform

Co-authored-by: Ederson de Souza <ederson.desouza@intel.com>
Signed-off-by: Ederson de Souza <ederson.desouza@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2022-07-06 15:11:07 -04:00
Alexandre Duchesne
50afc5a3a0 dts: arm: gd32f4xx: Add support for gd32f470ik
Add initial support for gd32f470ik device and gd32f470 serie.

Signed-off-by: Alexandre Duchesne <alexandre.duchesne@rtone.fr>
2022-07-06 13:22:25 +02:00
Alexandre Bourdiol
bef533187e dts: arm: st: stm32h743.dtsi: fix USB clock enable bit
Fix STM32H743 DTS USB clock enable bit

Signed-off-by: Alexandre Bourdiol <alexandre.bourdiol@st.com>
2022-07-06 11:17:34 +02:00
Jamie McCrae
a20eb66742 drivers: watchdog: Add Raspberry Pi Pico watchdog driver
This adds basic support for the watchdog timer on the RP2040 MCU and
Raspberry Pi Pico development board

Signed-off-by: Jamie McCrae <spam@helper3000.net>
2022-07-06 10:52:29 +02:00
Pieter De Gendt
8bef504163 drivers: display: st7789v: Support 3-line serial interface
The sitronix ST7789V serial interface can operate with 3- or 4-line
protocol.

Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
2022-07-06 10:42:15 +02:00
Thomas Stranger
3d70711c04 drivers: sensor: add support for ds18b20 1-wire temperatue sensor
This commit adds support for the ds18b20 1-wire temperature sensor.

The sampling resolution of the sensor can be set in DT.
In case only a single device is on the bus, the driver issues
skip_rom commands. However, in case DT defines several devices,
the driver will use match_rom commands and therefore it is necessary
to set the rom_id of the device via the sensor attribute interface before
being able to sample sensor values.

Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
2022-07-05 23:06:45 +02:00
Thomas Stranger
d668281b4a drivers: w1: add zephyr-serial driver
The zephyr-serial w1 driver introduced in this commit implements
all routines for the w1 api on top of the zephyr serial driver.
W1 bit read, write, and reset operations are executed by issuing
polling zephyr serial byte read and write operations.

The driver should be usable on most platforms in zephyr that have
implemented support for the polling procedures of the serial driver.
As not all serial drivers are implemented exactly the same minor
additional quirks may be needed on some platforms.
The most notable difference of polling serial driver implementations
seems to be that some return immediately from poll_out after the
transmission was started(e.g. STM32) and others wait until
the transmission was completed before returning from poll_out
(e.g. NRF). While this has influence on the timeout, both types
are supported by this driver because the driver waits for a
configurable time period until it terminates the read.

The driver needs an appropriate open drain interface to be able
to communicate with slaves.
In the simpliest case this might be achived by configuring the mcu pins
in open-drain configuration with a (sufficiently small) pull-up to 3V3/5V.
Otherwise an external circuit needs to provide this interface.

Overdrive and Standard Speed modes are supported by this driver.

Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
2022-07-05 23:06:45 +02:00
Thomas Stranger
ae8543269a drivers: w1: add vnd,w1 driver for ci testing
This commit adds the vnd,w1 dummy host driver used for ci builds of
1-wire devices.

Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
2022-07-05 23:06:45 +02:00
Thomas Stranger
d63cf82a46 drivers: w1 introduce 1-wire api and common code
This commit introduces a new api for the Dallas 1-wire protocol.
The api includes link functions for read and write operations on
bit, byte, and block level, as well as functions to reset and
lock the bus.

The bus configuration is derived from the device tree and can be
queried using w1_slave_count routine.

Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
2022-07-05 23:06:45 +02:00
Teik Heng Chong
f551c29576 drivers: serial: Uart ns16550 get clock frequency from clock manager
This patch is to enhance the uart ns16550 driver to get clock frequency
from clock manager or devicetree if clock_frequency is defined.

Signed-off-by: Teik Heng Chong <teik.heng.chong@intel.com>
2022-07-05 15:38:54 +00:00
Teik Heng Chong
30e662d17e dts: bindings: clock: Add clock binding file for Intel Agilex Soc FPGA
Fix the missing Intel Agilex clock manager binding file

Signed-off-by: Teik Heng Chong <teik.heng.chong@intel.com>
2022-07-05 15:38:54 +00:00
Andrzej Głąbek
fd07675574 drivers: pinctrl_nrf: Use S0D1 drive by default for TWI/TWIM pins
The default S0S1 drive setting is not suitable for TWI/TWIM pins.
Override it with S0D1 as for some SoCs (e.g. nRF52833) without
this the peripheral will not work properly.

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2022-07-05 13:52:19 +02:00
Olof Johansson
07ac630281 dts: riscv: add #address-cells to all interrupt controllers
This mirrors #36499 and other PRs that added them for other
architectures.

This silences a large number of dtc warnings due to the missing
property. It seems reasonable to require an address-cells property since
any interrupt controller could be the parent of an interrupt-map.

The only device actually using interrupt-maps is neorv32, and it needs
an address-cells of 2 (since this is the default if none is specified it
worked like that before this change).

While I touched this, I reordered the properties for consistency across
boards, but there's a lot of variance here already.

Signed-off-by: Olof Johansson <olof@lixom.net>
2022-07-04 14:39:43 -04:00
Olof Johansson
6cb6851dd0 dts: riscv: mpfs-icicle: Rename qspi node to spi
dtc complains if the spi node is not named spi, so keep the alias but
rename the actual node.

Signed-off-by: Olof Johansson <olof@lixom.net>
2022-07-04 14:39:43 -04:00
Kumar Gala
d2ac7b4835 dts: binding: ipm: Remove unused zephyr,ipm-console binding
There is no driver or other references to the zephyr,ipm-console
devicetree compatiable. So remove the binding.

Signed-off-by: Kumar Gala <galak@kernel.org>
2022-07-04 18:08:56 +02:00
Daniel DeGrasse
aed57105a5 dts: bindings: add binding for zephyr,sdmmc-disk
Add binding for zephyr sdmmc disk device, which uses the SD
subsystem to manage an SD memory card.

Fixes #46410
Fixes #46266

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2022-07-04 16:34:03 +02:00
Erwan Gouriou
70c039d430 dts: stm32: Populate "st,stm32h7-spi" compatible when required
When required, add "st,stm32h7-spi" compatible on stm32 compatible
series (today: stm32h7, stm32mp1 and stm32mp1).

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2022-07-04 14:23:34 +00:00
Erwan Gouriou
ccebe683c6 dts: bindings: spi: Add a new stm32h7 spi compatible
Add a stm32h7 spi compatible.
This compatible intends to match all SPI hardware blocks that
can be compatible with the one available in stm32h7 devices,
for instance, but not limited to stm32u5 and stm32mp1.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2022-07-04 14:23:34 +00:00
Jose Alberto Meza
b6d2f22bd4 dts: bindings: spi: Use consistent dts names for mec172x
Use consistent name for SPI HW block property so applications
using a device tree overlay work transparently.

Signed-off-by: Jose Alberto Meza <jose.a.meza.arellano@intel.com>
2022-07-04 16:18:42 +02:00
Jose Alberto Meza
eebd67ca7b dts: arm: microchip: mec172x: Use consistent dts property names
Use consistent name for SPI HW block properties across Microchip
HW,  so applications using a device tree overlay work
transparently.

Signed-off-by: Jose Alberto Meza <jose.a.meza.arellano@intel.com>
2022-07-04 16:18:42 +02:00
Matthias Freese
5043083a0f dts: binding: gpio: add gpio extender sn74hc595
Add bindings for spi based gpio extender sn74hc595.

Signed-off-by: Matthias Freese <m.freese@web.de>
2022-07-04 16:10:37 +02:00
TOKITA Hiroshi
4dee1f1df0 dts: bindings: gpio: Adding Arduino MKR header
Add MKR header connector that is implemented by Arduino MKR series.
This allows hardware with compatible headers to define the related GPIOs.

Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@fujitsu.com>
2022-07-04 16:00:56 +02:00