Commit graph

67 commits

Author SHA1 Message Date
Phi Bang Nguyen ae8115275c dts: arm: nxp: Add devicetree node for MIPI CSI-2 Rx
Add a node for MIPI CSI-2 Rx in i.MX RT11xx devicetree and connect it to
the CSI node.

Signed-off-by: Phi Bang Nguyen <phibang.nguyen@nxp.com>
2024-05-21 15:19:52 -07:00
Declan Snyder 537d5c310c dts: nxp: Convert ENET DT default to new binding.
Convert all of the NXP SOCs with ENET to use the new
binding scheme, which is used by the new driver.

Convert any boards using this SOC to the new scheme as well,
and remove from the documentation the bit about the experimental
nature of the new driver and the overlay that shall no longer exist.

Some of the boards I do not have the hardware of, so apologies
if something breaks, as I have no way to know. All the boards
were made sure to at least build.

Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
2024-04-18 11:18:31 +02:00
Zhaoxiang Jin a30695b711 dts: nxp: Add LPADC clocks properities to SoC dtsi
Add LPADC clock properties to SoC dtsi on adc/lpadc node

Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
2024-04-18 11:16:45 +02:00
Henrik Brix Andersen 41960ab366 dts: bindings: can: remove optional sample point properties
Remove all optional, initial CAN sample point properties and rely on the
CAN timing calculations to automatically pick the preferred sample point
location based on the initial bitrate.

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2024-03-17 15:36:19 +01:00
Emilio Benavente 88054a0d3d dts: arm: nxp: fix rt11xx pit warnings
The pit had a few warnings about
the format of the register address
being uppser case and one of the
reg index values were incorrect.

Signed-off-by: Emilio Benavente <emilio.benavente@nxp.com>
2024-03-12 10:40:24 +01:00
Emilio Benavente 9815296500 dts: arm: Enabling pit for imx devices
Enabled the PIT and Multi channel support
for some of the rtXXXX devices.
- rt1010
- rt1060
- rt1160
- rt1170

Signed-off-by: Emilio Benavente <emilio.benavente@nxp.com>
2024-03-07 13:23:58 -06:00
Daniel DeGrasse f81113e948 drivers: clock_control: add support for FlexSPI reclock on NXP iMX RT10XX
Add support for reclocking the FlexSPI on NXP iMX RT10XX. This
functionality requires an SOC specific clock function to set
the clock rate, since the FlexSPI must be reset directly
before applying the new clock frequency.

Note that all clock constants are defined in this commit, since the
memc flexspi driver now depends on a clock node being present.

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2024-02-01 10:57:35 +01:00
Wilfried Chauveau 5b3d4598a7 dts: arm: Blanket remove all usages of arm,num-mpu-regions
This removes all occurrences of arm,num-mpu-regions relying on the value
reported by the register instead.
A user may still define this property if they need to have a compile time
definition for it.

Signed-off-by: Wilfried Chauveau <wilfried.chauveau@arm.com>
2023-12-01 10:48:00 +00:00
Declan Snyder 345f079e49 dts: bindings: Fix NXP USB bindings
NXP USB bindings were combined into one binding and using
a property corresponding to HAL enums which is improper use
of devicetree.

Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
2023-11-09 15:34:39 +01:00
Daniel DeGrasse 906ee53834 drivers: i2s: i2s_mcux_sai: use clock-mux property to select SAI mux
Use a new property, "clock-mux" to select the clock mux for the SAI.
Previously, the clock mux was being selected using the "bits" specifier
of the "clocks" phandle property, which is not the purpose of this
specifier. This can be shown by the regression introduced by 5bebbb91,
which changed the "bits" field to the clock gate shift (which is the
intended meaning).

This incidently worked for the SAI1 and SAI3 peripherals, as the lower 2
bits of the correct clock source selection (0b10) are the same as the new
value placed in the "bit" specifier. For SAI2, the clock source was
switched to PLL3 PDF0 by this change.

To resolve this, use an explict "clock-mux" property for this selection.

Fixes #63541

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2023-10-20 15:01:10 +02:00
Benjamin Perseghetti f19b8f2c1d soc: nxp_rt11xx: fix missing unique PWM name.
Adds missing PWM unique device name.

Signed-off-by: Benjamin Perseghetti <bperseghetti@rudislabs.com>
2023-09-29 09:45:57 +02:00
Henrik Brix Andersen 9783ed56d9 dts: bindings: can: deprecate the sjw and sjw-data properties
Update the descriptions for the various CAN devicetree timing properties
specified in Time Quanta (TQ) to make it clear that these, if present, are
only used for the initial timing parameters.

Deprecate the (Re-)Synchronization Jump Width (SJW) devicetree properties
for both arbitration and data phase timing as these are now only used in
combination with the other TQ-based CAN timing properties, which are all
deprecated.

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2023-09-28 16:28:56 +02:00
Dat Nguyen Duy a5cf757c9e drivers: dma_mcux_edma: improve interrupt handling
The current implementation iterates over all channels
even if only several channels share the same irq. This
introduces one more dt property to describe an offset
between two channels share the same interrupt id.

Beside that, the error interrupt must be put as last
element of "interrupt" dt property.

Signed-off-by: Dat Nguyen Duy <dat.nguyenduy@nxp.com>
2023-09-27 14:02:09 -05:00
Benjamin Perseghetti 41e0a2e9df soc: nxp_rt11xx: add CANFD compatible.
Enable CANFD for rt11xx by including nxp,flexcan-fd
compatibility for all CANFD capable CAN with associated
properties.

Signed-off-by: Benjamin Perseghetti <bperseghetti@rudislabs.com>
2023-08-08 12:09:10 -05:00
Benjamin Perseghetti 8b8ddb9bab soc: nxp_rt11xx: add unique PWM names.
Enable PWM to use unique device names.

Signed-off-by: Benjamin Perseghetti <bperseghetti@rudislabs.com>
2023-08-08 12:09:10 -05:00
Gerard Marull-Paretas e4c43e4cc9 pm: power-states node needs to be a child of cpus
This again aligns with Linux.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2023-07-25 09:16:14 +02:00
Daniel DeGrasse 0645b619e3 dts: arm: nxp: add PXP to RT1xxx series
Add PXP DTS definition to RT1xxx series SOCs

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2023-07-25 09:10:52 +02:00
Peter van der Perk d53021fc54 dts: nxp: rt1xx: add qdec bindings
rt11xx add qdec bindings

Signed-off-by: Peter van der Perk <peter.vanderperk@nxp.com>
2023-07-24 08:29:21 -05:00
Peter van der Perk 6971865d01 soc: nxp_imx: rt11xx enable xbar driver
Add bindings to nxp,mcux-bar dirver

Signed-off-by: Peter van der Perk <peter.vanderperk@nxp.com>
2023-07-24 08:29:21 -05:00
Declan Snyder 9921c59f40 drivers: lpadc: Make DT props match RM
- Remove build asserts in favor of DT enums
- Remove power level property since it is unused by SDK
- Correct voltage ref value in DT to correspond to
  chip specific values documented in reference manuals
  instead of corresponding to SDK enum names.
- Fix SOC devicetrees affected by these changes.

Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
2023-04-25 19:59:23 +02:00
Benjamin Björnsson a43a43d4b0 dts: Add missing adc dt-bindings include
Add missing include of adc dt-bindings in top .dtsi
file containing an adc node.

Signed-off-by: Benjamin Björnsson <benjamin.bjornsson@gmail.com>
2023-04-20 10:48:33 +02:00
Henrik Brix Andersen a082565dca dts: bindings: can: rename nxp,kinetis-flexcan binding to nxp,flexcan
Rename the nxp,kinetis-flexcan devicetree compatible to nxp,flexcan as it
is not specific to the NXP Kinetis series.

This is preparation for adding a nxp,flexcan-fd binding.

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2023-04-13 10:00:03 +02:00
Cristiana Preda 4b9015d774 dts: bindings: pwm: imx: change PWM flag cell
Modifying .yaml file to permit polarity options for mimxrt10xx boards.

Signed-off-by: Cristiana Preda <predacristianamaria@gmail.com>
2023-01-20 09:02:02 +01:00
Daniel DeGrasse 6bcdcc3795 dts: nxp_imx: Add zephyr,memory-region attribute to memory regions
Add zephyr,memory-region compatible and attribute to SOC memory regions,
so that sections will be generated and MPU attributes can be applied.

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2022-12-05 19:54:37 +01:00
Bartosz Bilas 57310cba87 arm: nxp: take PWM prescaler from device tree
Replace the hardcoded kPWM_Prescale_Divide_128
driver prescaler with the ones defined in the dtsi file
that allow overriding them by the user.

Signed-off-by: Bartosz Bilas <b.bilas@grinn-global.com>
2022-10-03 15:04:31 -05:00
Martí Bolívar 387b16a3a5 dts: nxp: rt11xx: fix lpuart12 base addresses
The correct address is 0x40c28000 on these SoCs.

Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
2022-09-21 07:55:40 -07:00
Mahesh Mahadevan e98a61e791 dts: MXRT1xxx: Update USB configuration
Increase the USB speed from Full speed to
High speed

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
2022-09-09 09:44:46 -05:00
Mahesh Mahadevan 3a7c719fb4 dts: nxp: Add a property to get USB controller type
The property is similar to the usb_controller_index_t
enum that is available in the NXP SDK.

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
2022-09-09 09:44:46 -05:00
Nils Larsen 1d7ff08c82 dts: rt11xx: add enet1g peripheral and set up clock
The enet1g peripheral was missing in device tree for nxp rt11xx.
With this commit, the peripheral can be operated like the enet peripheral
with the eth_mcux (kinetis-ethernet) driver at 10/100 Mbit (no gigabit).

Signed-off-by: Nils Larsen <nils.larsen@posteo.de>
2022-09-07 16:50:08 -05:00
Declan Snyder 1a8b700a81 dts: arm: nxp: Added MCUX CAAM on rt11xx.dtsi
Added nxp,imx-caam binding
Enabled CAAM in rt11xx devicetree

Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
2022-08-11 17:14:43 -05:00
Kumar Gala 70475bf5ec dts: arm: nxp: Remove label property from devicetrees
Label properties are not required.

Signed-off-by: Kumar Gala <galak@kernel.org>
2022-08-03 12:59:00 -05:00
Kumar Gala 2f49bec7b7 sdhc: dts: remove label property from SDHC nodes
Remove 'label' property from SDHC nodes.  We can use variants of
DEVICE_DT_GET to get access to a device pointer for use in an
application.

Signed-off-by: Kumar Gala <galak@kernel.org>
2022-07-15 16:04:12 -05:00
Chay Guo 191f93c325 boards: Add analog comparator support on MIMXRT1170 EVK
Updated mcux_acmp sample to support discrete mode config.
Add ACMP support on MIMXRT1170 EVK.

Signed-off-by: Chay Guo <changyi.guo@nxp.com>
2022-06-09 11:30:49 +02:00
Daniel DeGrasse 75513ba632 dts: nxp: fix PM minimum residency and exit latency for rt11xx
Fix PM minimum residency time and exit latency for rt11xx to reflect
actual delays when entering and exiting low power modes.

Fixes #45750

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2022-05-25 14:20:27 +02:00
Mahesh Mahadevan 27800c2fd7 drivers: mipi: Add MIPI DSI driver for MXRT devices
Add a MIPI DSI driver for the MIPI controller on
NXP MXRT SoC'sUpdate MIPI_DSI

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
2022-05-12 09:26:50 -05:00
Mahesh Mahadevan 14ed412359 soc: rt: Add MIPI support for MXRT1170
Add MIPI support for NXP's MXRT1170

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
2022-05-12 09:26:50 -05:00
Gerard Marull-Paretas 0d85931315 dts: migrate includes to <zephyr/...>
In order to bring consistency in-tree, migrate all dts code to the new
prefix <zephyr/...>. Note that the conversion has been scripted, refer
to zephyrproject-rtos#45388 for more details.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-05-06 19:54:54 +02:00
Daniel DeGrasse 58a2b15972 drivers: hwinfo: implemented hardware info support for RT11xx SOC
RT11xx SOC uses same system reset controller as RT10xx series. Add
support for SRC on RT11xx

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2022-05-06 11:33:26 +02:00
Daniel DeGrasse c91d473ead drivers: imx_usdhc: change DT_COMPAT string to imx-usdhc
with the legacy USDHC driver fully removed from the tree, the
nxp,imx-usdhc binding can now be used for the new SD host controller
driver.

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2022-04-29 14:21:36 -05:00
Daniel DeGrasse a18338bf45 soc: rt11xx: Enable USDHC SD host controller on RT1170
Enable SD host controller driver for RT1170, so the EVK can use the new
SD subsystem.

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2022-04-29 14:21:36 -05:00
Gerard Marull-Paretas 6a0deb09a8 dts: bindings: pwm: nxp,imx-pwm: add PWM period cell
The PWM period cell will soon be required by the pwm_dt_spec facilities,
this patch adds support for it.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-04-25 09:00:03 -05:00
Gerard Marull-Paretas 9a3ddc396e dts: arm: nxp: nxp_rt/rt11xx: include PWM dt-bindings by default
In order to be consistent with other platforms, include the dt-bindings
for PWM.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-04-25 09:00:03 -05:00
Daniel DeGrasse 94615c64ab dts: nxp: Add DMA mux options for lpuart peripherals
Add dma mux settings for all lpuart peripherals on NXP SOCs

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2022-04-06 10:03:40 -05:00
Daniel DeGrasse 61b83c88b8 drivers: gpio: gpio_mcux_igpio: enable pinmuxing in gpio driver
In order for pinctrl support to be complete, RT series GPIO driver must
support pinmuxing within the driver level. RT series pinmux settings do
not correspond directly to gpio port/pin numbers, so use DTS mappings to
pinctrl nodes to select and apply pinmux settings in the gpio driver.

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2022-03-25 15:47:54 -05:00
Daniel DeGrasse 1cee7be552 drivers: pinctrl: Enable pinctrl for RT11xx series
RT11xx series has similar pin configuration peripheral to RT10xx, with
some differences in register layout. Create new pinctrl definition
header file, and reuse existing driver code for RT10xx.

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2022-03-25 15:47:54 -05:00
Derek Snell eabb4e25a4 dts: rt11xx: add missing GPIO peripherals and IRQs
added missing GPIO peripherals and IRQ numbers to devicetree

Signed-off-by: Derek Snell <derek.snell@nxp.com>
2022-03-25 13:50:53 -05:00
Daniel DeGrasse da40ffb4a8 soc: enable noncacheable OCRAM region for nxp iMX.RT
OCRAM can be used for DMA, and in this case it should be marked as
noncacheable. Add KConfig symbol and appropriate linker scripts to
enable OCRAM region to be defined as noncacheable, and initialized with
data from flash at boot.

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2022-03-25 10:40:59 +01:00
Daniel DeGrasse 55f1d5ba73 drivers: enet: Enable pinctrl for eth_mcux driver
Enable pinctrl for ethernet mcux driver, and update kinetis DTS node to
include labelling for PTP node, to enable driver to access pinctrl
properties.

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2022-03-22 12:36:04 +01:00
Hake Huang e4793b902d dts: imx_rt: add pinctrl and gpr for rt1xxx
add dtsi settings for rt series
dtsi use gpr to replace pinmux
nxp iomuxc has gpr which has more settings than mux and io settings
current solution is to export gpr separately and access then directly

Signed-off-by: Hake Huang <hake.huang@oss.nxp.com>
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2022-03-15 10:12:57 -05:00
Nazar Kazakov 9713f0d47c everywhere: fix typos
Fix a lot of typos

Signed-off-by: Nazar Kazakov <nazar.kazakov.work@gmail.com>
2022-03-14 20:22:24 -04:00