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drivers: lpadc: Make DT props match RM

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- Remove build asserts in favor of DT enums
- Remove power level property since it is unused by SDK
- Correct voltage ref value in DT to correspond to
  chip specific values documented in reference manuals
  instead of corresponding to SDK enum names.
- Fix SOC devicetrees affected by these changes.

Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
This commit is contained in:
Declan Snyder 2023-04-13 16:15:15 +00:00 • committed by Carles Cufí
commit 9921c59f40
8 changed files with 41 additions and 58 deletions
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45
drivers/adc/adc_mcux_lpadc.c
View file

@ -46,13 +46,7 @@ struct mcux_lpadc_config {
uint32_t clock_div;
uint32_t clock_source;
lpadc_reference_voltage_source_t voltage_ref;
#if defined(FSL_FEATURE_LPADC_HAS_CTRL_CAL_AVGS)\
&& FSL_FEATURE_LPADC_HAS_CTRL_CAL_AVGS
lpadc_conversion_average_mode_t calibration_average;
#else
uint32_t calibration_average;
#endif /* FSL_FEATURE_LPADC_HAS_CTRL_CAL_AVGS */
lpadc_power_level_mode_t power_level;
uint32_t offset_a;
uint32_t offset_b;
void (*irq_config_func)(const struct device *dev);
@ -459,8 +453,6 @@ static int mcux_lpadc_init(const struct device *dev)
adc_config.conversionAverageMode = config->calibration_average;
#endif /* FSL_FEATURE_LPADC_HAS_CTRL_CAL_AVGS */
adc_config.powerLevelMode = config->power_level;
LPADC_Init(base, &adc_config);
/* Do ADC calibration. */
@ -519,13 +511,6 @@ static const struct adc_driver_api mcux_lpadc_driver_api = {
#define ASSERT_LPADC_CLK_DIV_VALID(val, str) \
BUILD_ASSERT(val == 1 || val == 2 || val == 4 || val == 8, str)
#define ASSERT_LPADC_CALIBRATION_AVERAGE_VALID(val, str) \
BUILD_ASSERT(val == 1 || val == 2 || val == 4 || val == 8 \
|| val == 16 || val == 32 || val == 64 || val == 128, str) \
#define ASSERT_WITHIN_RANGE(val, min, max, str) \
BUILD_ASSERT(val >= min && val <= max, str)
#if defined(CONFIG_SOC_SERIES_IMX_RT11XX) || \
defined(CONFIG_SOC_SERIES_IMX_RT6XX) || \
defined(CONFIG_SOC_SERIES_IMX_RT5XX) || \
@ -536,20 +521,6 @@ static const struct adc_driver_api mcux_lpadc_driver_api = {
MUX_A(CM_ADCASYNCCLKSEL, val)
#endif
#define TO_LPADC_REFERENCE_VOLTAGE(val) \
_DO_CONCAT(kLPADC_ReferenceVoltageAlt, val)
#if defined(FSL_FEATURE_LPADC_HAS_CTRL_CAL_AVGS)\
&& FSL_FEATURE_LPADC_HAS_CTRL_CAL_AVGS
#define TO_LPADC_CALIBRATION_AVERAGE(val) \
_DO_CONCAT(kLPADC_ConversionAverage, val)
#else
#define TO_LPADC_CALIBRATION_AVERAGE(val) 0
#endif
#define TO_LPADC_POWER_LEVEL(val) \
_DO_CONCAT(kLPADC_PowerLevelAlt, val)
#define LPADC_MCUX_INIT(n) \
static void mcux_lpadc_config_func_##n(const struct device *dev); \
\
@ -557,23 +528,13 @@ static const struct adc_driver_api mcux_lpadc_driver_api = {
"Invalid clock source"); \
ASSERT_LPADC_CLK_DIV_VALID(DT_INST_PROP(n, clk_divider), \
"Invalid clock divider"); \
ASSERT_WITHIN_RANGE(DT_INST_PROP(n, voltage_ref), 2, 3, \
"Invalid voltage reference source"); \
ASSERT_LPADC_CALIBRATION_AVERAGE_VALID( \
DT_INST_PROP(n, calibration_average), \
"Invalid conversion average number for auto-calibration time"); \
ASSERT_WITHIN_RANGE(DT_INST_PROP(n, power_level), 1, 4, \
"Invalid power level"); \
PINCTRL_DT_INST_DEFINE(n); \
PINCTRL_DT_INST_DEFINE(n); \
static const struct mcux_lpadc_config mcux_lpadc_config_##n = { \
.base = (ADC_Type *)DT_INST_REG_ADDR(n), \
.clock_source = TO_LPADC_CLOCK_SOURCE(DT_INST_PROP(n, clk_source)), \
.clock_div = DT_INST_PROP(n, clk_divider), \
.voltage_ref = \
TO_LPADC_REFERENCE_VOLTAGE(DT_INST_PROP(n, voltage_ref)), \
.calibration_average = \
TO_LPADC_CALIBRATION_AVERAGE(DT_INST_PROP(n, calibration_average)), \
.power_level = TO_LPADC_POWER_LEVEL(DT_INST_PROP(n, power_level)), \
.voltage_ref = DT_INST_PROP(n, voltage_ref), \
.calibration_average = DT_INST_ENUM_IDX_OR(n, calibration_average, 0), \
.offset_a = DT_INST_PROP(n, offset_value_a), \
.offset_b = DT_INST_PROP(n, offset_value_b), \
.irq_config_func = mcux_lpadc_config_func_##n, \

4
dts/arm/nxp/nxp_lpc55S2x_common.dtsi
View file

@ -272,9 +272,9 @@
status = "disabled";
clk-divider = <8>;
clk-source = <0>;
voltage-ref= <2>;
voltage-ref= <1>;
calibration-average = <128>;
power-level = <1>;
power-level = <0>;
offset-value-a = <10>;
offset-value-b = <10>;
#io-channel-cells = <1>;

4
dts/arm/nxp/nxp_lpc55S3x_common.dtsi
View file

@ -246,9 +246,9 @@
status = "disabled";
clk-divider = <8>;
clk-source = <0>;
voltage-ref= <2>;
voltage-ref= <1>;
calibration-average = <128>;
power-level = <1>;
power-level = <0>;
offset-value-a = <10>;
offset-value-b = <10>;
#io-channel-cells = <1>;

4
dts/arm/nxp/nxp_lpc55S6x_common.dtsi
View file

@ -306,9 +306,9 @@
status = "disabled";
clk-divider = <8>;
clk-source = <0>;
voltage-ref= <2>;
voltage-ref= <1>;
calibration-average = <128>;
power-level = <1>;
power-level = <0>;
offset-value-a = <10>;
offset-value-b = <10>;
#io-channel-cells = <1>;

6
dts/arm/nxp/nxp_rt11xx.dtsi
View file

@ -868,9 +868,9 @@
status = "disabled";
clk-divider = <8>;
clk-source = <0>;
voltage-ref= <2>;
voltage-ref= <1>;
calibration-average = <128>;
power-level = <1>;
power-level = <0>;
offset-value-a = <10>;
offset-value-b = <10>;
#io-channel-cells = <1>;
@ -883,7 +883,7 @@
status = "disabled";
clk-divider = <8>;
clk-source = <0>;
voltage-ref= <2>;
voltage-ref= <1>;
calibration-average = <128>;
power-level = <1>;
offset-value-a = <10>;

4
dts/arm/nxp/nxp_rt5xx_common.dtsi
View file

@ -415,9 +415,9 @@
status = "disabled";
clk-divider = <1>;
clk-source = <0>;
voltage-ref= <2>;
voltage-ref= <1>;
calibration-average = <128>;
power-level = <1>;
power-level = <0>;
offset-value-a = <10>;
offset-value-b = <10>;
#io-channel-cells = <1>;

4
dts/arm/nxp/nxp_rt6xx_common.dtsi
View file

@ -347,9 +347,9 @@
status = "disabled";
clk-divider = <1>;
clk-source = <0>;
voltage-ref= <2>;
voltage-ref= <1>;
calibration-average = <128>;
power-level = <1>;
power-level = <0>;
offset-value-a = <10>;
offset-value-b = <10>;
#io-channel-cells = <1>;

28
dts/bindings/adc/nxp,lpc-lpadc.yaml
View file

@ -27,17 +27,39 @@ properties:
voltage-ref:
type: int
required: true
description: reference voltage source
description: |
Voltage reference selection. Corresponds to value of
register field CFG[REFSEL] (see chip specific manual).
enum:
- 0
- 1
- 2
- 3
calibration-average:
type: int
required: true
description: conversion average number for auto-calibration
enum:
- 1
- 2
- 4
- 8
- 16
- 32
- 64
- 128
power-level:
type: int
required: true
description: power level for the ADC
description: |
Power level selection. Corresponds to the value of
register field CFG[PWRSEL] (see chip specific manual).
enum:
- 0
- 1
- 2
- 3
offset-value-a:
type: int