RT11xx USB PLLs source from 24MHz XTAL oscillator. Add this oscillator
as a clock source for the usb dts entries for the RT11xx.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
the pre-dic is not used in rt11xx series, but for driver compatible
with rt10xx we still need have it in dts
fixing: #42179
Signed-off-by: Hake Huang <hake.huang@oss.nxp.com>
Adds power state definitions for RT1160. Min residency times are loosely
derived from transition times into similar power states in the datasheet
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Enables basic power management for the RT11xx series SOCs. The following
power saving measures are currently implemented:
- system reduces core voltage during sleep
- core clock can be gated in deep sleep
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Remove the requirement for specifying #address-cells and #size-cells
properties for CAN controller devicetree nodes.
CAN controllers do not have a common concept of devicetree child nodes
and thus have no need for these properties. This is in line with
upstream Linux kernel devicetree bindings.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
RT11xx can peripheral had incorrect clocking configuration in SOC clock
init code and DTS. Fix peripheral configuration.
Fixes#41251
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
GPT base address in the devicetree for the RT11xx SOC series was
incorrect, this commit fixes it
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Added a driver to enable the GPT timer on RT1xxx parts to be used
instead of systick as a clock source. The timer is set to run in reset
mode, and uses the low frequency 32kHz oscillator for power savings
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Enable flexspi for RT11xx SOCs. This requires selecting the correct
KConfig symbol for the cortex m4 and m7 SOCs, as well as correcting an
error in the flexspi DTS node and updating the clock init for RT11xx
SOCs.
Note that in addition, the NXP hal must be updated to properly support
including the cache management driver for the Cortex M4.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
GPIO10 was missing from RT11xx DTS, and is required to manage SD card
power. Enable this GPIO.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
MCUX PWM driver used hardcoded clock source. update driver to use clock
bindings to determine PWM peripheral clock frequency.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Fix register addresses in rt11xx SOC dts. Flexcan1 was defined with an
incorrect register address, and watchdog 3 was incorrectly labelled as
watchdog 1. Watchdog 2 should not be enabled, as it is only accessible
from code running in the trustzone context.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Add baseline support for mimxrt1160_evk Cortex M4 and M7 cores
UART shell, synchronization, and hello world have all been verified to
build and run correctly.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
