Rearming the riscv machine timer is done by first updating the
mtimecmp low value register. If the low value is updated with a
relatively small value, a timer interrupt can be generated while
updating the mtimecmp high value.
To avoid such a spurious interrupt to occur, disable the timer
interrupt while rearming the timer.
Change-Id: I50ab3f19554a9a8dfe70943b6da0d20be3de88dc
Signed-off-by: Jean-Paul Etienne <fractalclone@gmail.com>
This will provide the feature through Crypto API.
Change-Id: If6953a54b393544b019755ae73571effe0724e69
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Without this bit set, if we a pass ptr to a string such as:
"This is a string\n"
The DMA'ed output would be:
"TTTTTTTTTTTTTTTTTT"
Change-Id: I0186c95ddca0390596d22af2551dbfa6716a5082
Signed-off-by: Lee Jones <lee.jones@linaro.org>
The device data structure is statically declared and referenced
on a per-controller basis during driver registration. Unfortunately,
due to using the same name (ddata) to initially declare as used
in individual functions, we accidentally referenced the main struct
by mistake due to a lack of local declaration. Let's prevent that
from happening again by using different name-spaces.
Change-Id: I9f7e5e7f95ee68d71aee70fa979e015ca2b5519e
Signed-off-by: Lee Jones <lee.jones@linaro.org>
The STM32 DMA controller supplies streams, which in turn provide a
selection of channels. The stream number is provided by the DMA API
through it's 'channel' argument, but the sub-channel (within the
stream) is specified on an application case by case bases via Kconfig.
Change-Id: Ib5bfdb80f4d616516850787e1402164807771c5e
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Some controllers contain channels with-in channels, or in the case
of the STM32 DMA controller channels within streams. Channels
will vary depending on application, so these need to be provided
on a use-case bases.
Change-Id: I4f5fe3ec5817583b95dc7f059b5dc57f937523c4
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Fixes the fxos8700 Kconfig help indentation to be <tab><space><space>.
Change-Id: If6e9395b5d28044962ca568be5515658e7dc2627
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Adds sensor driver support for the NXP FXAS21002 3-axis gyroscope.
Includes statically configurable range and output data rate, as well as
the sensor data ready trigger.
Datasheet:
http://www.nxp.com/assets/documents/data/en/data-sheets/FXAS21002.pdf
Jira: ZEP-1392
Change-Id: I84587c4d5e76863245e9d045c6abb10b21b2615a
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Each controller contains a number of streams. Subsequently each
stream contains a number of channels. Channels are selectable
via the stream's control register.
Change-Id: Ib75d1377cb8fc38f27e4566b275343b2ffb8da65
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Commit c0bd8a0ce4 ("api: dma: dma api update") introduced some new APIs
and deprecated the old ones. Let's move to the new API before the old
calls are completely removed.
Change-Id: I21795fa20124f8101c56b0fceb0f0d9afd96b0f0
Signed-off-by: Lee Jones <lee.jones@linaro.org>
File include/misc/sys_log.h has been moved to include/logging/sys_log.h.
Change-Id: I011ca632396b574ae7e388b47fc2ba3a58fafc7b
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Providing a new line, then an attribute on the same line as the
following closing bracket is odd. Move to something more
transitional and in line with regular coding standards.
Change-Id: I08f7cd76ca2f522a8b5b6de2e5baf94e95b5195a
Signed-off-by: Lee Jones <lee.jones@linaro.org>
It is possible to evaluate the TXE bit *before* H/W has had the
opportunity to detect that data is being processed. Therefore
we should hold off on any evaluation until TXE has initially been
set.
Change-Id: Iff26bfbe3ab419734003bf81a4cb357de83908e7
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Currently only 1 is allowed. While we're at it, let's generify the
existing entries, since they could be used by all controllers, not
just QMSI.
Change-Id: Iec5d195fff239931b21a7584eb4b642b40f95be5
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Currently the entries for STM32 UART ports are at the same level than
the top menuconfig UART_STM32. As a result they are mixed with other
configs in the "Serial Drivers" menu.
Use if/endif grammar to put these entries under a dedicated STM32
submenu.
Change-Id: If28945204b801578d29f8cce7c2370ca3c2737a1
Signed-off-by: Florian Vaussard <florian.vaussard@heig-vd.ch>
Add support for GPIO banks I to K that can be found on some high-density
STM32F4 products.
Change-Id: I2cb65ed4d4a2282f7d17478cb1fcdd65dffe71b0
Signed-off-by: Florian Vaussard <florian.vaussard@heig-vd.ch>
The registration of each GPIO bank differs by only few details. These
differences can be factorized in order to create a generic registration
macro.
This has several advantages:
- Less code
- Easier to add new banks
- Less work to add support for new STM32 families
The diff stat speaks for it-self: 26 insertions(+), 92 deletions(-)
Change-Id: I674752fda5ee3caefb815ccf070a1b636b16cf85
Signed-off-by: Florian Vaussard <florian.vaussard@heig-vd.ch>
The PLLN multiplier can range between 50 and 432 on all STM32F4, except
on the STM32F401 where the lower bound is restricted to 192.
Fix the range property and the help text to reflect this reality.
Change-Id: I7b93e84b321f7869aaf611287344cd3e25c893c8
Signed-off-by: Florian Vaussard <florian.vaussard@heig-vd.ch>
Since all interrupts come in on the status line,
we only connect it for the KL2X.
Change-Id: Ia9e0d483fe68464a0eeab08c95a043260e5793b0
Signed-off-by: Gustavo Denardin <gustavo.denardin@gmail.com>
Clear pending IRQ when starting and restore back the RTC1 state when
disabling sys_clock, to avoid issues when soft rebooting the device or
chainloading another Zephyr image (e.g. mcuboot).
Change-Id: I693d9168196ad2cfb8475ecfa2051eac043b1fbd
Signed-off-by: Ricardo Salveti <ricardo.salveti@linaro.org>
In prep for supporting the older KL2x SoCs that use a different SPI
block, rename the current SPI driver to DSPI to match what the MCUX HAL
defines it as.
Change-Id: I9097580df5fca649ab6fd9a38212fced0b1ea6ed
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
At the moment CC2520 configuration options are selected inside "TI
CC2520 Driver RAW channe" submenu like:
[*] TI CC2520 Driver support ----
[ ] TI CC2520 Driver RAW channel --->
Make RAW channel depends on TI CC2520.
Change-Id: I92879b7f4391f1842c012b6c03c78956e90b9441
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
The fxos8700 is primarily an accelerometer/magnetometer, but it does
also include a temperature sensor. Note that the temperature sensor is
uncalibrated and can only be used when the magnetometer is enabled
(magnetometer-only mode or hybrid mode).
Change-Id: I74c4ae68c30e0f9836caa70baed44ad8956b17ea
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Declaring these as const lets the linker generate more optimal code.
Some extra care is needed with hci_ecc.c since it was overwriting the
send callback. Now the choice of send() call is done directly in the
bt_send() function
Change-Id: Iac74f5ee9bee097bbb34c11bd13d1d886700f5cc
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
Support connection via SPI and keep I2C as the default.
Jira: ZEP-1698
Change-Id: I42a76131577a37429375364deb07e451107f5d81
Signed-off-by: Dario Pennisi <dario@iptronix.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Allow user to set the four last bytes of a MAC address.
By default the bytes are selected randomly but for testing
purposes we need a way to specify the address in advance.
Change-Id: Ic9820a8026b327d1ee5025ab77fdc77f5778de67
Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
Networking stack has split one global DATA pool to RX and TX DATA pools
and also added net_buf pool support to each context. Update the driver
to support this new design. Since the GMAC TX descriptor list has a fixed
size but the number of TX DATA buffers is no longer limited updating the
TX descriptor list has to be guarded by a semaphore.
Tested on Atmel SMART SAM E70 Xplained board
Change-Id: I181e1cdd183e173b85d5d1711b6e78cd5165666d
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
It is possible that the slip->last pointer is not set during
the startup of the slip driver if we receive some garbage bytes.
This in turn caused memory to be overwritten in random places.
Jira: ZEP-1737
Change-Id: Ia2ce193b81a8f707b7ca63497d497ea70699bb32
Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
No need to always look through all the network interfaces
when receiving packet as we support only one interface and
it is always the same one.
Change-Id: Ic0bfabc8409160352081cac1a6c3dbbfa35fe390
Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
The current state of affairs will not allow to set a MAC address and
thus will initialize a random MAC address.
However, when we are in a situation where we are trying to interface
Zephyr OS QEMU VMs with physical targets for testing, this is not
practical. We need to create a macvtap interface, on which we need to
set the MAC address of the Zephyr OS SLIP device so packets can be
routed. There is no way to guess which random address is going to be
used, and there is no practical way to query it.
So this patch adds a CONFIG_SLIP_MAC_ADDR config
setting. slip_iface_init() is changed to take the code from
slip_get_mac() for initializing the MAC address (which should be
happening there anyway) and if CONFIG_SLIP_MAC_ADDR is set, it takes
that one -- otherwise goes to generate a random one.
Change-Id: I55a68f2743604f310d41c934783eca82084d7e94
Signed-off-by: Inaky Perez-Gonzalez <inaky.perez-gonzalez@intel.com>
Add few nop instructions to allow the DMA controller settle,
It takes time after starting the transfer to access the DMA
controller registers, so a few cycles are added, the minimal number
of cycles needed has been calculated using tests results on c1000
development board.
Jira: ZEP-1803
Change-Id: I1f8e8478f0350e1b6e4dd596b783dc4babc2d02b
Signed-off-by: Sergio Rodriguez <sergio.sf.rodriguez@intel.com>
